KR20060131428A - Plasma Display and Driving Device - Google Patents

Abstract

The plasma display device according to the present invention alternately applies a first voltage and a second voltage lower than the first voltage to the first electrode by using resonance of the inductor and the panel capacitor of the power recovery circuit. For this resonance, an external capacitor charging an intermediate voltage between the first voltage and the second voltage is required. At this time, a DC / DC converter for maintaining a constant voltage charged in the external capacitor is connected to a power recovery circuit to maintain a constant voltage charged in the external capacitor.

Description

Plasma display and its driving device {PLASMA DISPLAY AND DRIVING APPARATUS THEREOF}

1 is a diagram illustrating a plasma display device according to an exemplary embodiment of the present invention.

2 illustrates a driving waveform of a plasma display device according to an exemplary embodiment of the present invention.

3 is a diagram illustrating a sustain discharge driving circuit according to a first embodiment of the present invention.

4 is a diagram illustrating the DC / DC converter shown in FIG. 3.

FIG. 5 is a diagram illustrating a current path of the driving circuit shown in FIG. 3.

6 is a diagram illustrating a sustain discharge driving circuit according to a second embodiment of the present invention.

FIG. 7 is a diagram illustrating a current path of the sustain discharge driving circuit illustrated in FIG. 6.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display device and a driving device thereof, and more particularly to a driving circuit of a plasma display device.

The plasma display device is a display device using a plasma display panel that displays text or an image by using plasma generated by gas discharge. In the plasma display panel, a plurality of discharge cells are arranged in a matrix form.

In such a plasma display device, one frame is divided into a plurality of subfields having respective weights to be driven, and each subfield includes a reset period, an address period, and a sustain period. The reset period is a period in which the state of the discharge cells is initialized to stably perform the address discharge, and the address period is a period in which cells to be turned on and cells to be turned off are selected from among the plurality of discharge cells. The sustain period is a period in which sustain discharge is performed for a cell to be turned on to actually display an image.

In performing such an operation, the discharge space between the scan electrode and the sustain electrode acts as a capacitive load (hereinafter referred to as a "panel capacitor"). Therefore, in order to apply a sustain discharge pulse having alternating high voltage (for example, Vs voltage) and low voltage (for example, 0V) in the sustain period, reactive power is required in addition to the power for sustain discharge. Accordingly, the plasma display device applies a sustain discharge pulse to the scan or sustain electrode using a power recovery circuit that recovers and reuses reactive power.

Conventional power recovery circuits include circuits proposed by L.F.Weber (US Pat. Nos. 4,866,349 and 5,081,400). Weber's power recovery circuit uses resonance of inductor and panel capacitor to charge panel capacitor to Vs voltage or discharge to ground voltage (0V), and requires external capacitor charging Vs / 2 voltage for resonance. Do. At this time, the voltage Vs / 2 may be generated by using a divider resistor from the voltage Vs or through a zener diode.

The Vs / 2 voltage charged to the external capacitor is discharged when the panel capacitor is charged to the Vs voltage and charged when the panel capacitor is discharged to ground voltage. Therefore, if the power recovery is not performed properly, the Vs / 2 voltage is not constant. can not do it. If the voltage of the external capacitor does not remain constant at the voltage Vs / 2, distortion occurs in the sustain discharge pulse. In particular, when the voltage of the external capacitor is lower than the voltage of Vs / 2, an overcurrent occurs due to a sudden voltage change when the switch connected to the power supply supplying the Vs voltage is turned on after resonance, and the stress caused by the overcurrent causes Deterioration and damage.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a plasma display device and a driving device capable of keeping a voltage charged in an external capacitor of a power recovery circuit constant.

According to an aspect of the present invention, a plurality of first electrodes, a plurality of second electrodes performing a display operation together with the plurality of first electrodes, and a plurality of first voltages lower than the first voltage and the first voltages. A plasma display device including a driving circuit for alternately applying a second voltage is provided. In this case, the driving circuit includes a capacitor, a DC / DC converter electrically connected to a first power supply for supplying a third voltage, and at least one first terminal having a first end connected to the first electrode. It includes an inductor, and includes a power recovery unit for increasing or decreasing the voltage of the first electrode while electrically connecting the first end of the first inductor and the first end of the capacitor.

According to another feature of the invention, a first voltage and the first voltage to the first electrode of the plasma display device including a plurality of first electrodes and a second electrode performing a display operation together with the plurality of first electrodes. A drive device is provided for alternately applying a lower second voltage. The driving device includes a first transistor connected between a first power supply for supplying the first voltage and the first electrode, and a second power supply connected between the second power supply for supplying the second voltage and the first electrode. A second transistor, a DC / DC converter for outputting an intermediate voltage of the first voltage and the second voltage through an output terminal from a third power supply for supplying a third voltage, and a first inductor; Is electrically connected between the output terminal of the DC / DC converter and the first electrode to change the voltage of the first electrode from the first voltage to the second voltage and the voltage of the first electrode to the second voltage. It includes a power recovery unit for changing to one voltage.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention. Like parts are designated by like reference numerals throughout the specification. When a part is connected to another part, this includes not only a directly connected part but also a case where another part is connected in between.

Now, a plasma display device according to an exemplary embodiment of the present invention will be described in detail.

First, a plasma display device according to an exemplary embodiment of the present invention will be described in detail with reference to FIG. 1.

1 is a diagram illustrating a plasma display device according to an exemplary embodiment of the present invention.

As shown in FIG. 1, a plasma display device according to an exemplary embodiment of the present invention includes a plasma display panel 100, a controller 200, an address electrode driver 300, a scan electrode driver 400, and a sustain electrode driver 500. It includes.

The plasma display panel 100 includes a plurality of address electrodes (called "A electrodes") A1 to Am extending in the column direction, and a plurality of sustain electrodes extending in pairs in the row direction (hereinafter, "X"). Electrodes ”(X1 to Xn) and scan electrodes (hereinafter referred to as“ Y electrodes ”) (Y1 to Yn). In general, the X electrodes X1 to Xn are formed corresponding to the respective Y electrodes Y1 to Yn, and the X electrode and the Y electrode perform a display operation for displaying an image in the sustain period. The Y electrodes Y1 to Yn and the X electrodes X1 to Xn are arranged to be orthogonal to the A electrodes A1 to Am. At this time, the discharge space at the intersection of the A electrodes A1 to Am and the X and Y electrodes X1 to Xn and Y1 to Yn forms a cell. The structure of the plasma display panel 100 is an example, and a panel having another structure to which the driving waveform described below may be applied may also be applied to the present invention.

The controller 200 receives an image signal from the outside and outputs an A electrode driving control signal, an X electrode driving control signal, and a Y electrode driving control signal, and divides and drives one frame into a plurality of subfields having respective luminance weights. do.

The address electrode driver 300 receives the A electrode driving control signal from the controller 200 and applies a driving voltage to the A electrode.

The scan electrode driver 400 receives a Y electrode driving control signal from the controller 200 and applies a driving voltage to the Y electrode.

The sustain electrode driver 500 receives the X electrode driving control signal from the controller 200 and applies a driving voltage to the X electrode.

Next, a driving waveform of the plasma display device according to an exemplary embodiment of the present invention will be described in detail with reference to FIG. 2.

2 illustrates a driving waveform of a plasma display device according to an exemplary embodiment of the present invention. 2 shows only drive waveforms in the sustain period.

As shown in Fig. 2, in the sustain period, a sustain discharge pulse having a high level voltage (Vs voltage in Fig. 2) and a low level voltage (0 V) is applied to the Y electrode and the X electrode in an opposite phase. That is, 0 V is applied to the X electrode when the Vs voltage is applied to the Y electrode, and 0 V is applied to the Y electrode when the Vs voltage is applied to the X electrode. If the wall voltage is formed between the Y electrode and the X electrode by the address discharge in the address period (not shown), the discharge occurs at the Y electrode and the X electrode by the wall voltage and the Vs voltage. Thereafter, the process of applying the sustain discharge pulse to the Y electrode and the X electrode is repeated a number of times corresponding to the weight indicated by the corresponding subfield.

Next, the driving circuit for applying the sustain discharge pulse in the sustain period will be described in detail with reference to FIGS. 3 to 5. 3 to 5 illustrate only the sustain discharge driver circuit in the scan electrode driver 400 without the sustain discharge driver circuit of the sustain electrode driver 500. The switch used below is illustrated as an n-channel field effect transistor (FET) having a body diode, and may be formed of other switches having the same or similar functions. The capacitive component formed by the X electrode and the Y electrode is shown as a panel capacitor Cp.

3 is a diagram illustrating a sustain discharge driving circuit according to a first embodiment of the present invention.

As shown in FIG. 3, the sustain discharge driving circuit of the scan electrode driver 400 according to the first embodiment of the present invention includes a power recovery unit 410, a sustain discharge voltage supply unit 420, and a direct current (DC) / DC. Converter 430 and capacitor C1.

The power recovery unit 410 includes transistors Yr and Yf, an inductor L1, and diodes D1 and D2. The converter 430 is connected to the drain of the transistor Yr and the source of the transistor Yf. The second end of the inductor L1 having the first end connected to the Y electrode of the panel capacitor Cp is connected to the source of the transistor Yr and the drain of the transistor Yf. The diode D1 is for setting the rising path for increasing the voltage of the panel capacitor Cp when the transistor Yr has a body diode, and the diode D2 is Y electrode when the transistor Yf has a body diode. This is to set the falling path for lowering the voltage of. At this time, if the transistors Yr and Yf do not have a body diode, the diodes D1 and D2 may be removed. The connected power recovery unit 410 increases or decreases the voltage of the Y electrode by using the resonance of the inductor L1 and the panel capacitor Cp.

In the power recovery unit 410, the connection order between the inductor L1, the diode D1, and the transistor Yr may be changed, and the connection order between the inductor L1, the diode D2, and the transistor Yf may be changed. Can be changed. For example, the inductor L1 may be connected between the contacts of the transistors Yr and Yf and the converter 430.

In addition, although the inductor L1 is connected to the contacts of the transistors Yr and Yf in FIG. 3, the inductor may be connected to the rising path formed by the transistor Yr and the falling path formed by the transistor Yf, respectively. .

The sustain discharge voltage supply unit 420 includes two transistors Ys and Yg. Transistor Ys is connected between the power supply supplying the Vs voltage and the Y electrode of the panel capacitor Cp, and transistor Yg is connected between the power supply supplying the ground voltage 0V and the Y electrode of the panel capacitor Cp. It is connected. These transistors Ys and Yg have Vs at the Y electrode. Supply voltage and ground voltage respectively.

The DC / DC converter 430 is connected between the capacitor C1 charged with the Vs voltage and the contact of the drain of the transistor Yr and the source of the transistor Yf. The DC / DC converter 430 generates a Vs / 2 voltage from the Vs voltage charged in the capacitor C1. In general, since the power supplying the Vs voltage is also supplied through a capacitor formed in the switching mode power supply (SMPS), the power supplying the Vs voltage may be used as the capacitor C1.

4 is a diagram illustrating the DC / DC converter 430 shown in FIG. 3.

As shown in FIG. 4, the DC / DC converter 430 includes a transistor T1, a diode D3, an inductor L2, and a capacitor Ce. A source of the transistor T1 is connected to the capacitor C1, and a second end of the inductor L2 having a first end connected to the drain of the transistor T1 is connected to the capacitor Ce. The anode of the diode D3, whose cathode is connected to the contact between the transistor T1 and the inductor L2, is grounded.

When the transistor T1 is turned on, a current path is formed in the direction of the capacitor C1, the inductor L2, and the capacitor Ce, and current is injected into the inductor L2. When the transistor T1 is turned off, a current path is formed in the direction of the capacitor Ce, the inductor L2 and the diode D3 so that the current injected into the inductor L2 is discharged through the diode D3. . The repetition of this operation determines the output voltage of the DC / DC converter 430, that is, the voltage of the capacitor Ce, and the voltage is determined by the duty rate of the transistor T1. Accordingly, the DC / DC converter 430 may maintain the voltage of the capacitor Ce at a voltage Vs / 2 by adjusting the duty ratio of the transistor T1 according to the voltage state of the capacitor Ce. Although FIG. 4 illustrates a Buck (Step-down) converter, other converters may be used.

Next, a change in time series operation in the sustain period of the sustain discharge driving circuit according to the first embodiment of the present invention will be described in detail with reference to FIG. 5. The phenomenon referred to as LC resonance below is not a continuous oscillation but a change in voltage and current caused by a combination of the inductor L1 and the panel capacitor Cp occurring at the turn-on of the transistors Yr and Yf.

FIG. 5 is a diagram illustrating a current path of the driving circuit shown in FIG. 3.

First, since the transistor Yg is turned on, 0 V is applied to the Y electrode of the panel capacitor Cp, and the voltage Vs / 2 equal to 1/2 of the external applied voltage Vs is applied to the power recovery capacitor Ce. Is assumed to be charged in advance.

The transistor Yr is turned on and the transistor Yg is turned off. Then, a current path is formed by the Y electrodes of the ground terminal 0, the capacitor Ce, the transistor Yr, the diode D1, the inductor L1, and the panel capacitor Cp (①). This path (1) forms an LC resonant circuit so that the voltage at the Y electrode of the panel capacitor Cp is Vs. Increases to near voltage.

Next, transistor Ys is turned on and transistor Yf is turned off. Then, a path is formed to the Y electrode of the power supply Vs, the transistor Ys, and the panel capacitor Cp (2). The voltage Vs is applied to the Y electrode of the panel capacitor Cp by this path ②.

Transistor Ys is turned off and transistor Yf is turned on. Then, a path is formed to the Y electrode, the inductor L1, the diode D2, the transistor Yf, the capacitor Ce, and the ground terminal 0 of the panel capacitor Cp (③). By this path ③, an LC resonant circuit is formed so that the voltage charged in the panel capacitor Cp is discharged, and the voltage of the Y electrode of the panel capacitor Cp decreases to near 0V.

Subsequently, transistor Yg is turned on and transistor Yf is turned off. Then, paths of the Y electrode, the transistor Yg, and the ground terminal 0 of the panel capacitor Cp are formed (④). 0V is applied to the Y electrode of the panel capacitor Cp by this path (4).

In the normal operation as described above, the sustain discharge pulse is applied to the Y electrode by repeating the operations (1) to (4), and the sustain discharge pulse is also applied to the X electrode through the same operation in the sustain electrode driver 500.

At this time, even if the power recovery is not properly performed, even if the voltage of the power recovery capacitor (Cer) does not maintain the Vs / 2 voltage, the constant voltage (Vs / 2) is output by the DC / DC converter 230, so that the path (① ), The voltage at the Y electrode of the panel capacitor (Cp) It can increase to near voltage.

6 is a diagram illustrating a sustain discharge driving circuit according to a second embodiment of the present invention.

As shown in FIG. 6, except for the power recovery unit 410 ′, it is the same as the sustain discharge driving circuit according to the first embodiment of the present invention shown in FIG. 3. The power recovery unit 410 'includes a transistor Yer and diodes D4, D5, D6, and D7. A second end of the inductor L1 having a first end connected to the Y electrode of the panel capacitor Cp is connected to the anode of the diode D4, and an anode of the diode D6 having a cathode connected to the cathode of the diode D4 is It is connected to the power recovery capacitor (Cer). In addition, an anode of the diode D5 having a cathode connected to the second end of the inductor L1 is connected to an anode of the diode D7, and a cathode of the diode D7 is connected to a power recovery capacitor Ce. The drain of the transistor Yer is connected to the contacts of the diodes D4 and D6, and the source of the transistor Yer is connected to the contacts of the diodes D5 and D7.

The diodes D4 and D6 are for setting up a rising path for increasing the voltage of the panel capacitor Cp when the transistor Yer has a body diode, and the diodes D5 and D7 are for the transistor Yer to be a body diode. If it has, to set the falling path for lowering the voltage of the Y electrode.

The power recovery unit 410 ′ of the sustain discharge driving circuit according to the second embodiment of the present invention reduces the number of expensive transistors Yer as compared to the power recovery unit 410 shown in FIG. 3. This can reduce the circuit cost.

FIG. 7 is a diagram illustrating a current path of the sustain discharge driving circuit illustrated in FIG. 6.

The transistor Yer is turned on and the transistor Yg is turned off. Then, a current path is formed by the Y electrodes of the capacitor Ce, the diode D6, the transistor Yer, the diode D5, the inductor L1, and the panel capacitor Cp (① '). This path (①´) forms an LC resonant circuit so that the voltage at the Y electrode of the panel capacitor Cp is Vs. Increases to near voltage. Next, the transistor Ys is turned on and the transistor Yer is turned off so that the voltage Vs is applied to the Y electrode of the panel capacitor Cp by the path ②. Transistor Ys is turned off and transistor Yer is turned on. Then, paths are formed to the Y electrode, the inductor L1, the diode D4, the transistor Yer, the diode D7, and the capacitor Cer of the panel capacitor Cp (③ '). By this path ③ ', an LC resonant circuit is formed so that the voltage charged in the panel capacitor Cp is discharged so that the voltage of the Y electrode of the panel capacitor Cp decreases to near 0V. Subsequently, the transistor Yg is turned on and the transistor Yer is turned off so that 0 V is applied to the Y electrode of the panel capacitor Cp by the path ④.

Although the embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

According to the present invention, for the resonance, the voltage charged in the external capacitor can be kept constant so that no overcurrent occurs even when the switch connected to the power supply supplying the Vs voltage after the resonance in the sustain period is turned on. As a result, the switch loss can be reduced to improve the sustain discharge efficiency.

Claims (11)

Alternately applying a first voltage and a second voltage lower than the first voltage to the plurality of first electrodes and the plurality of second electrodes performing the display operation together with the plurality of first electrodes and the plurality of first electrodes. A plasma display device comprising a driving circuit, The drive circuit, A DC / DC converter including a capacitor and electrically connected to a first power supply for supplying a third voltage; and And at least one first inductor having a first end connected to the first electrode, wherein the voltage of the first electrode is increased while electrically connecting the first end of the first inductor and the first end of the capacitor. And a power recovery unit for reducing or reducing the plasma display device. The method of claim 1, The DC / DC converter, A first switch having a first end connected to the first power source, A second inductor having a first end connected to a second end of the first switch and a second end connected to the first end of the capacitor, and And a first diode having a cathode connected to the first end of the second inductor. The method of claim 2, The drive circuit, A second switch connected between a second power supply for supplying the first voltage and the first electrode, and And a third switch connected between a third power supply for supplying the second voltage and the first electrode. The method of claim 3, The power recovery unit, A fourth switch connected between the second end of the first inductor and the first end of the capacitor, and And a fifth switch connected between the second end of the first inductor and the first end of the capacitor. The method of claim 3, The power recovery unit, A second diode having an anode connected to a second end of the first inductor, A third diode having a cathode connected to the cathode of the second diode and an anode connected to the first end of the capacitor, A fourth diode having a cathode connected to the second end of the first inductor, A fifth diode having an anode connected to the anode of the fourth diode and a cathode connected to the first end of the capacitor, and And a fourth switch connected between the contact point of the second diode and the third diode and the contact point of the fourth diode and the fifth diode. The method according to any one of claims 1 to 5, And the capacitor charges an intermediate voltage between the first voltage and the second voltage. The method according to any one of claims 1 to 5, And the first power source is the same power source as the second power source. A first voltage and a second voltage lower than the first voltage are alternately applied to the first electrode of the plasma display device including a plurality of first electrodes and a second electrode performing a display operation together with the plurality of first electrodes. In the driving device to be applied, A first transistor connected between a first power supply for supplying the first voltage and the first electrode; A second transistor connected between a second power supply for supplying the second voltage and the first electrode; A DC / DC converter for outputting an intermediate voltage between the first voltage and the second voltage through an output terminal from a third power supply for supplying a third voltage; And a first inductor, electrically connecting the first inductor between the output terminal of the DC / DC converter and the first electrode to change the voltage of the first electrode from the first voltage to the second voltage. And a power recovery unit configured to change the voltage of the first electrode from the second voltage to the first voltage. The method of claim 8, The DC / DC converter, A third transistor having a first end connected to the third power source, A second inductor having a first end connected to a second end of the third transistor, A first diode having a cathode connected to the first end of the second inductor, and And a capacitor having a first end connected to a second end of the second inductor and a second end connected to an anode of the first diode. The method of claim 9, The power recovery unit, A fourth transistor connected between the first inductor and the first end of the capacitor, and And a fifth transistor connected between the first inductor and the first end of the capacitor. The method of claim 9, The power recovery unit, A second diode having an anode connected to the first inductor, A third diode having a cathode connected to the cathode of the first diode and an anode connected to the first end of the capacitor, A fourth diode to which the cathode of the first inductor is connected; A fifth diode having an anode connected to the anode of the third diode and a cathode connected to the first end of the capacitor, and And a fourth transistor connected between the contact point of the second diode and the third diode and the contact point of the fourth diode and the fifth diode.

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