KR100786872B1 - Plasma display and driving method - Google Patents

Abstract

A plasma display device and a driving method thereof are provided to decrease the cost of a sustain discharge circuit by applying sustain discharge pulses to odd-numbered and even-numbered X electrodes using a single energy recovery unit. Plural first electrodes perform a display process during a sustain period. A first transistor(Xos) is connected between a first voltage source(Vs) supplying a first voltage and a first group of first electrodes. A second transistor(Xog) is connected between a second voltage source supplying a second voltage lower than the first voltage, and a second group of first electrodes. A third transistor(X1) is connected between the first voltage source and the second group of first electrodes. A fourth transistor(X2) is connected between the second voltage source and the second group of first electrodes. A first diode(D1) is connected between the first group of the first electrodes and a first node. A second diode(D2) is connected between the first group of the first electrodes and a second node. A third diode(D3) is connected between the second group of the first electrodes and a third node. A fourth diode(D4) is connected between the second group of first electrodes and a fourth node.

Description

Plasma display device and driving method thereof {PLASMA DISPLAY AND DRIVING METHOD}

1 is a diagram illustrating a plasma display device according to an exemplary embodiment of the present invention.

2 is a view showing a driving waveform according to a first embodiment of the present invention.

3 is a diagram schematically illustrating a sustain discharge circuit 510 according to a first embodiment of the present invention.

4 is a diagram showing signal timing of the sustain discharge circuit 510 for generating the sustain discharge pulse shown in FIG.

5A to 5F are diagrams illustrating the operation of the sustain discharge circuit 510 of FIG. 3 according to the signal timing of FIG. 4, respectively.

6 illustrates a sustain discharge pulse according to a second embodiment of the present invention.

FIG. 7 is a diagram illustrating signal timing of the sustain discharge circuit 510 for generating the sustain discharge pulse shown in FIG. 6.

8A to 8D are views illustrating the operation of the sustain discharge circuit 510 of FIG. 3 according to the signal timing of FIG. 7, respectively.

TECHNICAL FIELD The present invention relates to a plasma display device and a driving method thereof, and more particularly, to an energy recovery circuit of a plasma display device.

The plasma display device is a device that displays characters or images using plasma generated by gas discharge. In the plasma display panel, dozens to millions or more of discharge cells are arranged in a matrix form according to their size. In such a plasma display device, one frame is divided into a plurality of subfields having respective weights to be driven, and gray scales are displayed by a combination of weights of subfields in which a display operation occurs among the plurality of subfields. Cells to be turned on and cells not to be turned on during the address period of each subfield are selected, and sustain discharge is performed on the cells to be turned on to actually display an image during the sustain period.

In particular, the high level voltage and the low level voltage are alternately applied to the electrode which performs the sustain discharge during the sustain period. At this time, since the two electrodes in which sustain discharge is generated serve as capacitive components, reactive power is required to apply a high level voltage or a low level voltage to the electrodes. Therefore, an energy recovery circuit for recovering and reusing reactive power is used for the sustain discharge circuit of the plasma display device. These energy recovery circuits exist separately for the two electrodes, and each energy recovery circuit is provided with a transistor and a diode for increasing the voltage of the electrode and a transistor and a diode for decreasing the voltage of the electrode, respectively.

However, in order to separate at least one electrode of two electrodes performing sustain discharge into a plurality of groups, and to independently apply a sustain discharge pulse to the electrodes of each group, an energy recovery circuit is separately connected to the electrodes of the separated group. Since it must be, the cost of the sustain discharge circuit is increased.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a plasma display device and a driving method thereof capable of reducing the unit cost of a sustain discharge circuit.

According to an aspect of the present invention, a plasma display device includes a plurality of first electrodes performing a display operation during a sustain period, a first power supply for supplying a first voltage, and a first belonging to a first group of the plurality of first electrodes. A first transistor connected between electrodes, a second power supply supplying a second voltage lower than the first voltage, and a second transistor connected between a first electrode belonging to the first group, the first power supply and the A third transistor connected between a first electrode belonging to a second group among a plurality of first electrodes, a fourth transistor connected between the second power supply and a first electrode belonging to the second group, and the first And fifth and sixth transistors respectively connected between a first electrode belonging to a group and a first electrode belonging to the second group, wherein at least one of the fifth and sixth transistors is included. It is turned on and includes an energy recovery means for changing the voltage of the first electrodes belonging to the first and second groups, respectively.

According to another aspect of the present invention, a method of driving a plasma display device including a plurality of first electrodes and a plurality of second electrodes performing a display operation during a sustain period is provided. The driving method includes applying a first voltage to a first electrode belonging to a first group among the plurality of first electrodes and a first electrode belonging to a second group among the plurality of first electrodes, respectively, and a second voltage The first end of the first electrode belonging to the first group through a first path comprising a first inductor connected to a first electrode belonging to the first group and a second end connected to the capacitor charging the A first belonging to the second group via a second path that increases a voltage and includes a second inductor coupled to the capacitor and having a first end connected to a first electrode belonging to the second group; Increasing the voltage, applying a third voltage lower than the first voltage to first electrodes belonging to the first and second groups, respectively, and through the third path including the first inductor Of the first electrode belonging to the group Reducing the pressure and, a step of reducing the voltage of the first electrode belonging to the second group through the fourth path including the second inductor.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention, and like reference numerals designate like parts throughout the specification.

Throughout the specification, when a part is "connected" to another part, this includes not only "directly connected" but also "electrically connected" with another element in between. . In addition, when a part is said to "include" a certain component, this means that it may further include other components, except to exclude other components unless otherwise stated.

In addition, the expression that the voltage is maintained throughout the specification indicates that even if the potential difference between two specific points changes over time, the change is within an allowable range in the design or the cause of the change is due to parasitic components that are ignored in the design practice of those skilled in the art. Include cases by. In addition, since the threshold voltage of a semiconductor device (transistor, diode, etc.) is very low compared to the discharge voltage, the threshold voltage is regarded as 0V and approximated.

First, a plasma display device and a driving method thereof according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.

1 is a diagram illustrating a plasma display device according to an exemplary embodiment of the present invention, and FIG. 2 is a diagram illustrating a driving waveform according to a first exemplary embodiment of the present invention.

As shown in FIG. 1, a plasma display device according to an exemplary embodiment of the present invention includes a plasma display panel 100, a controller 200, an address electrode driver 300, a scan electrode driver 400, and a sustain electrode driver 500. It includes.

The plasma display panel 100 includes a plurality of address electrodes (hereinafter referred to as "A electrodes") A1-Am extending in the column direction, and a plurality of sustain electrodes extending in pairs with each other in the row direction (hereinafter, " X electrodes "(X1-Xn) and scan electrodes (hereinafter referred to as" Y electrodes ") (Y1-Yn). In general, the X electrodes X1 to Xn are formed corresponding to the respective Y electrodes Y1 to Yn, and the display for displaying an image in the sustain period between the X electrodes X1 to Xn and the Y electrodes Y1 to Yn. Perform the action. The Y electrodes Y1-Yn and the X electrodes X1-Xn are arranged to be orthogonal to the A electrodes A1-Am. At this time, the discharge space at the intersection of the A electrodes (A1-Am) and the X and Y electrodes (X1-Xn, Y1-Yn) forms a cell (110). The structure of the plasma display panel 100 is an example, and a panel having another structure to which the driving waveform described below may be applied may also be applied to the present invention.

The controller 200 receives an image signal from the outside and outputs an address electrode driving control signal, a sustain electrode driving control signal, and a scan electrode driving control signal. The controller 200 divides and drives one frame into a plurality of subfields, and each subfield includes an address period and a sustain period.

The address electrodes, the scan electrodes, and the sustain electrode drivers 300, 400, and 500 are each of the A electrodes A1-Am, the Y electrodes Y1-Yn, and the X electrodes X1- in response to a driving control signal from the controller 200. A driving voltage is applied to Xn).

Specifically, during the address period of each subfield, the address electrode, the scan electrode, and the sustain electrode driver 300, 400, and 500 select a discharge cell to be turned on and a discharge cell not to be turned on from the plurality of discharge cells 110. . During the sustain period of each subfield, as shown in FIG. 2, the scan electrode driver 400 applies a sustain discharge pulse alternately having a high level voltage and a low level voltage (0V) to the plurality of Y electrodes Y1-Yn. The number of times corresponding to the weight of the subfield is applied. The sustain electrode driver 500 supplies sustain discharge pulses alternately having a high level voltage and a low level voltage to the odd-numbered X electrodes Xo and the even-numbered X electrodes Xe among the plurality of X electrodes X1 to Xn, respectively. It is applied in the opposite phase to the sustain discharge pulses applied to the plurality of Y electrodes Y1-Yn. In this way, the voltage difference between each Y electrode and each X electrode alternates between the Vs voltage and the -Vs voltage, so that the sustain discharge is repeated a predetermined number of times in the discharge cell to be turned on.

Next, the sustain discharge circuit which supplies the sustain discharge pulse shown in FIG. 2 is demonstrated in detail with reference to FIG.

3 is a diagram schematically illustrating a sustain discharge circuit 510 according to a first embodiment of the present invention. In FIG. 3, only the sustain discharge circuit 510 connected to the plurality of X electrodes X1 to Xn is illustrated for convenience of description, and the sustain discharge circuit 510 may be formed in the sustain electrode driver 500 of FIG. 1. have. The sustain discharge circuit 410 connected to the plurality of Y electrodes Y1-Yn may also have the same structure as the sustain discharge circuit 510 of FIG. 3, and may have a structure different from that of the sustain discharge circuit 510 of FIG. 3. It may be. In the sustain discharge circuit 510, for convenience of description, only one X electrode Xo of the odd-numbered X electrodes and only one X electrode Xe of the even-numbered X electrodes are illustrated. The capacitive component formed by the X electrode Xo and one Y electrode is illustrated as a panel capacitor Cpo, and the capacitive component formed by the X electrode Xe and the other Y electrode is represented by a panel capacitor ( Cpe).

As shown in FIG. 3, the sustain discharge circuit 510 includes transistors Xos, Xog, Xes, Xeg, X1, X2, inductors Lo and Le, diodes D1-D8 and capacitors Cs. do. In FIG. 3, the transistors Xos, Xog, Xes, Xeg, X1, and X2 are illustrated as n-channel field effect transistors, in particular, n-channel metal oxide semiconductor (NMOS) transistors, and these transistors (Xos, Xog, Xes, Xeg, In X1 and X2), a body diode may be formed from the source to the drain direction. And other transistors having similar functions instead of NMOS transistors may be used as these transistors (Xos, Xog, Xes, Xeg, X1, X2). In FIG. 3, the transistors Xos, Xog, Xes, Xeg, X1, and X2 are shown as one transistor, but the transistors Xos, Xog, Xes, Xeg, X1, and X2 are each a plurality of transistors connected in parallel. Can be formed.

3 again, a source of the transistor Xos, a drain of the transistor Xog, and a first end of the inductor Lo are connected to the X electrode Xo, and the Xes of the transistor Xes are connected to the X electrode Xe. A source, a drain of the transistor Xeg, and a first end of the inductor Le are connected. The drain of the transistor Xos and the drain of the transistor Xes are respectively connected to a power supply Vs for supplying the high level voltage Vs of the sustain discharge pulse, the source of the transistor Xog and the source of the transistor Xeg. Are respectively connected to the ground terminal for supplying the low level voltage (0V) of the sustain discharge pulse. A cathode of the diode D1 and an anode of the diode D5 are connected to the second end of the inductor Lo, and an anode of the diode D4 and a cathode of the diode D8 are connected to the second end of the inductor Le. It is connected. A cathode of the diode D2, an anode of the diode D3, an anode of the diode D6, and a cathode of the diode D7 are connected to the second end of the capacitor Cs having the first end connected to the ground terminal. . At this time, the capacitor Cs is charged with a voltage Vs / 2 corresponding to half of the high level voltage Vs and the low level voltage 0V of the sustain discharge pulse. The anode of the diode D2 is connected to the anode of the diode D1, and the cathode of the diode D6 is connected to the cathode of the diode D5. In addition, the cathode of the diode D3 is connected to the cathode of the diode D4, and the anode of the diode D7 is connected to the anode of the diode D8. The source of the transistor X1 is connected to the contact between the two diodes D1 and D2, and the drain of the transistor X1 is connected to the contact between the two diodes D3 and D4. In addition, a drain of the transistor X2 is connected to the contact between the two diodes D5 and D6, and a source of the transistor X2 is connected to the contact between the two diodes D7 and D8. Here, the inductors Lo and Le, the transistors X1 and X2, the diodes D1-D8 and the capacitor Cs operate as energy recovery means for recovering and reusing power generated by the sustain discharge pulse by resonance. The capacitor Cs operates as an energy recovery power supply Vs / 2. The diodes D1 and D3 are for setting up a rising path for increasing the voltage of the X electrode Xo when the transistor X1 is turned on, and the diodes D6 and D8 are X electrodes when the transistor X2 is turned on. It is for setting the rising path which increases the voltage of (Xe). In addition, the diodes D2 and D4 are used to set a falling path for reducing the voltage of the X electrode Xo when the transistor X1 is turned on, and the diodes D5 and D7 are X when the transistor X2 is turned on. This is for setting a falling path for reducing the voltage of the electrode Xe. Instead of the diodes D1-D8, other devices (eg, transistors) that can form the rising path and the falling path may be used.

Next, the operation of the sustain discharge circuit 510 for generating the drive waveform of FIG. 2 will be described in detail with reference to FIGS. 4 and 5A to 5F.

FIG. 4 is a signal timing diagram of the sustain discharge circuit 510 for generating the sustain discharge pulse shown in FIG. 2, and FIGS. 5A to 5F show the sustain discharge circuit of FIG. 3 according to the signal timing of FIG. 4, respectively. 510 is a view showing the operation. It is assumed that before the mode 1 M1 starts, the transistors Xog and Xeg are turned on so that a 0 V voltage is applied to the X electrodes Xo and Xe.

4 and 5A, in mode 1 M1, transistors Xog and Xeg are turned off and transistors X1 and X2 are turned on. Then, resonance occurs in the path of the ground terminal, the capacitor Cs, the diode D3, the transistor X1, the diode D1, the inductor Lo, and the panel capacitor Cpo. As a result, energy charged in the capacitor Cs is injected into the X electrode Xo through the inductor Lo, so that the voltage of the X electrode Xo increases from a voltage of 0V to a voltage of Vs. In addition, resonance occurs in the paths of the ground terminal, the capacitor Cs, the diode D6, the transistor X2, the diode D8, the inductor Le, and the panel capacitor Cpo. As a result, the energy charged in the capacitor Cs is injected into the X electrode Xe through the inductor Le so that the voltage of the X electrode Xe increases from the 0V voltage to the Vs voltage.

4 and 5B, in mode 2 M2, transistors X1 and X2 are turned off and transistors Xos and Xes are turned on. Then, the voltage Vs is applied to the X electrode Xo through the path of the power supply Vs, the transistor Xos, and the panel capacitor Cpo. The voltage Vs is also applied to the X electrode Xe through the path of the power supply Vs, the transistor Xes, and the panel capacitor Cpe.

4 and 5C, in the mode 3 M3, the transistors Xos and Xes are turned off and the transistors X1 and X2 are turned on. Then, resonance occurs through the paths of the panel capacitor Cpo, the inductor Lo, the diode D5, the transistor X2, the diode D7, the capacitor Cs, and the ground terminal. As a result, while the energy stored in the panel capacitor Cpo is recovered to the capacitor Cs through the inductor Lo, the voltage of the X electrode Xo decreases from the Vs voltage to the 0V voltage. In addition, resonance occurs in the paths of the panel capacitor Cpe, the inductor Le, the diode D4, the transistor X1, the diode D2, the capacitor Cs, and the ground terminal. As a result, while the energy stored in the panel capacitor Cpe is recovered to the capacitor Cs through the inductor Le, the voltage of the X electrode Xe also decreases from the Vs voltage to the 0V voltage.

Next, as shown in Figs. 4 and 5C, in the mode 4 M4, the transistors X1 and X2 are turned off and the transistors Xog and Xeg are turned on. Then, a voltage of 0 V is applied to the X electrode Xo through the paths of the panel capacitor Cpo, the transistor Xog, and the ground terminal, and the X electrode through the paths of the panel capacitor Cpe, the transistor Xos and the ground terminal. A voltage of 0 V is applied to (Xe).

As described above, in the first embodiment of the present invention, the mode 1 (M1) to the mode 4 (M4) are repeated the number of times corresponding to the weight of the corresponding subfield during the sustain period, so that the voltages of Vs are applied to the X electrodes Xo and Xe, respectively. Alternate voltages can be applied. At this time, in the first embodiment of the present invention, the voltage of the X electrode Xo and the voltage of the X electrode Xe are simultaneously increased, and the voltage of the X electrode Xo and the voltage of the X electrode Xe are simultaneously reduced. Alternatively, the sustain discharge pulse may be applied to the X electrode Xe in a phase opposite to that of the sustain discharge pulse applied to the X electrode Xo. Such an embodiment will be described in detail with reference to FIG. 6.

6 illustrates a sustain discharge pulse according to a second embodiment of the present invention.

As illustrated in FIG. 6, the sustain electrode driver 500 applies a first sustain discharge pulse alternately having a high level voltage and a low level voltage to the X electrode Xo among the plurality of X electrodes X1 to Xn. The first sustain discharge pulse is applied to the X electrode Xe of the plurality of X electrodes X1 to Xn in a phase opposite to that of the first sustain discharge pulse applied to the X electrode Xo. The scan electrode driver 400 applies a second sustain discharge pulse alternately having a high level voltage and a low level voltage to the plurality of Y electrodes. At this time, the second sustain discharge pulse has one period during the two periods of the first sustain discharge pulse. Even in this case, the voltage difference between each Y electrode and each X electrode alternates between the Vs voltage and the -Vs voltage, whereby sustain discharge occurs repeatedly a predetermined number of times in the discharge cell to be turned on. The voltage of the X electrode Xe is reduced from the high level voltage to the low level voltage while the voltage of the X electrode Xo is increased from the low level voltage to the high level voltage, and the voltage of the X electrode Xo is reduced to the high level voltage. The voltage of the X electrode Xe may be increased from the low level voltage to the high level voltage while decreasing to the low level voltage at. In this way, the holding period can be shortened.

Meanwhile, the plurality of Y electrodes are divided into odd-numbered Y electrodes and even-numbered Y electrodes, and the scan electrode driver 400 has a phase opposite to that of the sustain discharge pulses applied to the X electrodes Xo with the sustain discharge pulses applied to the odd-numbered Y electrodes. In addition, the sustain discharge pulse may be applied to the even-numbered Y electrode in a phase opposite to that of the sustain discharge pulse applied to the X electrode Xe.

Next, the operation of the sustain discharge circuit 510 for generating the drive waveform of FIG. 6 will be described in detail with reference to FIGS. 7, 8A to 8D.

7 is a diagram illustrating signal timing of the sustain discharge circuit 510 for generating the sustain discharge pulse illustrated in FIG. 6, and FIGS. 8A to 8D are diagrams illustrating the sustain discharge circuit of FIG. 3 according to the signal timing of FIG. 7, respectively. 510 is a view showing the operation. It is assumed that the transistors Xog and Xes are turned on before the mode 1 M1 ′ is started so that a voltage of 0 V is applied to the X electrode Xo and a voltage Vs is applied to the X electrode Xe.

As shown in FIGS. 7 and 8A, in mode 1 M1 ′, transistors Xog and Xes are turned off, transistor X1 is turned on, and panel capacitor Cpe, inductor Le, and diode ( The energy stored in the panel capacitor Cpe is injected into the panel capacitor Cpo through the path of the D4), the transistor X1, the diode D1, the inductor LO, and the panel capacitor Cpo, and thus the X electrode Xe. And the voltage of the X electrode Xo is increased.

7 and 8B, in mode 2 M2 ′, transistor X1 is turned off and transistors Xos and Xeg are turned on to power supply Vs, transistor Xos, and panel. The Vs voltage is applied to the X electrode Xo through the path of the capacitor Cpo, and the 0V voltage is applied to the X electrode Xe through the path of the panel capacitor Cpe, the transistor Xeg, and the ground terminal.

Next, as illustrated in FIGS. 7 and 8C, in the mode 3 M3 ′, the transistors Xos and Xeg are turned off, and the transistor X2 is turned on to display the panel capacitor Cpo, the inductor Lo, Energy stored in the panel capacitor Cpo is injected into the panel capacitor Cpe through the paths of the diode D5, the transistor X2, the diode D8, the inductor Le, and the panel capacitor Cpe. The voltage of Xo is decreased, and the voltage of the X electrode Xe is increased.

7 and 8D, in mode 4 M4 ′, transistor X2 is turned off, transistors Xog and Xes are turned on, and panel capacitor Cpo, transistor Xog, and the like. The 0V voltage is applied to the X electrode Xo through the path of the ground terminal, and the Vs voltage is applied to the X electrode Xe through the path of the power supply Vs, the transistor Xes, and the panel capacitor Cpe.

Although the embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

As described above, since the sustain discharge pulses corresponding to the odd-numbered X electrodes and the even-numbered X electrodes can be applied as one energy recovery means, the odd-numbered X electrodes and the even-numbered X electrodes are independently driven. In this case, the unit cost of the sustain discharge circuit can be reduced.

Claims (13)

A plurality of first electrodes performing a display operation during the sustain period; A first transistor connected between a first power supply for supplying a first voltage and a first electrode belonging to a first group of the plurality of first electrodes, A second transistor connected between a second power supply for supplying a second voltage lower than the first voltage and a first electrode belonging to the first group; A third transistor connected between the first power supply and a first electrode belonging to a second group of the plurality of first electrodes, A fourth transistor connected between the second power supply and a first electrode belonging to the second group, and A first diode connected between a first electrode belonging to the first group and a first node, A second diode connected between a first electrode belonging to the first group and a second node, A third diode connected between a first electrode belonging to the second group and a third node, and A fourth diode connected between a first electrode belonging to the second group and a fourth node Including; Increasing the voltage of the first electrode belonging to the first group and decreasing the voltage of the first electrode belonging to the second group between the first node and the third node, And dropping the voltage of the first electrode belonging to the first group and increasing the voltage of the first electrode belonging to the second group between the second node and the fourth node. The method of claim 1, A fifth diode connected between the first node and a third power supply for supplying a third voltage between the first voltage and the second voltage, A sixth diode connected between the second node and the third power source, A seventh diode connected between the third node and the third power source, and An eighth diode connected between the fourth node and the third power source Plasma display device further comprising. The method of claim 2, A first inductor having a first end connected to a first electrode belonging to the first group and a second end connected to the first diode and a second diode, respectively; and A second inductor having a first end connected to a first electrode belonging to the second group and a second end connected to the third diode and the fourth diode, respectively; Plasma display device further comprising. The method according to any one of claims 1 to 3, A fifth transistor connected between the first node and the third node, and A sixth transistor connected between the second node and the fourth node Plasma display device further comprising. The method of claim 4, wherein The fifth and sixth transistors are turned on during a first period, the first and third transistors are turned on during a second period, and the fifth and sixth transistors are turned on during a third period. And a controller configured to turn on the second and fourth transistors during a fourth period of time. Plasma display device further comprising. The method of claim 5, And a plurality of second electrodes performing a display operation together with the plurality of first electrodes. The second display device applies the second voltage to the plurality of second electrodes during at least a portion of the second period, and the first display device applies the first voltage to the plurality of second electrodes during at least a portion of the fourth period. . delete The method of claim 4, wherein The fifth transistor is turned on for a first period, the first and fourth transistors are turned on for a second period, the sixth transistor is turned on for a third period, and a fourth A controller configured to turn on the second and third transistors during a period of time Plasma display device further comprising. The method of claim 8, And a plurality of second electrodes performing a display operation together with the plurality of first electrodes. And the first voltage or the second voltage is applied to the plurality of second electrodes during the first to fourth periods. A method of driving a plasma display device including a plurality of first electrodes and a plurality of second electrodes performing a display operation during a sustain period, the method comprising: Providing first and second transistors, During the first period, the first transistor is turned on to electrically connect a capacitor charging the first voltage and a first inductor connected to a first electrode belonging to a first group of the plurality of first electrodes. The voltage of the first electrode belonging to one group is increased, and the second transistor is turned on to electrically connect the capacitor and a second inductor connected to a first electrode belonging to a second group of the plurality of first electrodes. Increasing the voltage of the first electrode belonging to the second group, and During the second period, the first transistor is turned on to electrically connect the capacitor and the second inductor to gradually decrease the voltage of the first electrode belonging to the second group, and the second transistor is turned on to turn the capacitor. Electrically connecting the first inductor to gradually reduce a voltage of a first electrode belonging to the first group; Method of driving a plasma display device comprising a. The method of claim 10, Applying a second voltage lower than the first voltage to first electrodes belonging to the first and second groups, respectively, before the first period, and Applying a third voltage higher than the first voltage to first electrodes belonging to the first and second groups between the first period and the second period. More, And the first voltage is an intermediate voltage between the second voltage and the third voltage. delete The method of claim 11, The third voltage is applied to the plurality of second electrodes while the second voltage is applied to the first electrodes belonging to the first and second groups. And the second voltage is applied to the plurality of second electrodes while the third voltage is applied to first electrodes belonging to the first and second groups.

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