KR20060127353A - Shallow trench isolation of semiconductor device and method for thereof - Google Patents

Abstract

A semiconductor device and its manufacturing method are provided to improve the productivity by simplifying manufacturing processes and to restrain a leakage current by preventing the generation of moat. A trench(30) is formed within an isolation region of a semiconductor substrate(10). A nitride pattern(40') with a predetermined thickness is formed along an inner surface of the trench. An insulating layer(50) is completely filled in the trench. The trench has a vertical profile. The predetermined thickness of the nitride pattern is in the range of 1500 to 2000 angstrom. The nitride pattern is formed along an inner wall of the trench.

Description

Shallow trench isolation of semiconductor device and method for manufacturing thereof

1 is a cross-sectional view showing a method of manufacturing a shallow trench isolation according to the prior art.

2 is a cross-sectional view schematically illustrating a process of forming a mask film pattern on a semiconductor substrate according to an embodiment of the present invention.

3 is a cross-sectional view schematically illustrating a step of forming a trench according to an embodiment of the present invention.

4 is a cross-sectional view schematically illustrating a process of forming a nitride film inside the trench sidewalls according to an exemplary embodiment of the present invention.

5 is a cross-sectional view schematically illustrating a process of forming an insulating film filling a trench according to an embodiment of the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing shallow trench isolation (hereinafter referred to as 'STI'), which can improve productivity and device characteristics, and a shallow manufactured by the method. Trench element isolation.

As the development of semiconductor device manufacturing technology and its application fields expand, research and development on the increase in the degree of integration of semiconductor devices has been rapidly developed. Since the research on the miniaturization process of the device has been pushed forward, in the technology of miniaturization of the semiconductor device, in order to integrate the device, the manufacturing technology of the device isolation film separating the devices has emerged as one of the important items.

Conventional device isolation techniques include LOCOS (LOCal Oxidation of Silicon) technology, which selectively grows thick oxide films on semiconductor substrates to form device isolation films. Due to the bird's beak in which the oxide film is formed, there is a limit in reducing the size of the device isolation layer.

Therefore, a new device isolation technique is required because the locus technique cannot be applied to a semiconductor device having a device design dimension that is reduced to submicron or less, and such a device isolation technique forms a trench in the semiconductor substrate by an etching process. There is a shallow trench isolation (STI) process that fills the trench with insulating material.

Here, the above-mentioned STI is usually manufactured by the following manufacturing method.

First, a pad oxide film and a pad nitride film are sequentially stacked on the semiconductor substrate to a predetermined thickness, a mask film pattern defining semiconductor device isolation is formed on the nitride film, and the pad nitride film and the pad oxide film are patterned using the mask film pattern as a mask. The semiconductor substrate is etched to a predetermined depth.

After the trench is formed in accordance with the above-described method, the mask layer pattern on the pad nitride film is removed, and the semiconductor substrate is thermally oxidized to form a liner oxide film. Then, an insulating film is deposited on the entire upper surface of the trench to form a trench. After filling, the gap fill insulating film and the liner oxide film are removed by chemical mechanical polishing (CMP), the nitride film is removed by a predetermined thickness, the remaining nitride film is removed by wet etching, and the pad oxide film is cleaned. Remove

However, according to the above-described STI manufacturing method, the inside of the substrate is further oxidized by a process of depositing an insulating film in the trench or subsequent heat treatment, which causes the edge pad oxide film of the active region to be pushed into the active region rather than the pad nitride film. Entering phenomenon occurs, and thus there is a problem that damage such as dislocation occurs in the crystal structure of the substrate.

Therefore, when embedding an insulating film such as USG (Undoped Silicate Glass) or a high density plasma oxide (H: High Density Plasma) in the trench, a shadow effect that reduces the density of the pad oxide film at the edge of the active region ) Is generated.

In addition, the pad oxide film having a weak edge portion is quickly etched during various cleaning processes and wet etching processes to form a moat. By the way, since the mote acts as an important cause of the hump (hump) phenomenon, it is an element to be removed.

To this end, conventionally, after forming the trench 110 in the semiconductor substrate 100 by a pull-back process as shown in FIG. 1, only the pad oxide layer 130 under the pad nitride layer 120 is formed. Wet etching eliminates the generation of motes.

In FIG. 1, reference numeral 140 denotes an insulating film filled in the trench.

However, in the conventional STI manufacturing method, forming the pad oxide film 130 on the semiconductor substrate 100, forming the pad nitride film 120 on the pad oxide film 130, and forming a mask film pattern on the pad nitride film 120. (Not shown), forming the trench 110 by performing an etching process using the mask layer pattern, filling the trench 110 with the insulating layer 140, and planarizing the buried insulating layer 140. Since the STI is manufactured according to the step and the step of removing the pad nitride film 120 and the pad oxide film 130, there are many process steps, there is a problem that the productivity is low.

Therefore, there is a demand for an STI manufacturing method capable of improving productivity while preventing mott generation.

The technical problem to be achieved by the present invention is to provide an STI manufacturing method that can improve the productivity by reducing the process step, and can prevent the generation of mort.

Another object of the present invention is to provide an STI of a semiconductor device manufactured by the above-described manufacturing method.

Embodiment of the present invention for the above technical problem,

Trenches formed in device isolation regions of the semiconductor substrate;

A nitride film pattern formed to a predetermined thickness in the sidewalls of the trench; And

An insulating film gap-filled in the trench between the nitride film patterns

It provides an STI of a semiconductor device comprising a.

Here, the sidewalls of the trench are formed in a vertical profile, the nitride film pattern is formed to a thickness of 1500 ~ 2000Å.

STI in this configuration,

Forming a mask film pattern on the semiconductor substrate exposing the device isolation region;

Forming a trench by etching the semiconductor substrate using the mask layer pattern as a mask;

Forming a nitride film pattern having a predetermined thickness inside the sidewalls of the trench; And

Filling the trench with an insulating layer

It provides an STI manufacturing method comprising a.

The mask layer pattern may be formed by exposing and developing the photoresist layer.

In addition, the nitride film pattern is preferably formed to a thickness of 1500 ~ 2000Å.

In addition, the nitride film pattern is formed by forming a nitride film with a predetermined thickness on the upper surface of the semiconductor substrate including the trench, and etching to leave the nitride film pattern only inside the sidewalls of the trench.

According to the STI manufacturing method of such a structure, the trench formed in the semiconductor substrate,

While effectively preventing the generation of the mott at the silicon interface due to the continuous cleaning process has the effect of reducing the number of process steps to improve productivity.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 to 5 are cross-sectional views illustrating an STI manufacturing method according to an embodiment of the present invention.

2 illustrates a step of forming a mask layer pattern 20 on a semiconductor substrate 10. The semiconductor substrate 10 may be a silicon substrate, and the mask layer pattern 20 may be formed by exposing and developing the photosensitive layer. The mask layer pattern 20 is formed to expose the device isolation region of the semiconductor substrate 10 and cover the active region.

Next, as shown in FIG. 3, an anisotropic etching process is performed using the mask layer pattern 20 as a mask to selectively remove the semiconductor substrate 10 in the device isolation region to form the trench 30 having sidewalls of the vertical profile. do.

Subsequently, as shown in FIG. 4, the mask film pattern 20 is removed, and the nitride film 40 is formed on the upper surface of the semiconductor substrate 10 including the trench 30 at a predetermined thickness, for example, a thickness of 1500 to 2000 GPa. The deposition process is performed to etch the nitride layer pattern 40 ′ only in the sidewalls of the trench 30.

Here, the nitride film pattern 40 'prevents the generation of morts during the cleaning process, and in order to effectively prevent the generation of mort, it is preferable to form the thickness of 1500 ~ 2000Å.

Subsequently, as shown in FIG. 5, a gap fill is performed in the trench 30 with the insulating film 50, and then the planarization process is performed to complete the STI manufacturing. In this case, a silicon oxide layer may be used as the insulating film 50.

In FIG. 5, reference numeral 60 denotes a gate oxide film, and reference numeral 70 denotes a gate poly.

As mentioned above, although the present invention has been described through specific embodiments, the present invention may be modified in various forms by those skilled in the art within the technical spirit of the present invention.

According to the present invention described above, it is possible to reduce the process steps for manufacturing the STI can be improved productivity, there is an effect that can suppress the current leakage to improve the device characteristics by preventing the generation of the mote.

Claims (7)

Trenches formed in device isolation regions of the semiconductor substrate; A nitride film pattern formed to a predetermined thickness in the sidewalls of the trench; And An insulating film gap-filled in the trench between the nitride film patterns Shallow trench device isolation of the semiconductor device comprising a. The method of claim 1, The trench is shallow trench isolation of a semiconductor device, characterized in that the sidewalls are formed in a vertical profile. The method according to claim 1 or 2, The nitride layer pattern is shallow trench isolation of a semiconductor device, characterized in that formed to a thickness of 1500 ~ 2000Å. Forming a mask film pattern on the semiconductor substrate exposing the device isolation region; Forming a trench by etching the semiconductor substrate using the mask layer pattern as a mask; Forming a nitride film having a predetermined thickness inside the sidewall of the trench; And Filling the trench with an insulating layer Shallow trench device isolation manufacturing method comprising a. The method of claim 4, wherein The nitride layer pattern may be formed by forming a nitride layer having a predetermined thickness on the upper surface of the semiconductor substrate including the trench, and etching to leave the nitride layer pattern only inside the sidewalls of the trench. The method according to claim 4 or 5, And the nitride film is formed to a thickness of 1500 ~ 2000 형성. The method of claim 6, And the mask layer pattern is formed by exposing and developing a photoresist layer.

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