KR20060103762A - Wafer flat zone aligner having detecting function for wafer chipping - Google Patents

Abstract

The present invention relates to a wafer flat zone aligner having a wafer chipping detection function, comprising: a housing on which a wafer cassette on which a plurality of wafers are stacked is mounted; It is provided in the upper center of the housing in the longitudinal direction of the wafer cassette, and provided with a plurality of protrusions forming a plurality of slots for inserting a portion of the edge portion of each wafer, both sidewalls of the protrusions and the bottom of the slot A wafer sensing unit installed in the unit and having a wafer chipping detecting means for detecting chipping formed at the wafer edge; And a set of rotating rollers installed on both sides of the wafer sensing unit to be partially exposed from the upper surface of the housing to rotate the wafer in contact with the outer circumferential surface of the wafer. Provide John Aligner.

According to the present invention, the inspection of the presence of wafer chipping is performed at the same time during the wafer flat zone alignment, thereby minimizing the process time and manufacturing cost required for semiconductor manufacturing, By early detection of a wafer that is present, there is an advantage in that semiconductor wafer yield and productivity can be improved by preventing contamination of other wafers and other process equipments caused by wafer breakage.

Wafer, Flat Zone, Align, Chipping

Description

Wafer flat zone aligner with wafer chipping detection {WAFER FLAT ZONE ALIGNER HAVING DETECTING FUNCTION FOR WAFER CHIPPING}

1 is a perspective view schematically showing an embodiment of a wafer flat zone aligner with a wafer chipping detection function according to the present invention.

FIG. 2 is a partially enlarged perspective view of the wafer sensing unit of FIG. 1.

3 is an explanatory diagram for explaining the operation of the wafer chipping detecting means and the wafer counter of FIG.

4A and 4B are explanatory diagrams for explaining a wafer flat zone alignment process.

** Description of the symbols for the main parts of the drawings **

110 housing 120 wafer cassette guide piece

130: rotating roller 140: wafer sensing unit

141: protrusion 143: wafer counter

145: first sensor 147: second sensor

149: third sensor 150: wafer chipping detection means

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wafer flat zone aligner, and more particularly, to a wafer flat zone aligner having a wafer chipping detection function capable of detecting chipping generated at a wafer edge portion during a semiconductor manufacturing process.

Wafer flat zone aligner is a facility that generally aligns a wafer to have a predetermined direction by using a flat zone formed by cutting a portion of the circumference of the wafer into an arc shape. Such a wafer flat zone aligner rotates in a wafer cassette by contacting a rotating roller with a plurality of wafers stored in a state where the flat zone is not aligned with the wafer cassette, and the point of time when the flat zone of the wafer is aligned and does not contact the rotating roller. Make sure the flat zones are aligned at. In addition, the wafer flat zone aligner may be provided with a wafer counter for measuring the number of wafers loaded and aligned in the wafer cassette.

On the other hand, a silicon wafer is used as a substrate used for semiconductor manufacturing, and such a silicon wafer is repeatedly formed on a wafer by repeatedly performing a plurality of processes for manufacturing a semiconductor, for example, a photo, etching, diffusion, and thin film process. It goes through a FAB (fabrication) process to form an electrical circuit pattern.

On the other hand, since the silicon wafer is exposed to frequent collisions, severe temperature changes, and pressure changes during the above-described processes, chipping, which is a phenomenon in which the edge of the wafer is minutely broken, frequently occurs.

However, such a silicon wafer has a problem of being fragile even with very small chipping generated at the wafer edge due to the inherent lattice structure and thin thickness of silicon. On the other hand, since a silicon wafer having such a chipping defect is very weak to thermal stress, a diffusion furnace is usually used to grow an oxide film, which is used as an insulator, on a silicon wafer. Especially fragile within.

If the wafer is broken in the diffusion furnace due to the chipping defects described above, not only the other wafers in the diffusion furnace can be contaminated, but also the diffusion furnace itself must be contaminated and cleaned, which significantly affects semiconductor manufacturing yield and productivity. Will cause.

Recently, research on a wafer edge defect inspection apparatus for detecting chipping defects occurring at the above-described wafer edge portion has been actively conducted. As an example, a Korean-patent patent that has an illumination device and an image pickup device installed on an upper surface of a wafer cassette at a predetermined angle, and processes image information captured by the image pickup device through an image processing means so as to inspect chipping occurring on a wafer. 1998-0026975 is disclosed.

However, such a wafer edge defect inspection apparatus is a facility for performing inspection only on whether chipping occurred on a wafer independently. Since the wafer edge defect inspection apparatus must be installed separately, the wafer in the manufacturing process should be moved to the separate inspection facility for inspection. Therefore, not only the original manufacturing process is not continuously performed, but also the manufacturing cost increases according to the provision of the inspection equipment necessary to perform such inspection separately, and the whole process due to the time required to move to a separate equipment for inspection. There is a delay problem.

In addition, the conventional wafer flat zone aligner has only a wafer flat zone align and a wafer number measuring function, but does not have a function for detecting wafer chipping occurring on the wafer.

The present invention has been made to overcome the disadvantages of the prior art as described above, and has a wafer chipping detection function that can detect the chipping (chipping) generated in the wafer edge portion during the semiconductor manufacturing process, to provide a semiconductor flat zone alignment It is a technical problem to provide a wafer flat zone aligner which can simultaneously check wafer chipping.

Wafer flat zone aligner with a wafer chipping detection function according to the present invention for achieving the above technical problem, the housing is a wafer cassette on which a plurality of wafers are stacked; It is provided in the upper center of the housing in the longitudinal direction of the wafer cassette, and provided with a plurality of protrusions forming a plurality of slots for inserting a portion of the edge portion of each wafer, both sidewalls of the protrusions and the bottom of the slot A wafer sensing unit installed in the unit and having a wafer chipping detecting means for detecting chipping formed at the wafer edge; And a set of rotating rollers installed on both sides of the wafer sensing unit so as to be partially exposed from the upper surface of the housing to contact the outer circumferential surface of the wafer to rotate the wafer.

That is, the wafer flat zone aligner according to the present invention has a wafer chipping detection function that can detect chipping generated at the wafer edge portion during the semiconductor manufacturing process, thereby determining whether the wafer is chipped during wafer flat zone alignment. Allow the test to be done at the same time. Therefore, it is possible to reduce the cost of installing a separate independent equipment for wafer chipping inspection, and to shorten the process time for semiconductor manufacturing. In addition, it is possible to improve the semiconductor manufacturing yield and productivity by early detection of wafers with chipping defects, thereby preventing contamination of other wafers and contamination of other process equipments caused by wafer breakage.

Preferably, the wafer chipping detecting means is provided on both sidewalls of the protruding pieces to respectively detect chippings formed at the front edges of the wafer and chippings formed at the rear edges of the wafer. A sensor, a second sensor and a third sensor installed in the bottom of the slot to detect the chipping formed on the outer peripheral surface of the wafer.

In addition, preferably, the protrusion may be provided with a wafer counter composed of a light emitting unit and a light receiving unit for measuring the number of wafers.

In addition, a wafer cassette guide piece may be additionally installed at the top of the housing to guide the seating of the wafer cassette in position.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the wafer flat zone aligner with a wafer chipping test function according to the present invention.

1 is a perspective view schematically showing an embodiment of a wafer flat zone aligner having a wafer chipping detection function according to the present invention, and FIG. 2 is a partially enlarged perspective view of the wafer sensing unit of FIG. 1.

1 and 2, the wafer flat zone aligner 100 having the wafer chipping detection function according to an embodiment of the present invention is largely a housing 110, a wafer sensing unit 140, a set of It is configured to include a rotating roller (130).

The wafer cassette 10 is seated on the upper portion of the housing 110, and a plurality of wafers W in which the flat zone is not aligned are accommodated in the wafer cassette 10. On the upper part of the housing 110, a wafer cassette guide piece 120 is installed to guide the seating of the wafer cassette 10 in position. The wafer cassette guide pieces 120 are formed to each other by the width of the wafer cassette 10 to be seated. The wafer cassette 10 is spaced apart in the longitudinal direction. In addition, since the wafer cassette guide piece 120 has an inclined surface formed with a predetermined angle of inclination toward the upper center of the housing 110, the lower edge of the longitudinal side of the wafer cassette 10 to be seated slides on the inclined surface. Induce it to be easily seated in place.

Meanwhile, the wafer sensing unit 140 is installed in the upper center of the housing 110 in the longitudinal direction of the wafer cassette 10 to be seated. 2, the wafer sensing unit 140 may include a plurality of protrusions forming a plurality of slots into which a portion of an edge portion of each of the plurality of wafers W accommodated in the wafer cassette 10 is inserted. 141).

The wafer sensing unit 140 is provided with wafer chipping detection means 150 for detecting chipping generated at the wafer edge portion during the semiconductor manufacturing process. The wafer chipping detecting means 150 includes a first sensor 145 and a second sensor 147 for detecting chipping of the front and rear edges of the wafer W, respectively, and a wafer. And a third sensor 149 for detecting chipping formed on the outer peripheral surface of the edge (W).

In this case, the first sensor 145 is installed on one side wall of the protrusion piece 141 formed on the wafer sensing unit 140, and the second sensor 147 is installed on the other side wall of the protrusion piece 141. . In addition, the third sensor 149 is installed at the bottom of the slot formed by the protrusion 141.

The first, second, and third sensors 145, 147, and 149 use optical sensors capable of measuring a change in wavelength of light reflected from an object by emitting light to the front. In some cases, an image sensor using an imaging device may be used.

Meanwhile, the wafer sensing unit 140 is provided with a wafer counter 143 for measuring the number of wafers on which the flat zone alignment is performed. The wafer counter 143 uses an optical sensor composed of a light emitting unit 143a and a light receiving unit 143b, and a light emitting unit 143a is installed on an upper surface of one side of the protruding piece 141 and is opposed to the light receiving unit (143). 143b) is installed.

3 is an explanatory diagram for explaining the operation of the wafer chipping detecting means and the wafer counter of FIG. 2.

First, the operation of the wafer counter 143 will be described with reference to FIGS. 1 to 3. When the wafer cassette 10 in which the plurality of wafers W are accommodated for flat zone alignment is seated on the upper portion of the housing 110, a portion of the edge portion of the wafer W may be provided in the wafer sensing unit 140. It is inserted into a slot formed by a plurality of protruding pieces 141.

Then, the light emitted from the light emitting unit 143a of the wafer counter 143 is blocked by the wafer W, so that the light receiving unit 143b can no longer receive the light, thereby allowing the wafer to exist in the slot. (W) will be measured. This operation is performed in all slots formed in the wafer sensing unit 140, so that the total number of wafers W on which the flat zone alignment is to be performed can be measured.

Next, the operation of the wafer chipping detecting means 150 will be described. After the measurement of the number of wafers W described above is performed, when a set of rotating rollers 130 starts to rotate for the wafer flat zone alignment to be described later, the wafers W in contact with the rotating rollers 130 accordingly. ) Will also rotate. In this case, the first sensor 145 provided in the wafer sensing unit 140 emits light at the front edge of the wafer W and reflects it from the front edge of the wafer W as an object. Measure the change in wavelength of light. The measurement at this time is performed in the state in which the wafer W is rotated by a set of rotating rollers 130 and thus is performed over the entire front edge portion of the wafer W.

If there is chipping, which is a part that is slightly broken at a predetermined portion of the front edge portion of the wafer W, the wavelength of the light reflected from the portion is equal to the wavelength of the light reflected from another portion without chipping. You will see a difference. Therefore, it is possible to detect the presence of chipping by measuring the change in the wavelength.

Similarly, the second sensor 147 included in the wafer sensing unit 140 may emit light on the edge of the rear surface of the wafer W, and the third sensor 179 may emit light on the outer peripheral surface of the edge of the wafer W, respectively. By measuring the change in the wavelength of the light emitted and reflected back, the chipping present on the rear edge of the wafer W and the outer circumferential surface of the wafer W is sensed.

As such, when it is detected that the chipping exists in the predetermined wafer through the wafer chipping detecting means 150, a display unit such as a monitor displays the position of the slot in which the predetermined wafer in which the chipping exists exists under the control of a central processing unit (not shown). It can be output to (not shown). In addition, in some cases, an alarm may be additionally alerted to the worker. Therefore, according to the present invention, it is possible to improve the semiconductor manufacturing yield and productivity by early detection of a wafer having a chipping defect to prevent contamination of other wafers or contamination of other process equipments caused by the wafer being broken.

4A and 4B are explanatory diagrams for explaining a wafer flat zone alignment process, and a wafer flat zone alignment process will be described with reference to FIGS. 4A and 4B.

As shown in FIG. 4A, when the wafer cassette 10 in which the plurality of wafers W, in which the flat zone F is not aligned, is placed on the upper portion of the housing 10, first, the wafer sensing unit 140 may be formed. After the number of wafers W has been measured through the wafer counter 143 (see FIG. 2), the wafer W is rotated in the wafer cassette 10 as the rotary roller 130 rotates clockwise. It rotates counterclockwise at a constant speed.

As the wafer W continues to rotate and the flat zone F formed on the wafer W is positioned directly above the set of rotating rollers 130, the outer circumferential surface of the wafer W is no longer the set of rotating rollers. By not coming into contact with 130, the rotational force is not received. As a result, the wafer W can no longer rotate, and as a result, the flat zone F is aligned as shown in FIG. 4B.

As described above, the wafer flat zone aligner according to an embodiment of the present invention is equipped with a wafer chipping detection function to simultaneously check whether wafer wafering is present in the process of performing wafer flat zone alignment.

As described above, in the detailed description of the present invention has been described with respect to preferred embodiments of the present invention, those skilled in the art to which the present invention pertains various modifications without departing from the scope of the present invention Of course it is possible. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be defined not only by the claims below, but also by the equivalents of the claims.

According to the present invention having the configuration as described above, because the inspection of the presence of the wafer chipping is performed at the same time in the process of performing the wafer flat zone alignment can minimize the process time and manufacturing cost required for semiconductor manufacturing In addition, there is an advantage of improving the semiconductor manufacturing yield and productivity by early detection of a wafer having a chipping defect to prevent contamination of other wafers or contamination of other process equipments caused by wafer breakage.

Claims (4)

A housing on which a wafer cassette on which a plurality of wafers are stacked is mounted; It is provided in the upper center of the housing in the longitudinal direction of the wafer cassette, and provided with a plurality of protrusions forming a plurality of slots for inserting a portion of the edge portion of each wafer, both sidewalls of the protrusions and the bottom of the slot A wafer sensing unit installed in the unit and having a wafer chipping detecting means for detecting chipping formed at the wafer edge; And A wafer flat zone having a wafer chipping detection function is provided on both sides of the wafer sensing unit to partially expose from the upper surface of the housing to rotate in contact with the outer circumferential surface of the wafer. Aligner. The method of claim 1, The wafer chipping detecting means may be provided on both sidewalls of the protruding pieces to respectively detect chippings formed at front edges of the wafer and chippings formed at rear edges of the wafer; A wafer flat zone aligner having a wafer chipping detection function comprising a second sensor and a third sensor installed at a bottom of the slot to sense chipping formed on an outer circumferential surface of the wafer. The method of claim 1, And a wafer counter comprising a light emitting unit and a light receiving unit for measuring the number of wafers is provided on the protruding piece. The method of claim 1, The wafer flat zone aligner with a wafer chipping detection function is further provided on the upper portion of the housing is further provided with a wafer cassette guide piece for inducing the fixed position of the wafer cassette.

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