KR20060002953A - 복조 신호의 dc 오프셋 전압 수정 방법 및 수신기 - Google Patents
복조 신호의 dc 오프셋 전압 수정 방법 및 수신기 Download PDFInfo
- Publication number
- KR20060002953A KR20060002953A KR1020057019079A KR20057019079A KR20060002953A KR 20060002953 A KR20060002953 A KR 20060002953A KR 1020057019079 A KR1020057019079 A KR 1020057019079A KR 20057019079 A KR20057019079 A KR 20057019079A KR 20060002953 A KR20060002953 A KR 20060002953A
- Authority
- KR
- South Korea
- Prior art keywords
- offset voltage
- signal
- demodulated signal
- subtracting
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000012937 correction Methods 0.000 title claims abstract description 22
- 238000000034 method Methods 0.000 title claims description 19
- 238000011084 recovery Methods 0.000 claims abstract description 5
- 238000005259 measurement Methods 0.000 claims description 21
- 238000001914 filtration Methods 0.000 claims description 6
- 230000008054 signal transmission Effects 0.000 claims description 3
- 230000005540 biological transmission Effects 0.000 claims description 2
- 238000006243 chemical reaction Methods 0.000 abstract description 4
- 230000003111 delayed effect Effects 0.000 abstract 1
- 230000000694 effects Effects 0.000 description 3
- 238000012935 Averaging Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/061—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of DC offset
- H04L25/063—Setting decision thresholds using feedback techniques only
- H04L25/064—Subtraction of the threshold from the signal, which is then compared to a supplementary fixed threshold
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Dc Digital Transmission (AREA)
- Circuits Of Receivers In General (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GBGB0308168.4A GB0308168D0 (en) | 2003-04-09 | 2003-04-09 | Receiver having DC offset voltage correction |
| GB0308168.4 | 2003-04-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20060002953A true KR20060002953A (ko) | 2006-01-09 |
Family
ID=9956462
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020057019079A Withdrawn KR20060002953A (ko) | 2003-04-09 | 2004-03-30 | 복조 신호의 dc 오프셋 전압 수정 방법 및 수신기 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US20070177692A1 (enExample) |
| EP (1) | EP1616421A1 (enExample) |
| JP (1) | JP2006523059A (enExample) |
| KR (1) | KR20060002953A (enExample) |
| CN (1) | CN1768515A (enExample) |
| GB (1) | GB0308168D0 (enExample) |
| TW (1) | TW200501602A (enExample) |
| WO (1) | WO2004091160A1 (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8195096B2 (en) | 2006-07-13 | 2012-06-05 | Mediatek Inc. | Apparatus and method for enhancing DC offset correction speed of a radio device |
| TWI330026B (en) * | 2007-04-02 | 2010-09-01 | Realtek Semiconductor Corp | Receiving system and related method for calibrating dc offset |
| CN101453229B (zh) * | 2007-11-28 | 2013-07-03 | 瑞昱半导体股份有限公司 | 用以校正直流偏移的接收系统及其相关方法 |
| JP2013222402A (ja) * | 2012-04-18 | 2013-10-28 | Nippon Reliance Kk | オフセット調整回路及びプログラム |
| JP6939660B2 (ja) * | 2018-03-13 | 2021-09-22 | トヨタ自動車株式会社 | 車両走行制御システム |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE69221753T2 (de) * | 1991-03-15 | 1998-02-26 | Philips Electronics Nv | Datenempfänger mit einer Regelschleife mit verringerter Abtastfrequenz |
| GB2274759B (en) * | 1993-02-02 | 1996-11-13 | Nokia Mobile Phones Ltd | Correction of D.C offset in received and demodulated radio signals |
| US5724653A (en) * | 1994-12-20 | 1998-03-03 | Lucent Technologies Inc. | Radio receiver with DC offset correction circuit |
| DE69818327T2 (de) * | 1997-03-05 | 2004-07-01 | Nec Corp. | Direktmischempfänger zur Unterdrückung von Offset-Gleichspannungen |
| TW405314B (en) * | 1998-08-28 | 2000-09-11 | Ind Tech Res Inst | Device for eliminating DC offset utilizing noise regulation technique and its method |
| GB2349313A (en) * | 1999-04-21 | 2000-10-25 | Ericsson Telefon Ab L M | Radio receiver |
| US6275087B1 (en) * | 1999-11-16 | 2001-08-14 | Lsi Logic Corporation | Adaptive cancellation of time variant DC offset |
| GB0100202D0 (en) * | 2001-01-04 | 2001-02-14 | Koninkl Philips Electronics Nv | Receiver having a variable threshold slicer stage and a method of updating the threshold levels of the slicer stage |
| DE10251288B4 (de) * | 2002-11-04 | 2005-08-11 | Advanced Micro Devices, Inc., Sunnyvale | Equalizerschaltung mit Kerbkompensation für einen Direktmischempfänger |
-
2003
- 2003-04-09 GB GBGB0308168.4A patent/GB0308168D0/en not_active Ceased
-
2004
- 2004-03-30 KR KR1020057019079A patent/KR20060002953A/ko not_active Withdrawn
- 2004-03-30 JP JP2006506442A patent/JP2006523059A/ja not_active Withdrawn
- 2004-03-30 CN CNA2004800091490A patent/CN1768515A/zh active Pending
- 2004-03-30 WO PCT/IB2004/001045 patent/WO2004091160A1/en not_active Ceased
- 2004-03-30 EP EP04724331A patent/EP1616421A1/en not_active Withdrawn
- 2004-03-30 US US10/552,227 patent/US20070177692A1/en not_active Abandoned
- 2004-04-06 TW TW093109531A patent/TW200501602A/zh unknown
Also Published As
| Publication number | Publication date |
|---|---|
| TW200501602A (en) | 2005-01-01 |
| GB0308168D0 (en) | 2003-05-14 |
| US20070177692A1 (en) | 2007-08-02 |
| WO2004091160A1 (en) | 2004-10-21 |
| EP1616421A1 (en) | 2006-01-18 |
| JP2006523059A (ja) | 2006-10-05 |
| CN1768515A (zh) | 2006-05-03 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0105 | International application |
Patent event date: 20051007 Patent event code: PA01051R01D Comment text: International Patent Application |
|
| PG1501 | Laying open of application | ||
| PC1203 | Withdrawal of no request for examination | ||
| WITN | Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid |