KR20050070486A - Driving apparatus of liquid crystal display - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a drive device for a liquid crystal display device, and more particularly, to a drive device for a liquid crystal display device capable of securing a charging time of a liquid crystal regardless of an increase in data line length.

A plurality of pixels each including a liquid crystal capacitor and a switching element, a data driver generating a first voltage, a plurality of transfer gates transferring the first voltage according to a plurality of switching control signals, and a first connected to the transfer gates A capacitor including a second stage connected to a stage and a ground voltage, a first terminal connected to the first stage of the capacitor, a second terminal connected to a predetermined driving power source, and a constant current source to the switching element. And a transistor including a third terminal connected thereto.

In this way, a capacitor and a transistor can be arranged between the transfer gate and the pixel to secure the charging time.

Description

Driving device of liquid crystal display {DRIVING APPARATUS OF LIQUID CRYSTAL DISPLAY}

The present invention relates to a drive device for a liquid crystal display device.

A typical liquid crystal display (LCD) includes two display panels provided with pixel electrodes and a common electrode, and a liquid crystal layer having dielectric anisotropy interposed therebetween. The pixel electrodes are arranged in a matrix and connected to switching elements such as thin film transistors (TFTs) to receive data voltages one by one in sequence. The common electrode is formed over the entire surface of the display panel and receives a common voltage. The pixel electrode, the common electrode, and the liquid crystal layer therebetween form a liquid crystal capacitor, and the liquid crystal capacitor becomes a basic unit that forms a pixel together with a switching element connected thereto.

The liquid crystal display selects and applies a data voltage corresponding to image data among the gray voltages, including the gray voltage generator, the data driver, and the gate driver, to the pixel. Then, the gate driver applies a gate signal to the TFT and turns it on, and a data voltage is applied to the pixel through the turned-on TFT.

In this case, since the liquid crystal display generates a screen of about 60 frames for 1 second, the frame frequency is 1/60 second. The gate signal is applied to the gate line within this one frame frequency, and the data voltage is applied to all the pixel rows.

However, as the pixel row increases, the time for charging the data voltage to the liquid crystal capacitor is shortened.

This is because data voltages must be applied to all pixel rows within a predetermined frame frequency. In other words, the longer the data line is, the shorter the charging time of the pixel is. For this reason, there is a need to increase the output performance of the data driver IC forming the data driver, and it takes time and cost to develop a new data driver IC.

Accordingly, an object of the present invention is to provide a driving device of a liquid crystal display device capable of securing a charging time of a pixel regardless of an increase in pixel rows.

According to an embodiment of the present invention, a driving device of a liquid crystal display device includes a plurality of pixels each including a liquid crystal capacitor and a switching element, a data driver to generate a first voltage, and a plurality of switching control signals. A capacitor comprising a plurality of transmission gates for transmitting the first voltage, a first terminal connected to the transmission gate, and a second terminal connected to a ground voltage, and a first terminal connected to the first terminal of the capacitor And a transistor including a terminal, a second terminal connected to a predetermined driving power supply, and a third terminal connected to the switching element through a constant current source.

On the other hand, the transistor preferably emits a second voltage minus the threshold voltage of the transistor from the first voltage.

In addition, the capacitor charges the first voltage while the transfer gate is turned on, and the transistor transfers the second voltage to the pixel after the transfer gate is turned off until the switching element is turned off. Can be.

The transistor may be formed of low temperature poly-silicon (LTPS).

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

Now, a driving device of a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of one pixel of the liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly 300, a gate driver 400, a data driver 500, and a data driver The gray voltage generator 800 connected to the signal generator 500 and a signal controller 600 for controlling the gray voltage generator 800 are included.

The liquid crystal panel assembly 300 includes a plurality of display signal lines G ₁ -G _n , D ₁ -D _m and a plurality of pixels connected to the plurality of display signal lines G ₁ -G _n , D ₁ -D _m , and arranged in a substantially matrix form. .

The display signal lines G ₁ -G _n and D ₁ -D _m are a plurality of gate lines G ₁ -G _n for transmitting a gate signal (also called a “scan signal”) and a data signal line or data for transmitting a data signal. Line D ₁ -D _m . The gate lines G ₁ -G _n extend substantially in the row direction and are substantially parallel to each other, and the data lines D ₁ -D _m extend substantially in the column direction and are substantially parallel to each other.

Each pixel includes a switching element Q connected to a display signal line G ₁ -G _n , D ₁ -D _m , and a liquid crystal capacitor C _LC and a storage capacitor C _ST connected thereto. It includes. The holding capacitor C _ST can be omitted as necessary.

The switching element Q is provided on the lower panel 100, and the control terminal and the input terminal are connected to the gate line G ₁ -G _n and the data line D ₁ -D _m, respectively. The output terminal is connected to the liquid crystal capacitor C _LC and the storage capacitor C _ST .

The liquid crystal capacitor C _LC has two terminals, the pixel electrode 190 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 190 and 270. It functions as a dielectric. The pixel electrode 190 is connected to the switching element Q, and the common electrode 270 is formed on the front surface of the upper panel 200 and receives a common voltage V _com . Unlike in FIG. 2, the common electrode 270 may be provided in the lower panel 100. In this case, both electrodes 190 and 270 may be linear or rod-shaped.

The storage capacitor C _ST is formed by overlapping a separate signal line (not shown) and the pixel electrode 190 provided on the lower panel 100, and a predetermined voltage such as a common voltage V _com is applied to the separate signal line. Is approved. However, the storage capacitor C _ST may be formed such that the pixel electrode 190 overlaps the front end gate line directly above the insulator.

Meanwhile, in order to implement color display, each pixel must display color, which is possible by providing a red, green, or blue color filter 230 in a region corresponding to the pixel electrode 190. In FIG. 2, the color filter 230 is formed in a corresponding region of the upper panel 200. Alternatively, the color filter 230 may be formed above or below the pixel electrode 190 of the lower panel 100.

A polarizer (not shown) for polarizing light is attached to an outer surface of at least one of the two display panels 100 and 200 of the liquid crystal panel assembly 300.

The gray voltage generator 800 generates two sets of gray voltages related to the transmittance of the pixel. One of the two sets has a positive value for the common voltage (V _com ) and the other set has a negative value.

The gate driver 400 is connected to the gate lines G ₁ -G _n of the liquid crystal panel assembly 300 to receive a gate signal formed by a combination of a gate on voltage V _on and a gate off voltage V _off from the outside. It is applied to the gate lines G ₁ -G _n .

The data driver 500 is connected to the data lines D ₁ -D _m of the liquid crystal panel assembly 300 to select the gray voltage from the gray voltage generator 800 and apply the gray voltage to the pixel as a data signal. It consists of a circuit.

The signal controller 600 generates control signals for controlling operations of the gate driver 400 and the data driver 500, and provides the corresponding control signals to the gate driver 400 and the data driver 500.

Next, the display operation of the liquid crystal display will be described in more detail.

The signal controller 600 inputs an input control signal for controlling the RGB image signals R, G, and B and their display from an external graphic controller (not shown), for example, a vertical sync signal V _sync and a horizontal sync signal. (H _sync ), a main clock (MCLK), a data enable signal (DE) is provided. The signal controller 600 generates a gate control signal CONT1 and a data control signal CONT2 based on the input control signal, and adjusts the image signals R, G, and B to match the operating conditions of the liquid crystal panel assembly 300. After appropriately processing, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signals R ', G', and B 'are sent to the data driver 500.

The gate control signal CONT1 includes a vertical synchronization start signal STV indicating the start of output of the gate on pulse (gate on voltage section), a gate clock signal CPV for controlling the output timing of the gate on pulse, and a gate on pulse. An output enable signal OE or the like that defines a width.

The data control signal CONT2 is a load for applying a corresponding data voltage to the horizontal synchronization start signal STH indicating the start of input of the image data R ', G', and B 'and the data lines D ₁ -D _m . Signal LOAD, inverted signal RVS and data that inverts the polarity of the data voltage with respect to common voltage V _com (hereinafter referred to as " polarity of data voltage " by reducing " polarity of data voltage with respect to common voltage "). Clock signal HCLK and the like.

The data driver 500 sequentially receives and shifts image data R ', G', and B 'corresponding to one row of pixels according to the data control signal CONT2 from the signal controller 600, and generates a gray voltage. The image data R ', G', B 'is converted into the corresponding data voltage by selecting the gray voltage corresponding to each of the image data R', G ', and B' among the gray voltages from the unit 800. Then, it is applied to the corresponding data line D ₁ -D _m .

The gate driver 400 applies the gate-on voltage V _on to the gate lines G ₁ -G _n in response to the gate control signal CONT1 from the signal controller 600, thereby applying the gate lines G ₁ -G _n. When the switching element Q connected to the () is turned on, the data voltage applied to the data lines D ₁ -D _m is applied to the corresponding pixel through the turned on switching element Q.

The difference between the data voltage applied to the pixel and the common voltage V _com is shown as the charging voltage of the liquid crystal capacitor C _LC , that is, the pixel voltage. The liquid crystal molecules vary in arrangement depending on the magnitude of the pixel voltage. As a result, the polarization of light passing through the liquid crystal layer 3 changes. The change in polarization is represented by a change in transmittance of light by a polarizer (not shown) attached to the display panels 100 and 200.

After one horizontal period (or “1H”) (one period of the horizontal sync signal H _sync , the data enable signal DE, and the gate clock CPV), the data driver 500 and the gate driver 400 are next. The same operation is repeated for the pixels in the row. In this manner, the gate-on voltages V _{on are} sequentially applied to all the gate lines G ₁ -G _n during one frame to apply data voltages to all the pixels. At the end of one frame, the next frame starts and the state of the inversion signal RVS applied to the data driver 500 is controlled so that the polarity of the data voltage applied to each pixel is opposite to that of the previous frame ("frame inversion). "). In this case, the polarity of the data voltage flowing through one data line may be changed (“column inversion”) or the polarity of the data voltage applied to one pixel row may be different according to the characteristics of the inversion signal RVS within one frame ( "Dot reversal")

Next, the driving device of the liquid crystal display of the present invention will be described in detail with reference to FIGS. 3 to 5.

3 is a view showing a driving device of the liquid crystal display device according to an embodiment of the present invention, FIG. 4 is an equivalent circuit diagram of the driving device of the liquid crystal display device according to an embodiment of the present invention, and FIG. A timing diagram of a switching element and a transfer gate is shown.

As shown in FIG. 3, a plurality of data lines D ₁ -D ₁₂ are connected to the data driving IC through the transfer gates TG1-TG6. In addition, the transistors N1-N12 and the capacitors C _1- C ₁₂ are connected in parallel between the pixel and the data lines D ₁ -D ₁₂ .

The transfer gates TG1-TG6 are turned on / off according to the switching control signals SW1-SW6 generated by the signal controller 600, and the data voltage is applied to the corresponding pixel through the turned-on transfer gates TG1-TG6. .

A process in which the data voltage is applied to the pixel will be described in more detail.

The equivalent circuit shown in FIG. 4 is any one of circuits connected to the data lines D ₁ -D ₁₂ .

The transistor N is an NMOS transistor, and the first terminal is connected to the input voltage V _IN , which is a data voltage, via the transfer gate TG, and to one end of the capacitor C. The second terminal of the transistor N is connected to a constant driving voltage V _DD , and the third terminal is connected to the liquid crystal capacitor C _LC through the constant current source I and the switching element Q of the pixel. The other end of the liquid crystal capacitor C _LC is connected to the common voltage V _com as described above.

The transistor N is preferably formed using low temperature poly silicon (LTPS) technology.

As illustrated in FIG. 5, the switching element Q of the pixel is first turned on by the gate-on voltage V _on , and then the transfer gate TG is turned on by the switching control signals SW1-SW6 to turn on the input voltage ( V _IN ) is applied to the data line. The capacitor C then receives the input voltage V _IN and charges it.

On the other hand, the capacitor C receives and charges the input voltage V _IN , and when the capacitor C is charged above the threshold voltage V _th , the transistor N is turned on and the threshold voltage (V) at the input voltage V _IN . Output voltage as minus V _th ). The output voltage is then transferred to the liquid crystal capacitor C _LC through the switching element Q of the pixel which is turned on in advance.

Subsequently, when the transfer gate TG is turned off, a closed circuit reaching the capacitor C and the common voltage V _com is formed, and the voltage charged in the capacitor C is switched on the pixel after the transfer gate TG is turned off. The voltage is continuously supplied to the liquid crystal charger C _LC for a time until the device Q is turned off.

In this manner, even after the transmission gate TG is turned off, the data voltage can be continuously supplied using the input voltage V _IN charged to the capacitor C, thereby sufficiently charging the liquid crystal capacitor C _LC . As a result, even if the length of the data lines D ₁ -D ₁₂ is increased, a sufficient data voltage can be supplied to the pixel using the existing data driving IC.

On the other hand, the data lines D ₆ , D ₁₂ ,..., Connected to the sixth transfer gate TG6 are turned off relatively soon after the charging operation of the capacitor C is finished. The time for delivering the charging voltage of the capacitor C can be reduced. In order to prevent this, the time at which the transfer gate TG is turned on is slightly advanced as a whole to secure a time interval at which the sixth transfer gate TG6 is turned off and a time interval at which the switching element Q of the pixel is turned off.

In addition, as the input voltage V _IN , it is preferable to apply a voltage that compensates for the threshold voltage of the transistor N. As described above, the transistor (N) The output voltage is applied by adding the threshold voltage (V _th) ahead of the input voltage (V _IN) Since the voltage obtained by subtracting the threshold voltage (V _th), the input voltage (V _IN) from the target A data voltage can be obtained.

As described above, the data voltage may be applied using the existing data driving IC regardless of the length of the data line using the capacitor C and the transistor N.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a diagram illustrating a driving device of a liquid crystal display according to an exemplary embodiment of the present invention.

4 is an equivalent circuit diagram of a driving device of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 5 is a timing diagram of a switching element and a transfer gate of the pixel illustrated in FIG. 4.

Claims (4)

A plurality of pixels each including a liquid crystal capacitor and a switching element, A data driver generating a first voltage; A plurality of transmission gates transferring the first voltage according to a plurality of switching control signals, A capacitor comprising a first end coupled to the transmission gate and a second end coupled to a ground voltage, and A transistor including a first terminal connected to the first end of the capacitor, a second terminal connected to a predetermined driving power source, and a third terminal connected to the switching element through a constant current source Driving device for a liquid crystal display comprising a. In claim 1, And the transistor emits a second voltage minus the threshold voltage of the transistor. In claim 2, The capacitor charges the first voltage while the transfer gate is turned on, And the transistor transfers the second voltage to the pixel after the transfer gate is turned off and until the switching element is turned off. In claim 3, And the transistor is formed of low temperature poly-silicon (LTPS).