KR20040100512A - Inspection method of semiconductor device - Google Patents

Abstract

PURPOSE: A method of inspecting a semiconductor device is provided to easily find out a short path between upper and lower fine metal lines by removing the lower metal line of a short portion using chemicals and securing a piece of objective evidence using an image of SEM for the short portion. CONSTITUTION: A semiconductor device has the short between upper and lower metal lines. The upper metal line is exposed to the outside and an insulating layer between the upper and lower metal lines is maintained. The resultant structure is treated by using etching chemicals. The chemicals are capable of etching all the upper and lower metal lines. The lower metal line is exposed to the outside by removing the insulating layer of a short portion. A short path is checked by using an image of SEM.

Description

Inspection method of semiconductor device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for inspecting a semiconductor device, and more particularly, to a method for inspecting a semiconductor device that can easily inspect a short circuit between a bit line and a word line, thereby improving the reliability of the test and shortening the test time. .

The recent trend toward higher integration of semiconductor devices is that process margins decrease and difficulty increases due to fine patterning and difficulty in landfilling due to high aspect ratios.

As a result, in reverse engineering, which is mainly to remove the insulating film, there is considerable instability in determining whether there is a process abnormality according to the specimen manufacturing proficiency.

In addition, the final device manufactured through the multi-step process is partially sampled to check the uniformity of the pattern, the accuracy of the contact, and the short-circuit.The cause of the defect is detected by such a test and the defect does not recur. It is the field of failure analysis that provides feedback.

In the case of reverse engineering according to the prior art, if a defect occurs in the cell array, the location of the defect is determined through address mapping, and the various conductive layers and insulating films formed on the upper part are sequentially removed to determine whether there is an abnormality. I'm using the method.

As described above, the inspection method of the semiconductor device according to the related art is almost entirely visual method of determining the cause of failure by reverse engineering, so it is very difficult to identify the cause of failure except in some cases where the cause of failure is obvious. There are problems, such as severe individual differences and many inaccuracies.

In particular, the disconnection or short circuit between conductive layers, which causes defects in a memory cell composed of transistors, capacitors, and interconnections formed in a small area due to a small design rule of the device, can be detected electrically, There is a problem that verification as a concrete photograph such as a plane is impossible.

The present invention is to solve the above problems, the object of the present invention is to easily detect the location of the short circuit using the conductive material etch chemicals can be secured as data such as photographs, so that time and effort required for defect analysis The present invention provides a method of inspecting a semiconductor device that can reduce the number of objects and secure an objective increase, thereby reducing individual differences and improving analysis accuracy.

1 is a SEM photograph of a semiconductor device subjected to the inspection according to the present invention.

Features of the test manufacturing method of a semiconductor device according to the present invention for achieving the above object,

In the inspection method of a semiconductor device for inspecting the short-circuit path between the vertical wiring of the semiconductor device having two or more conductive wirings insulated vertically,

Preparing a semiconductor device having a short angle defect between the upper and lower wirings;

Exposing an upper wiring of the semiconductor device, and maintaining an insulating film between the lower wiring and the lower wiring;

Treating the semiconductor substrate by using an etching chemical for etching the upper wiring and the lower wiring together;

Exposing the lower wiring by removing the insulating film on the lower wiring near the short circuit position of the semiconductor element;

It is provided with the process of grasping a short circuit path with the SEM photograph of the said short circuit position.

Hereinafter, a method of inspecting a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

First, the semiconductor device that detects a short circuit between the word line and the bit line is detected, and the type of the conductive layer used for the bit line and the word line is detected. The word line is etched so that the part can be identified by SEM.

For example, in the case of the following 256M class DRAM devices, the word line and the bit line both use W as a conductive material. Therefore, if such a short circuit occurs between the word line and the bit line, the semiconductor device is fixed in the H ₂ O ₂ solution which reacts only to W while removing the bit line through reverse engineering and maintaining the insulating layers in the suspected area. When reacted with time, chemicals will penetrate through the short-circuit path and etch the word line. Then, if the SEM finds the missing W, even a minute short-circuit path can be easily found.

1 is a SEM photograph of a device inspecting a short path between word lines and bit lines according to the present invention. After exposure to bit lines by reverse engineering, chemical treatment is performed for a predetermined time, and only an oxide film is selectively removed. As a result, it is possible to easily find the shorting path by seeing the W which remains black in other parts and W is removed by the paragraph, which becomes white.

This inspection method can be equally applied using nitric acid in the inspection for finding a shorting path between the landing plug polysilicon layer and the gate polysilicon layer.

As described above, the inspection method of the semiconductor device according to the present invention removes the lower wiring of the short-circuit site by using a chemical during a defect inspection for finding a short-circuit path between two or more upper and lower wirings made of the same conductive material. Since the location method is used, it is easy to find fine short-circuit paths between the upper and lower wirings, and it is possible to reduce the cost by minimizing the inspection time and effort by performing the inspection with objective evidence. .

Claims (1)

In the inspection method of a semiconductor device for inspecting the short-circuit path between the vertical wiring of the semiconductor device having two or more conductive wirings insulated vertically, Preparing a semiconductor device in which a short circuit occurs between the upper and lower wirings; Exposing an upper wiring of the semiconductor device, and maintaining an insulating film between the lower wiring and the lower wiring; Treating the semiconductor substrate using an etching chemical for etching both the upper wiring and the lower wiring; Exposing the lower wiring by removing the insulating film on the lower wiring near the short circuit position of the semiconductor element; And a step of grasping a short circuit path by an SEM photograph of the short circuit position.