KR20040036259A - Liquid crystal display and driving method thereof - Google Patents

Abstract

PURPOSE: An LCD device is provided to drive liquid crystal cells disposed in zigzag type by an interlaced scanning system, and to supply video signals in a field inversion system, to drive an LCD panel in dot inversion system, thereby remarkably reducing power consumption. CONSTITUTION: An LCD panel(12) arrays liquid crystal cells in matrix type. A gate driver(14) drives gate lines(GL0-GLn+1) of the LCD panel(12). A data driver(16) drives data lines(DL1-DLm) of the LCD panel(12). A timing controller(18) controls the gate driver(14) and the data driver(16). A common voltage generator(20) generates a common voltage(Vcom), and supplies the common voltage(Vcom) to the LCD panel(12). The LCD panel(12) has the gate lines(GL0-GLn+1) and the data lines(DL1-DLm) crossing the gate lines(GL0-GLn+1) by being insulated. The liquid crystal cells are disposed every region where the gate lines(GL0-GLn+1) and the data lines(DL1-DLm) cross each other. Each of the liquid crystal cells consists of a TFT and a capacitor having a common electrode and a pixel electrode.

Description

Liquid crystal display and its driving method {LIQUID CRYSTAL DISPLAY AND DRIVING METHOD THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a driving method thereof, and more particularly, to a liquid crystal display device and a driving method thereof capable of driving a liquid crystal panel in a dot inversion method by using a driving device driven in a field inversion method.

A typical liquid crystal display device displays an image by adjusting light transmittance for each liquid crystal cell according to a video signal. To this end, the liquid crystal display includes a liquid crystal panel in which liquid crystal cells are arranged in a matrix and a driving circuit for driving the liquid crystal panel.

In the liquid crystal panel, liquid crystal cells are positioned in an area formed by intersections of gate lines and data lines. Each of the liquid crystal cells is provided with pixel electrodes and a common electrode for applying an electric field. Each of the pixel electrodes is connected to one of the data lines via a thin film transistor which is a switching element. The gate terminal of the thin film transistor is connected to one of the gate lines for causing the video signal to be applied to the pixel electrodes for one line. The driving circuit includes a gate driver for driving the gate lines, a data driver for driving the data lines, and a common voltage generator for driving the common electrode.

The gate driver sequentially supplies the scanning signal, that is, the gate signal to the gate lines, to sequentially drive the liquid crystal cells on the liquid crystal panel by one line. The data driver supplies a video signal to each of the data lines whenever a gate signal is supplied to any one of the gate lines. The common voltage generator supplies a common voltage signal to the common electrode. Accordingly, the liquid crystal display device displays an image by adjusting the light transmittance by changing the liquid crystal arrangement state between the pixel electrode and the common electrode according to the video signal for each liquid crystal cell.

In fact, the liquid crystal display device includes a liquid crystal panel 2 in which liquid crystal cells are arranged in a matrix form as shown in FIG. 1, and a gate driver 4 for driving gate lines GL1 to GLn of the liquid crystal panel 2. ) And a data driver 6 for driving the data lines DL1 to DLm of the liquid crystal panel 2.

In FIG. 1, the liquid crystal panel 2 is a thin film transistor TFT formed at intersections of liquid crystal cells arranged in a matrix form and n gate lines GL1 to GLn and m data lines DL1 to DLm. ).

The thin film transistor TFT supplies a video signal from the data lines DL1 to DLm to the liquid crystal cell in response to the gate signal from the gate lines GL1 to GLn. The liquid crystal cell may be equivalently represented by a liquid crystal capacitor Clc including a common electrode facing the liquid crystal and a pixel electrode connected to the thin film transistor. In the liquid crystal cell, a storage capacitor (not shown) is further formed to maintain the voltage of the video signal charged in the liquid crystal capacitor Clc until the next video signal is supplied.

The storage capacitor is formed between the previous gate electrode and the pixel electrode. The gate driver 4 sequentially supplies gate signals to the gate lines GL1 to GLn to drive the thin film transistors TFT connected to the corresponding gate line. The data driver 6 converts the video data into a video signal, which is an analog signal, and supplies one horizontal line of video signal to the data lines DL1 through DLm during one horizontal period in which the gate signal is supplied to the gate line GL. do. In this case, the data driver 6 converts the video data into a video signal using the gamma voltages supplied from the gamma voltage generator (not shown) and supplies the converted video data.

In such a liquid crystal display device, a frame inversion system, a field inversion system, a line (column) inversion system, and the like are used to drive liquid crystal cells on a liquid crystal panel. Inversion driving methods such as the Dot Inversion System are used.

The frame inversion type liquid crystal panel driving method inverts the polarity of the video signal supplied to the liquid crystal cells on the liquid crystal panel every time the frame is changed, as shown in FIGS. 2A and 2B. Similarly, the field inversion driving method divides one frame into two fields and inverts the polarity of the video signal supplied to the liquid crystal cells on the liquid crystal panel every time the field is changed. Such a frame inversion and field inversion scheme has an advantage of being driven at lower power consumption than other driving schemes (ie, a line (column) inversion scheme and a dot inversion scheme, etc.). However, the frame inversion and field inversion schemes have a problem in that flicker occurs in a frame unit or a field unit.

In the liquid crystal panel driving method of the line inversion method, the polarities of the video signals supplied to the liquid crystal panel are inverted for each gate line and every frame on the liquid crystal panel as shown in FIGS. 3A and 3B. This line inversion driving method has a problem in that flicker such as a stripe pattern occurs between horizontal lines as crosstalk between horizontal pixels exists.

In the column inversion type liquid crystal panel driving method, polarities of video signals supplied to the liquid crystal panel are inverted according to data lines and frames on the liquid crystal panel as shown in FIGS. 4A and 4B. This column inversion driving method has a problem in that flicker such as a stripe pattern occurs between vertical lines as crosstalk exists between vertical pixels.

In the dot-inversion liquid crystal panel driving method, as shown in FIGS. 5A and 5B, a video signal having a polarity opposite to that of all of the liquid crystal cells adjacent to each other in the horizontal and vertical directions is supplied to each of the liquid crystal cells, and the video signal of each video frame is framed. Causes the polarity to be reversed.

In other words, when the video signal of the odd-numbered frame is displayed in the dot inversion method, the process proceeds from the upper left liquid crystal cell to the right liquid crystal cell as shown in FIG. 5A and to the lower liquid crystal cells as shown in FIG. 5A. When the video signals are supplied to each of the liquid crystal cells so that the polarity (+) and the negative polarity (-) appear alternately, and the video signal of the even frame is displayed, the liquid crystal on the right side from the liquid crystal cell on the upper left side as shown in FIG. 5B. The video signals are supplied to each of the liquid crystal cells so that the negative (-) and the positive (+) appear alternately as they proceed to the cell and to the lower liquid crystal cells.

This dot inversion driving method provides a higher quality image than other inversion methods by causing the flicker generated between the vertical and horizontal directions and the frame (or field) to cancel each other.

However, in the dot inversion driving method, since the polarity of the video signal supplied to the data lines in the data driver must be reversed in the horizontal and vertical directions, the variation amount of the pixel voltage, that is, the frequency of the video signal is larger than that of the other inversion methods. Therefore, the power consumption is disadvantageous.

Accordingly, an object of the present invention is to provide a liquid crystal display device and a driving method thereof capable of driving a liquid crystal panel in a dot inversion method using a driving device driven in a field inversion method.

1 is a view showing a conventional liquid crystal display device.

2A and 2B are diagrams for explaining a frame inversion driving method of a liquid crystal display;

3A and 3B are views for explaining a line inversion driving method of a liquid crystal display device.

4A and 4B are views for explaining a column inversion driving method of a liquid crystal display device.

5A and 5B are diagrams for explaining a dot inversion driving method of a liquid crystal display device.

6 is a view showing a liquid crystal display device according to a first embodiment of the present invention.

7A to 7C are diagrams illustrating a field driving method of the liquid crystal display of the present invention shown in FIG.

FIG. 8 is a view showing another configuration of the liquid crystal display shown in FIG.

9A to 9C are diagrams illustrating a field driving method of the liquid crystal display of the present invention shown in FIG.

FIG. 10 is a diagram illustrating a common voltage generated from the common voltage generator shown in FIG. 6 and a gamma voltage corresponding thereto;

FIG. 11 is a block diagram illustrating in detail the timing controller illustrated in FIG. 6. FIG.

FIG. 12 is a diagram showing pixel data stored in a frame memory shown in FIG. 11; FIG.

13 is a view showing a liquid crystal display device according to a second embodiment of the present invention.

FIG. 14 is a view showing another configuration of the liquid crystal display shown in FIG. 12; FIG.

FIG. 15 is a diagram showing another configuration of pixel data stored in the frame memory shown in FIG. 11; FIG.

<Description of Symbols for Main Parts of Drawings>

2,12,22 LCD panel 4,14,24 Gate driver

6,16,26: data driver 18,28: timing controller

20,30: common voltage generator 34: control signal generator

36: pixel data alignment unit 38: line memory

40: frame memory

In order to achieve the above object, the liquid crystal display of the present invention includes liquid crystal cells including liquid crystal cells including thin film transistors formed in zigzag shapes on the basis of each of the gate lines and the data lines. A panel and a liquid crystal panel driver for driving the gate lines in an interlaced scanning method and supplying a video signal in a field inversion method for inverting the polarity of the video signal for each field to drive the liquid crystal cells in a dot inversion method. do.

Of the liquid crystal cells of the i (i is a natural number) horizontal line, the even-numbered liquid crystal cells are connected to the i-th gate line, and the even-numbered liquid crystal cells are connected to the i-th gate line.

The even-numbered liquid crystal cells of the i-th horizontal line of the liquid crystal cells are connected to the i-th gate line, and the odd-numbered liquid crystal cells are connected to the i-th gate line.

The liquid crystal panel driver may include a common voltage generator supplying an AC common voltage, which is a reference voltage of the liquid crystal cell, a gate driver for driving gate lines divided into even-numbered and odd-numbered gate lines for each field, and input pixel data. A timing driver for controlling the data driver and the gate driver and the data driver by converting the data into the field inversion method and supplying pixel data corresponding to the gate lines currently driven in the field to the data driver. It is provided.

The timing controller may include a control signal generator for generating a control signal for controlling the gate driver and the data driver, a pixel data alignment unit for aligning the pixel data to be supplied to the data driver, and an output from the pixel data alignment unit. A line memory for delaying the odd or even pixel data by one horizontal period, a frame memory that receives pixel data from the pixel data alignment unit and line memory, and stores the data in units of frames, and divides the data stored in the frame memory into fields. It is provided with a control part for supplying to a driver.

The controller supplies only the pixel data of negative polarity to the data driver in the first field where the even-numbered gate line is driven, and supplies only the pixel data of positive polarity to the data driver in the second field where the odd-numbered gate line is driven.

The controller supplies only the pixel data of positive polarity to the data driver in the first field where the even-numbered gate line is driven, and supplies only the pixel data of negative polarity to the data driver in the second field where the odd-numbered gate line is driven.

The first field and the second field are combined to form a frame.

The controller supplies only the pixel data of negative polarity to the data driver in the first field where the odd-numbered gate line is driven, and supplies only the pixel data of positive polarity to the data driver in the second field where the even-numbered gate line is driven.

The controller supplies only the pixel data of positive polarity to the data driver in the first field where the odd-numbered gate line is driven, and supplies only the pixel data of negative polarity to the data driver in the second field where the even-numbered gate line is driven.

The first field and the second field are combined to form a frame.

The driving method of the liquid crystal display device of the present invention is a field inversion method in which the polarity of the pixel data is inverted for each field, and the liquid crystal cell is supplied to liquid crystal cells including thin film transistors connected in a zigzag form based on the corresponding gate line. Causing them to be driven in a dot inversion manner.

Delaying the odd-numbered pixel data of the input pixel data by one horizontal period so as to invert the polarity of each field; storing the odd-numbered even-delayed pixel data and the delayed odd-numbered pixel data; And dividing the stored pixel data into a positive polarity and a negative polarity for each field.

Delaying even-numbered pixel data of the input pixel data by one horizontal period so as to reverse polarity for each field; storing even-numbered even-delayed pixel data with one horizontal period delayed; And dividing the stored pixel data into a positive polarity and a negative polarity for each field.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 6 to 15.

6 shows a liquid crystal display device according to a first embodiment of the present invention.

Referring to FIG. 6, the liquid crystal display according to the first exemplary embodiment of the present invention includes a liquid crystal panel 12 in which liquid crystal cells are arranged in a matrix, and gate lines GL0 to GLn + 1 of the liquid crystal panel 12. Controlling the gate driver 14 for driving the gate driver 14, the data driver 16 for driving the data lines DL1 to DLm of the liquid crystal panel 12, the gate driver 14 and the data driver 16. And a common voltage generator 20 for generating a common voltage Vcom and supplying the same to the liquid crystal panel 12.

The liquid crystal panel 12 includes gate lines GL0 to GLn + 1 and data lines DL1 to DLm that cross each other while being insulated from the gate lines GL0 to GLn + 1. Liquid crystal cells are formed in each region provided at the intersection of the gate lines GL0 to GLn + 1 and the data lines DL1 to DLm. Each of the liquid crystal cells may include a thin film transistor TFT connected to one of the gate lines GL0 to GLn + 1 and one of the data lines DL1 to DLm, a common electrode facing the liquid crystal between the liquid crystal cells. The liquid crystal capacitor Clc is formed of a pixel electrode connected to the thin film transistor TFT. Each of the liquid crystal cells further includes a storage capacitor (not shown) for maintaining the data voltage charged in the liquid crystal capacitor Clc until the next data voltage is charged.

The thin film transistor TFT supplies a video signal from the data line DL to the liquid crystal cell in response to a scan signal from the corresponding gate line GL, that is, a gate signal.

In the first exemplary embodiment of the present invention, the thin film transistor TFT is connected in a zigzag shape along the gate lines GL1 to GLn + 1. Accordingly, the liquid crystal cells driven by the gate lines GL1 to GLn + 1 are zigzag based on the gate lines GL1 to GLn + 1. In other words, the liquid crystal cells constituting the same horizontal line are alternately driven by columns and driven by different gate lines GL. Accordingly, since each of the gate lines GL1 to GLn + 1 is driven, the liquid crystal cells zigzag arranged in two adjacent horizontal lines are driven so that each of the horizontal lines is driven by the two gate lines. For this purpose, an n + 1 th gate line GLn + 1 is added after the n th gate line GLn.

Specifically, the liquid crystal cells of the odd column connected to the odd data lines DL1, DL3,..., DLm-1 through the thin film transistor TFT are connected to the gate lines GL0 through GLn adjacent to the upper side. Driven by. On the other hand, the liquid crystal cells of the even column connected to the even-numbered data lines DL2, DL4, ..., DLm through the TFT are connected to the gate lines GL1 to GLn + 1 adjacent to the lower side. Driven by.

For example, the liquid crystal cells of the odd column of the liquid crystal cells of the second horizontal line are driven by the first gate line GL1, and the liquid crystal cells of the even column are driven by the second gate line GL2. . The liquid crystal cells of the odd column of the liquid crystal cells of the nth horizontal line are driven by the n-th gate line GLn-1, and the liquid crystal cells of even-numbered column are driven by the n-th gate line GLn. Driven.

That is, in the liquid crystal display according to the first exemplary embodiment of the present invention, each of the gate lines GL1 to GLn + 1 is driven, the liquid crystal cells arranged in zigzag form on two adjacent horizontal lines are driven. When the liquid crystal display according to the first exemplary embodiment of the present invention is driven in the interlaced scanning method, two fields included in one frame are respectively driven in the field inversion method. In addition, the liquid crystal panel 12 is driven in a dot inversion method in a frame in which each field is combined.

For example, a video signal of positive polarity is supplied to the data lines DL1 to DLm in the first field in which even-numbered gate lines GL0, GL2, ..., GLn are driven. In other words, in the first field, only the positive video signal is supplied as shown in Fig. 7A. That is, when the second gate line GL2 is driven, a positive video signal is supplied to even-numbered liquid crystal cells of the second horizontal line, and positive polarity is applied to the odd-numbered liquid crystal cells of the third horizontal line. +) Video signal is supplied.

Thereafter, a negative video signal is supplied to the data lines DL1 to DLm in the second field in which the odd gate lines GL1, GL3, ..., GLn + 1 are driven. In other words, in the second field, only the negative video signal is supplied as shown in Fig. 7B. That is, when the first gate line GL1 is driven, a negative (−) video signal is supplied to even-numbered liquid crystal cells of the first horizontal line, and negative polarity () is applied to the odd-numbered liquid crystal cells of the second horizontal line. -) Video signal is supplied.

Accordingly, the first field and the second field of the liquid crystal display device driven by the interlaced scanning method are driven by the field inversion method. In the frame in which the first field and the second field are combined, video signals having opposite polarities are supplied to adjacent liquid crystal cells in the horizontal and vertical directions as shown in FIG. 7C. In other words, a positive video signal is provided for the odd-numbered liquid crystal cells of the first horizontal line, a negative video signal is provided for the even-numbered liquid crystal cells, and an odd-numbered liquid crystal cell of the second horizontal line. Field is charged with a negative (-) video signal, and even-numbered liquid crystal cells are charged with a positive (+) video signal. As a result, the liquid crystal panel 12 is driven in a dot inversion manner.

In the next frame period, as shown in Fig. 8, a video signal having a polarity opposite to that of the previous frame is supplied to the liquid crystal cells. In detail, first, a negative video signal is supplied to the data lines DL1 to DLm in the first field in which even-numbered gate lines GL0, GL2,..., GLn are driven. In other words, in the first field, only the negative video signal is supplied as shown in Fig. 9A. That is, when the second gate line GL2 is driven, a negative video signal is supplied to even-numbered liquid crystal cells of the second horizontal line, and negative polarity is applied to the odd-numbered liquid crystal cells of the third horizontal line. -) Video signal is supplied.

Subsequently, a positive video signal is supplied to the data lines DL1 through DLm in the second field in which the odd gate lines GL1, GL3,..., GLn + 1 are driven. In other words, only the positive polarity video signal is supplied in the second field as shown in Fig. 9B. That is, when the first gate line GL1 is driven, a positive video signal is supplied to even-numbered liquid crystal cells of the first horizontal line, and positive polarity is applied to the odd-numbered liquid crystal cells of the second horizontal line. +) Video signal is supplied.

Accordingly, the first field and the second field of the liquid crystal display device driven by the interlaced scanning method are driven by the field inversion method. Here, in the frame in which the first field and the second field are combined, video signals having opposite polarities are supplied to adjacent liquid crystal cells in the horizontal and vertical directions as shown in FIG. 9C. In other words, a negative video signal is provided in the odd-numbered liquid crystal cells of the first horizontal line, a positive video signal is provided in the even-numbered liquid crystal cells, and an odd-numbered liquid crystal cell of the second horizontal line. Field is charged with a positive (+) video signal, and even-numbered liquid crystal cells are charged with a negative (-) video signal. As a result, the liquid crystal panel 12 is driven in a dot inversion method.

That is, in the first embodiment of the present invention, the liquid crystal panel 12 may be driven in the dot inversion method by using the driving device driven in the field inversion method. Therefore, in the present invention, power consumption can be reduced as compared with the conventional dot inversion driving method.

Meanwhile, the gate driver 14 sequentially supplies gate signals to even-numbered gate lines GL0, GL2, ..., GLn or odd-numbered gate lines GL1, GL3, ..., GLn + 1. The thin film transistors TFT connected to are driven.

The data driver 16 converts the input pixel data into a video signal, which is an analog signal, and outputs a video signal corresponding to one horizontal line every one horizontal period during which a gate high voltage is supplied to the gate line GL. Supplies). In this case, the data driver 16 converts the pixel data into a video signal by using the gamma voltages supplied from the gamma voltage generator (not shown) and supplies the same.

The data driver 16 supplies a video signal by changing the polarity of the pixel voltage for each field in a field inversion scheme. Here, the data driver 16 must supply a video signal to the liquid crystal cells arranged up and down in a zigzag form based on the corresponding gate line in two horizontal lines every horizontal period. To this end, the data driver 16 receives the odd (or even) pixel data of the current horizontal period and the even (or odd) pixel data of the previous horizontal period from the timing controller 18 for each horizontal period.

The timing controller 18 generates control signals for controlling the driving of the gate driver 14 and the data driver 16, and supplies a video signal to the data driver 16. In particular, the timing controller 18 separates pixel data for one horizontal line into odd pixel data and even pixel data, delays even-numbered (or odd-numbered) pixel data among them for one next horizontal line. The data is output to the data driver 16 in combination with the odd (or even) pixel data. In addition, the timing controller 18 divides the input pixel data into fields and outputs the data to the data driver 16.

The common voltage generator 20 generates a common voltage Vcom and supplies the common voltage Vcom to the common electrode facing the pixel electrode with the liquid crystal interposed therebetween. In particular, the common voltage generator 20 AC-drives the common voltage Vcom for each field as shown in FIG. 10. At this time, the polarity of the gamma voltage is alternatingly driven for each field so as to be interchanged with the common voltage Vcom.

In detail, if the polarity of the common voltage Vcom is positive in the first field, the gamma voltage corresponding to black in the first field has a negative polarity. Further, if the polarity of the common voltage Vcom is negative in the second field, the gamma voltage corresponding to black in the second field has a positive polarity. As described above, when the common voltage Vcom is driven in alternating current, the liquid crystal panel 12 may be driven using a driving voltage having a low absolute value, thereby reducing power consumption.

FIG. 11 is a diagram illustrating the configuration of the timing controller illustrated in FIG. 6.

Referring to FIG. 11, the timing controller 18 includes a control signal generator 34 for generating control signals, a pixel data alignment unit 36 for rearranging input pixel data and outputting the data to the data driver 16, and a pixel. A line memory 38 connected to the data alignment unit 36 and a frame memory 40 connected to the line memory 38 and the pixel data alignment unit 36 are provided.

The control signal generator 34 may include gate control signals (GSP, GOE, GSC, etc.) and data driver 16 for controlling the gate driver 14 using the input synchronization signals V, H, and MCLK. It generates data control signals (SSP, SSC, SOE, etc.) for controlling.

The pixel data alignment unit 36 sorts the input pixel data and divides the input pixel data into odd-numbered (or even-numbered) pixel data VD1 and even-numbered (or odd-numbered) pixel data VD2. The line memory 38 stores even-numbered (or odd-numbered) pixel data VD2 outputted from the pixel data alignment unit 36 and delays one horizontal period for output.

The frame memory 40 stores pixel data supplied from the pixel data alignment unit 36 and the line memory 38. In addition, the frame memory 40 divides the pixel data stored therein into the positive (+) pixel data and the negative (-) pixel data (that is, by dividing into fields) and supplies the pixel data to the data driver 16. .

When the liquid crystal panel 12 operates with n (n is a natural number) frame, the operation of the timing controller 18 will be described in detail assuming that the pixel data alignment unit 36 aligns the input pixel data as shown in FIG. 7C. do.

First, even-numbered (or odd-numbered) pixel data VD2 of the pixel data arranged in the pixel data alignment unit 36 is input to the line memory 38, and accordingly, even-numbered (or odd-numbered) pixel data VD2. ) Is input to the frame memory 40 with a delay of one horizontal period. Further, the odd (or even) pixel data VD1 among the pixel data arranged by the pixel data alignment unit 36 is input to the frame memory 40 without delay. Therefore, the pixel memory having the form as shown in FIG. 12 is stored in the frame memory 40.

After the pixel data is stored in the frame memory 40, the controller 42 controls the positive polarity (+) data when the even-numbered gate lines GL0, GL2,..., GLn are driven (first field). The pixel data stored in the line is supplied to the data driver 16. Accordingly, the data driver 16 converts the pixel data supplied from the frame memory 40 into a video signal in response to the control signal from the control signal generator 34 and supplies it to the liquid crystal panel 12. In this case, the video signal as shown in FIG. 7A is supplied to the liquid crystal panel 12.

Thereafter, the controller 42 stores data of negative polarity (-), that is, pixel data stored in the even-numbered horizontal line when the odd-numbered gate lines GL1, GL3, ..., GLn + 1 are driven (second field). Supply to the driver 16. Accordingly, the data driver 16 converts the pixel data supplied from the frame memory 40 into a video signal in response to the control signal from the control signal generator 34 and supplies it to the liquid crystal panel 12. In this case, a video signal as shown in FIG. 7B is supplied to the liquid crystal panel 12.

That is, in the present invention, the data driver 16 is driven in a field inversion scheme that supplies video signals of different polarities during the first field and the second field. In addition, in the frame in which the first field and the second field are combined, the liquid crystal panel 12 is driven in a dot inversion manner as shown in FIG. 7C.

In other words, the liquid crystal display according to the first exemplary embodiment of the present invention drives liquid crystal cells arranged up and down zigzag based on the gate line by interlaced scanning, that is, by supplying a data signal in a field inversion method. The panel 12 is driven by the dot inversion method. Accordingly, the liquid crystal display according to the first exemplary embodiment of the present invention drives the liquid crystal panel 12 in the dot inversion method using the field inversion method, compared to the case of using the conventional dot inversion driver. Power consumption can be significantly reduced.

13 illustrates a liquid crystal display according to a second embodiment of the present invention.

Referring to FIG. 13, the liquid crystal display according to the second exemplary embodiment of the present invention includes a liquid crystal panel 22 in which liquid crystal cells are arranged in a matrix, and gate lines GL0 to GLn + 1 of the liquid crystal panel 22. Controlling the gate driver 24 for driving the gate driver, the data driver 26 for driving the data lines DL1 to DLm of the liquid crystal panel 22, the gate driver 24, and the data driver 26. And a common voltage generator 30 for generating a common voltage Vcom and supplying the same to the liquid crystal panel 22.

The liquid crystal panel 22 includes gate lines GL0 to GLn + 1 and data lines DL1 to DLm that cross each other while being insulated from the gate lines GL0 to GLn + 1. Liquid crystal cells are formed in each region provided at the intersection of the gate lines GL0 to GLn + 1 and the data lines DL1 to DLm. Each of the liquid crystal cells may include a thin film transistor TFT connected to one of the gate lines GL0 to GLn + 1 and one of the data lines DL1 to DLm, a common electrode facing the liquid crystal between the liquid crystal cells. The liquid crystal capacitor Clc is formed of a pixel electrode connected to the thin film transistor TFT. Each of the liquid crystal cells further includes a storage capacitor (not shown) for maintaining the data voltage charged in the liquid crystal capacitor Clc until the next data voltage is charged.

The thin film transistor TFT supplies a video signal from the data line DL to the liquid crystal cell in response to a scan signal from the corresponding gate line GL, that is, a gate signal.

In the second embodiment of the present invention, the thin film transistor TFT is connected in a zigzag shape along the gate lines GL1 to GLn + 1. Accordingly, the liquid crystal cells driven by the gate lines GL1 to GLn + 1 are zigzag based on the gate lines GL1 to GLn + 1. In other words, the liquid crystal cells constituting the same horizontal line are alternately driven by columns and driven by different gate lines GL. Accordingly, since each of the gate lines GL1 to GLn + 1 is driven, the liquid crystal cells zigzag arranged in two adjacent horizontal lines are driven so that each of the horizontal lines is driven by the two gate lines. For this purpose, an n + 1 th gate line GLn + 1 is added after the n th gate line GLn.

Specifically, the liquid crystal cells of the odd column connected to the odd data lines DL1, DL3, ..., DLm-1 through the thin film transistor TFT are adjacent to the lower gate lines GL1 through GLn + 1. Driven by). In contrast, the liquid crystal cells of the even column connected to the even-numbered data lines DL2, DL4,..., DLm through the TFT are connected to the gate lines GL1 to GLn + 1 adjacent to the upper side. Driven by.

For example, the liquid crystal cells of the odd column of the liquid crystal cells of the second horizontal line are driven by the second gate line GL2, and the liquid crystal cells of the even column are driven by the first gate line GL1. . The liquid crystal cells of the odd column of the liquid crystal cells of the nth horizontal line are driven by the nth gate line GLn, and the liquid crystal cells of the even column are driven by the n-1 gate line GLn-1. Driven.

That is, in the liquid crystal display according to the second exemplary embodiment of the present invention, whenever the gate lines GL1 to GLn + 1 are driven, the liquid crystal cells arranged in zigzag form on two adjacent horizontal lines are driven. Therefore, when the liquid crystal display according to the second embodiment of the present invention is driven in the interlaced scanning method, two fields included in one frame are driven in the field inversion method. In addition, the liquid crystal panel 12 is driven in a dot inversion method in a frame in which each field is combined.

For example, a negative video signal is supplied to the data lines DL1 to DLm in the first field in which even-numbered gate lines GL0, GL2, ..., GLn are driven. In other words, in the first field, only the negative (-) video signal is supplied as shown in FIG. 7B. That is, when the second gate line GL2 is driven, to the odd-numbered liquid crystal cells of the second horizontal line. A negative video signal is supplied and a negative video signal is supplied to even-numbered liquid crystal cells of the third horizontal line.

Thereafter, a positive video signal is supplied to the data lines DL1 through DLm in the second field in which the odd gate lines GL1, GL3, ..., GLn + 1 are driven. In other words, in the second field, only the positive video signal is supplied as shown in Fig. 7A. That is, when the first gate line GL1 is driven, the positive video signal is supplied to the odd-numbered liquid crystal cells of the first horizontal line, and the positive polarity is applied to the even-numbered liquid crystal cells of the second horizontal line. +) Video signal is supplied.

Accordingly, the first field and the second field of the liquid crystal display device driven by the interlaced scanning method are driven by the field inversion method. In the frame in which the first field and the second field are combined, video signals having opposite polarities are supplied to adjacent liquid crystal cells in the horizontal and vertical directions as shown in FIG. 7C. In other words, a positive video signal is provided for the odd-numbered liquid crystal cells of the first horizontal line, a negative video signal is provided for the even-numbered liquid crystal cells, and an odd-numbered liquid crystal cell of the second horizontal line. Field is charged with a negative video signal, and even-numbered liquid crystal cells are charged with a positive video signal. As a result, the liquid crystal panel 22 is driven in a dot inversion manner.

In the next frame period, as shown in Fig. 14, a video signal having a polarity opposite to that of the previous frame is supplied to the liquid crystal cells. In detail, first, the positive video signal is supplied to the data lines DL1 to DLm in the first field in which even-numbered gate lines GL0, GL2,..., GLn are driven. In other words, in the first field, only the positive video signal is supplied as shown in Fig. 9B. That is, when the second gate line GL2 is driven, the positive video signal is supplied to the odd-numbered liquid crystal cells of the second horizontal line, and the positive polarity is applied to the even-numbered liquid crystal cells of the third horizontal line. +) Video signal is supplied.

Thereafter, a negative video signal is supplied to the data lines DL1 through DLm in the second field in which the odd gate lines GL1, GL3,..., GLn + 1 are driven. In other words, in the second field, only the negative video signal is supplied as shown in Fig. 9A. That is, when the first gate line GL1 is driven, a negative (−) video signal is supplied to the odd-numbered liquid crystal cells of the first horizontal line and negative polarity is applied to the even-numbered liquid crystal cells of the second horizontal line. -) Video signal is supplied.

Accordingly, the first field and the second field of the liquid crystal display device driven by the interlaced scanning method are driven by the field inversion method. Here, in the frame in which the first field and the second field are combined, video signals having opposite polarities are supplied to adjacent liquid crystal cells in the horizontal and vertical directions as shown in FIG. 9C. In other words, a negative video signal is provided in the odd-numbered liquid crystal cells of the first horizontal line, a positive video signal is provided in the even-numbered liquid crystal cells, and an odd-numbered liquid crystal cell of the second horizontal line. Field is charged with a positive (+) video signal, and even-numbered liquid crystal cells are charged with a negative (-) video signal. As a result, the liquid crystal panel 22 is driven in a dot inversion method.

That is, in the second embodiment of the present invention, the liquid crystal panel 22 may be driven in the dot inversion method by using the driving device driven in the field inversion method. Therefore, in the present invention, power consumption can be reduced as compared with the conventional dot inversion driving method.

Meanwhile, the gate driver 24 sequentially supplies gate signals to even-numbered gate lines GL0, GL2, ..., GLn or odd-numbered gate lines GL1, GL3, ..., GLn + 1. The thin film transistors TFT connected to are driven.

The data driver 26 converts the input pixel data into a video signal, which is an analog signal, and outputs a video signal corresponding to one horizontal line every one horizontal period during which a gate high voltage is supplied to the gate line GL. Supplies). In this case, the data driver 26 converts the pixel data into a video signal using the gamma voltages supplied from the gamma voltage generator (not shown) and supplies the same.

The data driver 26 supplies a video signal by changing the polarity of the pixel voltage for each field in a field inversion scheme. Here, the data driver 26 must supply a video signal to the liquid crystal cells arranged up and down in a zigzag form based on the corresponding gate line in two horizontal lines every horizontal period. To this end, the data driver 26 receives the even (or odd) pixel data of the current horizontal period and the odd (or even) pixel data of the previous horizontal period from the timing controller 28 for each horizontal period.

The timing controller 28 generates control signals for controlling driving of the gate driver 24 and the data driver 26, and supplies a video signal to the data driver 26. Specifically, the timing controller 28 separates pixel data for one horizontal line into odd pixel data and even pixel data, delays the odd (or even) pixel data among them for one horizontal line, The data is output to the data driver 26 in combination with the even (or odd) pixel data. In addition, the timing controller 28 delays data corresponding to one field and outputs the data to the data driver 26.

The common voltage generator 30 generates a common voltage Vcom and supplies the common voltage Vcom to the common electrode facing the pixel electrode with the liquid crystal interposed therebetween. In particular, the common voltage generator 30 AC-drives the common voltage Vcom for each field as shown in FIG. 10. At this time, the polarity of the gamma voltage is alternately driven for each field so as to alternate with the common voltage Vcom.

In detail, if the polarity of the common voltage Vcom is positive in the first field, the gamma voltage corresponding to black in the first field has a negative polarity. Also, if the polarity of the common voltage Vcom is negative in the second field, the gamma voltage corresponding to black in the second field has a positive polarity. As such, when the common voltage Vcom is driven AC, the liquid crystal panel 22 may be driven using a driving voltage having a low absolute value, thereby reducing power consumption.

FIG. 11 is a diagram illustrating the configuration of the timing controller illustrated in FIG. 13.

Referring to FIG. 11, the timing controller 28 includes a control signal generator 34 for generating control signals, a pixel data alignment unit 36 for rearranging input pixel data and outputting the data to the data driver 16, and a pixel. A line memory 38 connected to the data alignment unit 36 and a frame memory 40 connected to the line memory 38 and the pixel data alignment unit 36 are provided.

The control signal generator 34 may include gate control signals (GSP, GOE, GSC, etc.) and data driver 26 for controlling the gate driver 24 using the input synchronization signals V, H, and MCLK. It generates data control signals (SSP, SSC, SOE, etc.) for controlling.

The pixel data alignment unit 36 sorts the input pixel data and divides the input pixel data into even-numbered (or odd-numbered) pixel data VD1 and odd-numbered (or even-numbered) pixel data VD2. The line memory 38 stores the odd (or even) pixel data VD2 outputted from the pixel data alignment unit 36 and delays it by one horizontal period.

The frame memory 40 stores pixel data supplied from the pixel data alignment unit 36 and the line memory 38. The frame memory 40 divides the pixel data stored therein into positive pixel data and negative pixel data.

When the liquid crystal panel 22 operates with n (n is a natural number) frame, the operation of the timing controller 28 will be described in detail assuming that the pixel data alignment unit 36 aligns the input pixel data as shown in FIG. 7C. do.

First, the odd (or even) pixel data VD2 among the pixel data arranged in the pixel data alignment unit 36 is input to the line memory 38, and accordingly, the odd (or even) pixel data VD2 is input. ) Is input to the frame memory 40 with a delay of one horizontal period. Further, even-numbered (or odd-numbered) pixel data VD1 among the pixel data arranged by the pixel data alignment unit 36 is input to the frame memory 40 without delay. Therefore, the pixel memory having the form as shown in FIG. 15 is stored in the frame memory 40.

After the pixel data is stored in the frame memory 40, the controller 42 controls the negative polarity data, that is, the odd horizontal, when the even-numbered gate lines GL0, GL2, ..., GLn are driven (first field). The pixel data stored in the line is supplied to the data driver 16. Accordingly, the data driver 26 converts the pixel data supplied from the frame memory 40 into a video signal in response to the control signal from the control signal generator 34 to supply the liquid crystal panel 22. In this case, a video signal as shown in FIG. 7B is supplied to the liquid crystal panel 12.

Thereafter, the controller 42 stores data of positive polarity (+), that is, pixel data stored in even-numbered horizontal lines when the odd-numbered gate lines GL1, GL3, ..., GLn + 1 are driven (second field). Supply to the driver 26. Accordingly, the data driver 26 converts the pixel data supplied from the frame memory 40 into a video signal in response to the control signal from the control signal generator 34 to supply the liquid crystal panel 22. In this case, the video signal as shown in FIG. 7A is supplied to the liquid crystal panel 22.

In other words, in the present invention, the data driver 26 is driven in a field inversion scheme for supplying video signals of different polarities during the first field and the second field. Also, in the frame in which the first field and the second field are combined, the liquid crystal panel 22 is driven in a dot inversion manner as shown in FIG. 7C.

In other words, the liquid crystal display according to the second exemplary embodiment of the present invention drives liquid crystal cells arranged up and down in a zigzag form based on a gate line by interlaced scanning, that is, by supplying a data signal in a field inversion manner. The panel 22 is driven by the dot inversion method. Accordingly, the liquid crystal display device according to the second exemplary embodiment of the present invention drives the liquid crystal panel 22 in the dot inversion method using the field inversion method, compared to the case of using the conventional dot inversion driver. Power consumption can be significantly reduced.

As described above, according to the liquid crystal display and the driving method thereof according to the present invention, the liquid crystal cells arranged up and down zigzag based on the corresponding gate line are driven by interlaced scanning and the odd (or even excellent) of the horizontal period. Second) by combining the video signal with the even (or odd) video signal of the previous horizontal period and supplying the video signal in the field inversion method, the liquid crystal panel is driven in the dot inversion method. That is, in the present invention, the liquid crystal panel is driven in the dot inversion method by using the field inversion driving device, and thus the power consumption can be significantly reduced.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (14)

A liquid crystal panel including liquid crystal cells formed in regions formed at intersections of gate lines and data lines and including thin film transistors connected in a zigzag shape with respect to each of the gate lines; And a liquid crystal panel driver for driving the gate lines in an interlaced scanning method and supplying a video signal in a field inversion method for inverting the polarity of the video signal for each field to drive the liquid crystal cells in a dot inversion method. Liquid crystal display device characterized in that. The method of claim 1, An odd-numbered liquid crystal cell of the liquid crystal cells of the i (i is a natural number) horizontal line is connected to the i-1 th gate line, and the even-numbered liquid crystal cells are connected to the i-th gate line. The method of claim 1, An even-numbered liquid crystal cell of the liquid crystal cells of the i (i is a natural number) horizontal line is connected to the i-1 th gate line, and the odd-numbered liquid crystal cells are connected to the i-th gate line. The method of claim 1, The liquid crystal panel driver, A common voltage generator supplying an AC common voltage which is a reference voltage of the liquid crystal cell; A gate driver for driving the gate lines divided into even-numbered and odd-numbered gate lines for each field; A data driver for converting input pixel data into a video signal and supplying the data lines to the data lines by the field inversion method; And a timing controller for controlling the gate driver and the data driver and supplying the pixel data corresponding to the gate lines currently driven in the field to the data driver. The method of claim 4, wherein The timing controller, A control signal generator for generating a control signal for controlling the gate driver and the data driver; A pixel data alignment unit for aligning the pixel data so that the pixel data can be supplied to the data driver; A line memory for delaying the odd or even pixel data output from the pixel data alignment unit by one horizontal period; A frame memory which receives the pixel data from the pixel data alignment unit and the line memory and stores the pixel data in frame units; And a controller for dividing data stored in the frame memory for each field and supplying the data to the data driver. The method of claim 5, The controller supplies only the pixel data of negative polarity to the data driver in the first field where the even-numbered gate line is driven, and supplies only the pixel data of positive polarity to the data driver in the second field where the odd-numbered gate line is driven. Liquid crystal display characterized in that. The method of claim 5, The controller supplies only the pixel data of positive polarity to the data driver in the first field where the even-numbered gate line is driven, and supplies only pixel data of negative polarity to the data driver in the second field where the odd-numbered gate line is driven. Liquid crystal display characterized in that. The method according to any one of claims 6 and 7, And the first field and the second field are combined to form one frame. The method of claim 5, The controller supplies only the pixel data of negative polarity to the data driver in the first field where the odd-numbered gate line is driven, and supplies only the pixel data of positive polarity to the data driver in the second field in which the even-numbered gate line is driven. Liquid crystal display characterized in that. The method of claim 5, The controller supplies only the pixel data of positive polarity to the data driver in the first field where the odd-numbered gate line is driven, and supplies only the pixel data of negative polarity to the data driver in the second field where the even-numbered gate line is driven. Liquid crystal display characterized in that. The method according to any one of claims 9 and 10, And the first field and the second field are combined to form one frame. A driving method of a liquid crystal display device in which one frame is divided into a first field and a second field and driven in an interlaced scanning manner; The pixel data is supplied to the liquid crystal cells including a thin film transistor connected in a zigzag form on the basis of the corresponding gate line in a field inversion method for inverting polarity of each field so that the liquid crystal cells are driven in a dot inversion method. And driving the liquid crystal display device. The method of claim 12, In order for the polarity to be reversed for each field, Delaying the odd-numbered pixel data of the input pixel data by one horizontal period; Storing the one horizontal period-delayed odd-numbered pixel data and the non-delayed even-numbered pixel data; And supplying the stored pixel data for each field by dividing the stored pixel data into a positive polarity and a negative polarity. The method of claim 12, In order for the polarity to be reversed for each field, Delaying even-numbered pixel data of the input pixel data by one horizontal period; Storing the one even horizontal delayed even-numbered pixel data and the non-delayed odd-numbered pixel data; And supplying the stored pixel data for each field by dividing the stored pixel data into a positive polarity and a negative polarity.