KR100898786B1 - Liquid crystal panel, apparatus and method of driving the same - Google Patents

Abstract

The present invention relates to a liquid crystal panel, a driving device thereof, and a method thereof capable of improving image quality while reducing power consumption.

According to an exemplary embodiment of the present invention, a liquid crystal panel includes liquid crystal cells formed at respective regions defined by intersections of gate lines and data lines, and includes first liquid crystal cells alternately connected to adjacent data lines along a vertical direction. An effective screen area for displaying an image; And a dummy area including second liquid crystal cells that are alternately connected to different data lines symmetrically adjacent to the effective screen area in a vertical direction.

Inversion, Crosstalk

Description

Liquid crystal panel and its driving device and method {LIQUID CRYSTAL PANEL, APPARATUS AND METHOD OF DRIVING THE SAME}             

1 is a view showing a conventional liquid crystal display device.

2A and 2B illustrate a frame inversion scheme of a liquid crystal display;

3A and 3B illustrate a line inversion scheme of a liquid crystal display device;

4A and 4B illustrate a column inversion scheme of a liquid crystal display;

5A and 5B are diagrams for explaining a dot inversion method of a liquid crystal display device.

6 is a view showing a liquid crystal display device related to the present invention.

7 is a diagram illustrating a liquid crystal display according to a first embodiment of the present invention.

8A and 8B are pixel signal waveform diagrams supplied to the liquid crystal panel shown in FIG. 7 in an odd frame and an even frame.

9 illustrates a liquid crystal display according to a second exemplary embodiment of the present invention.

10A and 10B are pixel signal waveform diagrams supplied to the liquid crystal panel shown in FIG. 9 in an odd frame and an even frame.

FIG. 11 illustrates a liquid crystal display according to a third exemplary embodiment of the present invention. FIG.                 

12A and 12B are pixel signal waveform diagrams supplied to the liquid crystal panel shown in FIG. 11 in an odd frame and an even frame.

<Short description of the symbols in the drawings>

2, 12, 22, 32, 42: liquid crystal panel 4, 14, 24, 34, 44: gate driver

6, 16, 26, 36, 46: data driver 8, 18, 28, 38, 48: timing controller

TFT: Thin film transistor PXL: Pixel electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display, and more particularly, to a liquid crystal panel capable of improving image quality while reducing power consumption, and a driving apparatus and method thereof.

A liquid crystal display device displays an image by adjusting a light transmittance of a liquid crystal having dielectric anisotropy using an electric field. To this end, the liquid crystal display includes a liquid crystal panel in which liquid crystal cells are arranged in a matrix, and a driving circuit for driving the liquid crystal panel.

The liquid crystal panel displays an image by adjusting the light transmittance of the liquid crystal cells according to the pixel signal. The driving circuit includes a gate driver for driving the gate lines of the liquid crystal display panel, a data driver for driving the data lines, a timing controller for supplying timing control signals and pixel data to the gate driver and the data driver, and a power supply voltage. A power supply unit is provided.                         

Specifically, as shown in FIG. 1, the liquid crystal display device drives the liquid crystal panel 2 in which the liquid crystal cells Clc are arranged in a matrix, and drives the gate lines GL1 to GLn of the liquid crystal panel 2. A gate driver 4 and a data driver 6 for driving the data lines DL1 to DLm of the liquid crystal panel 2.

In FIG. 1, the liquid crystal panel 2 is a thin film transistor TFT and a liquid crystal formed in an area defined by an intersection of n gate lines GL1 to GLn and m data lines DL1 to DLm. It has a cell Clc. The thin film transistor TFT supplies the pixel signals from the data lines DL1 to DLm to the liquid crystal cell Clc in response to the scan signals from the gate lines GL1 to GLn. The liquid crystal cell Clc is equivalently represented by a liquid crystal capacitor Clc including a common electrode facing each other with a liquid crystal interposed therebetween and a pixel electrode connected to the thin film transistor.

The gate driver 4 generates scan signals sequentially supplied to the gate lines GL1 to GLn in response to the gate control signals from the timing controller 8.

The data driver 6 converts the pixel data from the timing controller 8 into an analog pixel signal in response to the data control signals from the timing controller 8. In this case, the data driver 6 converts the pixel data into the pixel signal using the gamma voltages supplied from the gamma voltage generator (not shown). The data driver 6 supplies the converted pixel signal to the data lines DL1 to DLm whenever the scan signal is supplied to the gate line GL.

The timing controller 8 controls the timing of the gate driver 4 and the data driver 6 by generating gate control signals and data control signals using the input vertical synchronization signal and the horizontal synchronization signal. The timing controller 8 also arranges the input pixel data and supplies it to the data driver 6.

The liquid crystal display device drives the liquid crystal panel by an inversion driving method in order to prevent degradation of the liquid crystal and to improve display quality. As the inversion driving method, a frame inversion system, a line (column) inversion system, and a dot inversion system are used.

In the frame inversion driving method, as shown in FIGS. 2A and 2B, the polarities of the liquid crystal cells are the same within one frame and are inverted from frame to frame. The frame inversion driving method has a problem in that flicker occurs in units of frames.

The line inversion driving method causes the polarities of the liquid crystal cells to be the same in one horizontal line and inverted horizontally and frame-wise as in FIGS. 3A and 3B. The line inversion driving method has a problem in that flicker occurs in a horizontal stripe pattern as crosstalk between horizontal liquid crystal cells exists.

The column inversion driving method causes the polarities of the liquid crystal cells to be the same in one column line and are inverted for each column line and frame as shown in FIGS. 4A and 4B. This column inversion driving method has a problem in that flicker occurs in a vertical stripe pattern as crosstalk exists between vertical liquid crystal cells.

In the dot inversion driving method, as shown in FIGS. 5A and 5B, polarities of the liquid crystal cells are opposite to all adjacent liquid crystal cells in the horizontal and vertical directions, and are reversed in each frame. Such a dot inversion driving method provides an image with superior image quality compared to other inversion methods by allowing flicker generated between adjacent liquid crystal cells in the vertical and horizontal directions to cancel each other.

However, in the dot inversion driving method, since the polarity of the pixel voltage signal supplied to the data lines in the data driver must be reversed in the horizontal and vertical directions, the variation amount of the pixel signal, that is, the frequency of the pixel signal, is higher than that of other inversion methods. Because of the large size, the power consumption is disadvantageous.

Accordingly, an object of the present invention is to provide a liquid crystal panel, a driving device and a method thereof, which can reduce power consumption.

Another object of the present invention is to provide a liquid crystal panel capable of minimizing vertical crosstalk, and a driving device and method thereof.

In order to achieve the above object, the liquid crystal panel according to the present invention is a liquid crystal panel having liquid crystal cells formed in each region defined by the intersection of the gate lines and the data lines, alternately with adjacent data lines along the vertical direction. An effective screen area for displaying an image including connected first liquid crystal cells; And a dummy area including second liquid crystal cells that are alternately connected to different data lines symmetrically adjacent to the effective screen area in a vertical direction.

The effective screen area and the dummy area may include a first horizontal line including data lines adjacent to the left side and liquid crystal cells connected through a thin film transistor; And a second horizontal line including liquid crystal cells connected through the data line adjacent to the right and the thin film transistor.

The first and second horizontal lines are alternately arranged in units of at least one horizontal line in the effective screen area, and symmetrically alternately with the effective screen area in the dummy area.

The dummy area may be disposed at at least one outer portion of an upper outer portion and a lower outer portion of the effective screen area.

The dummy region may include at least two horizontal lines.

The dummy region is characterized by being covered by a black matrix.

A liquid crystal panel driving apparatus according to the present invention is a device for driving a liquid crystal panel including a plurality of liquid crystal cells, wherein the liquid crystal panel includes first liquid crystal cells alternately connected to adjacent data lines along a vertical direction. A dummy area including an effective screen area for displaying an image and second liquid crystal cells alternately connected to different data lines symmetrically adjacent to the effective screen area in a vertical direction; A data driver for supplying a pixel signal having the same polarity for each data line to the effective screen area and a dummy pixel signal for maintaining a polarity opposite to the effective screen area for each of the data lines in the dummy area to the data line. Characterized in having a.

The data driver is characterized in that the polarity of the pixel signal to be supplied to the data line by the data line unit.

In addition, the driving apparatus of the present invention includes a control signal including a polarity control signal for supplying the pixel data to be supplied to the effective screen region and the dummy data to be supplied to the dummy region to the data driver and controlling the polarity of the pixel signal. And a timing controller for supplying signals to the data driver.

The timing controller reverses polarity in the driving period of the last horizontal line of the dummy area located in the upper outer portion of the effective screen area, and drives the last horizontal line of the dummy area in the next frame with the reversed polarity. A polarity control signal, which is maintained until inversion in the period, is supplied to the data driver.

The timing controller reverses the polarity in the driving period of the last horizontal line of the effective screen area, and converts the reversed polarity in the next frame via the driving period of the dummy area located at the lower outer portion of the valid screen area. And supplying a polarity control signal to the data driver, which is maintained until inversion in the driving period of the last horizontal line of the effective screen area.

The timing controller reverses polarity in the period driving the last horizontal line of the dummy area located in the upper outer area of the effective screen area, and then reverses the polarity in the period driving the last horizontal line of the effective screen area, The polarity control signal, in which the polarity is reversed on a frame basis, is supplied to the data driver.

The timing controller may supply the blank data supplied in the blank period between the frames or the pixel data to be supplied to the first or last horizontal line of the effective screen area as the dummy data.

The liquid crystal cells may be driven in a dot inversion form in which polarities are reversed with adjacent liquid crystal cells in vertical and horizontal directions.

According to an exemplary embodiment of the present invention, a method of driving a liquid crystal panel supplies a pixel signal having the same polarity to each data line to an effective screen area, and provides the effective screen area for each data line to a dummy area located outside the effective screen area. It is characterized in that the dummy pixel signal for maintaining the opposite polarity is supplied.

The pixel signal may be supplied to first liquid crystal cells alternately connected to different adjacent data lines in a vertical direction in the effective screen area.

The dummy pixel signal may be supplied to the second liquid crystal cells alternately connected to different adjacent data lines symmetrically with respect to the effective screen area in the dummy area.

The pixel signal and the dummy pixel signal supplied to the data line may be polarized inverted in units of the data line.

Polarities of the pixel signal and the dummy pixel signal are inverted in a period of driving the last horizontal line of the dummy area located at the upper edge of the effective screen area, and the inverted polarity is changed to the last of the dummy area in the next frame. The second horizontal line is characterized in that it is determined according to the polarity control signal to be maintained until inverted in the driving period.

The polarity of the pixel signal and the dummy pixel signal is inverted in the period driving the last horizontal line of the effective screen area, and the inverted polarity is the driving period of the dummy area located in the lower outer portion of the effective screen area. It is characterized in that it is determined in accordance with the polarity control signal to be maintained until it is reversed in the period of driving the last horizontal line of the effective screen region in the next frame.

The polarity of the pixel signal and the dummy pixel signal are reversed in polarity in the period of driving the last horizontal line of the dummy area located in the upper outer area of the effective screen area, and then driving the last horizontal line of the effective screen area. The polarity is reversed in the period and is determined according to the polarity control signal which is polarized again in frame units.

The dummy data may be provided with blank data supplied in a blank period between frames or pixel data to be supplied in a first or last horizontal line of the effective screen area.

The liquid crystal cells may be driven in a dot inversion form in which polarities are reversed with adjacent liquid crystal cells in the vertical and horizontal directions.

Other objects and advantages of the present invention in addition to the above objects will become apparent from the detailed description of the embodiments with reference to the accompanying drawings.

Before describing preferred embodiments of the present invention, a liquid crystal display device, which is a direct technical background of the present invention, will be described.

The liquid crystal display device mainly adopts a dot inversion driving method for improving image quality while preventing liquid crystal deterioration by alternatingly driving liquid crystal cells. However, in the dot inversion driving method, the polarity of the pixel signal must be inverted in units of liquid crystal cells, so that the amount of variation of the pixel signal becomes large, thereby causing a large power consumption. In order to solve the large power consumption problem of the dot inversion driving method, the present applicant patents a liquid crystal display device and a driving method capable of driving the liquid crystal cells in the dot inversion method while driving the data lines in the column inversion method. Suggested in application 2002-37740.

6 illustrates a liquid crystal display device (hereinafter, referred to as "Z-inversion liquid crystal display device") proposed in Patent Application No. 2002-37740.

The liquid crystal display shown in FIG. 6 includes a liquid crystal panel 12 having a liquid crystal cell matrix, a gate driver 14 for driving gate lines GL1 to GLn of the liquid crystal panel 12, and a liquid crystal panel 12. A data driver 16 for driving the data lines DL1 to DLm + 1 and a timing controller 18 for controlling the gate driver 14 and the data driver 16.

The liquid crystal panel 12 includes a liquid crystal cell including a thin film transistor TFT formed at each region defined by the intersection of the gate lines GL1 to GLn and the data lines DL1 to DLm + 1, and the pixel electrode PXL. Equipped. The thin film transistor TFT supplies the pixel signals from the data lines DL1 to DLm + 1 to the pixel electrode PXL in response to the scan signal from the gate line GL. The pixel electrode PXL adjusts the light transmittance by driving a liquid crystal positioned between the common electrode (not shown) in response to the pixel signal. The liquid crystal cell is alternately connected to different data lines DL adjacent to each other in the vertical direction through the thin film transistor TFT.

For example, the liquid crystal cell of the odd horizontal line connected to the odd gate lines GL1, GL3, GL5, ... is connected to the data line DLi adjacent to the left (where i is a positive integer). The pixel signal is supplied. On the other hand, the liquid crystal cell of the even-numbered horizontal line connected to the even-numbered gate lines GL2, GL4, GL6, ... is connected to the data line DLi + 1 adjacent to the right to receive the pixel signal.

The timing controller 18 generates timing control signals for controlling the gate driver 14 and the data driver 16, and supplies the pixel data signal to the data driver 16. The gate timing control signals generated by the timing controller 18 include a gate start pulse GSP, a gate shift clock signal GSC, a gate output enable signal GOE, and the like. The data timing control signals generated by the timing controller 18 include a source start pulse SSP, a source shift clock signal SSC, a source output enable signal SOE, a polarity control signal POL, and the like.

The gate driver 14 sequentially supplies scan signals to the gate lines GL1 to GLn using the gate timing control signals. Accordingly, the gate driver 14 causes the thin film transistors TFT to be driven in units of horizontal lines in response to the scan signal.

The data driver 16 converts the input pixel data into an analog pixel signal and outputs one horizontal line of pixel signals in one horizontal period during which a scan signal is supplied to the gate line GL. To feed. In this case, the data driver 16 converts the pixel data into the pixel signal using the gamma voltages supplied from the gamma voltage generator (not shown).

The data driver 16 supplies the pixel signals in a column inversion manner so that the pixel signals supplied to the data lines DL1 to DLm + 1 have polarities opposite to those of the adjacent data lines DL. Let it be reversed in units. In other words, the data driver 16 supplies pixel signals of opposite polarities to the odd data lines DL1, DL3, ... and even data lines DL2, DL4, ..., and the data. The polarity of the pixel signal supplied to the lines DL1 to DLm + 1 is inverted in units of frames.

In this case, since the pixel electrodes PXL are arranged in a zigzag pattern based on the data lines DL1 to DLm + 1 to which the pixel signals are supplied in a column inversion manner, the liquid crystal cells including the pixel electrodes PXL are dots. It is driven in an inversion manner.

In particular, the data driver 16 alternately outputs the pixel signals in the horizontal period in order to supply the correct pixel signals to the pixel electrodes PXL arranged in a zigzag pattern along the data lines DL1 to DLm + 1. Will change. In detail, when the pixel signal is supplied to the liquid crystal cells PXL connected to the right side of the data lines DL1 to DLm + 1, the data driver 16 may include the first to mth data lines DL1 to DLm. M effective pixel signals are supplied to the m + 1th data line DLm + 1, and a blank signal is supplied. In contrast, when the pixel signal is supplied to the liquid crystal cells PXL connected to the left side of the data lines DL1 to DLm + 1, the data driver 16 shifts m effective pixel signals to the right by one channel. The second to m + 1 th data lines DL2 to DLm + 1 are supplied, and a blank signal is supplied to the first data line DL1. Here, the blank signal means a don't care signal.

Accordingly, the image quality is improved by the liquid crystal cells PXL driven by the dot inversion method, and the data driver 16 supplies the pixel signal by the column inversion method. It is possible to significantly reduce power consumption.

Meanwhile, in the liquid crystal panel 12 illustrated in FIG. 6, a voltage deviation of positive (+) or negative (−) is generated between the data line DL and the pixel electrode PXL adjacent thereto. In particular, when each of the data lines DL1 to DLm + 1 maintains the same polarity for one frame as in the liquid crystal panel 12 illustrated in FIG. 6, the positive polarity between the data line DL and the adjacent pixel electrode PXL A voltage deviation of positive or negative polarity is applied to the data line DL in the same direction for one frame, thereby distorting the pixel signal on the data line DL. The distorted pixel signal on the data line DL is induced into the pixel electrodes PXL, and the distorted pixel signal is charged in the pixel electrodes PXL. As a result, vertical crosstalk occurs when the crosstalk test pattern is displayed on a specific region of the liquid crystal panel 12.

In order to minimize vertical crosstalk generated in the Z-inversion liquid crystal display, the present invention reverses the polarity of the pixel signal supplied to the data line at least once during one frame. To this end, the present invention further includes dummy liquid crystal cells for polarity inversion of the pixel signal supplied to the data line. These dummy liquid crystal cells are configured to be added to the upper, lower, or upper portion of the liquid crystal panel so as not to affect the effective screen area of the liquid crystal panel.

FIG. 7 illustrates a Z-inversion liquid crystal display device according to a first embodiment of the present invention.

7 shows a liquid crystal panel 22 having a liquid crystal cell matrix and a gate driver 24 for driving the gate lines GL-2 to GLn of the liquid crystal panel 22. And a data driver 26 for driving the data lines DL1 to DLm + 1 of the liquid crystal panel 22, and a timing controller 28 for controlling the gate driver 24 and the data driver 26. Equipped.

The liquid crystal panel 22 includes liquid crystal cells 25 formed at regions defined by intersections of the gate lines GL-2 to GLn and the data lines DL1 to DLm + 1. The liquid crystal cells 25 may include first liquid crystal cells 21 arranged in a matrix in the effective screen area EA, and second liquid crystal cells arranged in a matrix in a dummy area DA located at an upper outer portion. Field 23 is provided. Here, the first liquid crystal cells 21 of the effective screen area EA are used for image display. The second liquid crystal cells 23 of the dummy area DA are used to reverse polarity of the data line DL. The dummy area DA in which the second liquid crystal cells 23 are positioned is blocked by a black matrix (not shown) and thus is not used for image display. As shown in FIG. 7, the dummy area DA includes at least two horizontal lines including the second liquid crystal cells 23.

Each of the liquid crystal cells 25 includes a thin film transistor TFT and a pixel electrode PXL.

The thin film transistor TFT supplies a pixel signal from the data line DL to the pixel electrode PXL in response to a scan signal from the gate line GL. The pixel electrode PXL drives the liquid crystal positioned between the common electrode (not shown) in response to the supplied pixel signal. Accordingly, the liquid crystal cells 25 display an image by adjusting the light transmittance according to the driving of the liquid crystal.

In particular, the liquid crystal cells 25 are alternately connected to adjacent data lines DLi and DLi + 1 in a vertical direction for dot inversion driving. In other words, the liquid crystal panel 25 is connected to the first horizontal line composed of the liquid crystal cells 25 connected to the data line DLi adjacent to the left side, and connected to the data line DLi + 1 adjacent to the right side. The second horizontal line includes liquid crystal cells 25. The first horizontal line and the second horizontal line are alternately arranged in units of one horizontal line as shown in FIG. 7 when dot inversion driving is performed. On the contrary, in the case of inversion driving of two dots or three dots or more, the first horizontal line and the second horizontal line are alternately arranged in units of two or three horizontal lines.                     

The order of arrangement of the first and second horizontal lines in the effective screen area EA and the dummy area DA is reversed. This is to invert the polarity of the pixel signal supplied to the data line DL while the liquid crystal cells 25 are driven in dot inversion while driving the dummy area DA.

For example, in the effective screen area EA shown in FIG. 7, the odd horizontal lines driven by the odd-numbered gate lines GL1, GL3, GL5, ..., GLn-1 are configured as the first horizontal line. And the even horizontal line driven by the even-numbered gate lines GL2, GL4, GL6, ..., GLn is composed of a second horizontal line. On the other hand, in the dummy area DA, the odd horizontal line driven by the odd gate line GL-2 is constituted by the second horizontal line, and the even horizontal line driven by the even gate line GL-1. Consists of a first horizontal line.

The timing controller 28 generates timing control signals for controlling the gate driver 24 and the data driver 26, and supplies the pixel data signal to the data driver 26. The gate timing control signals generated by the timing controller 28 include a gate start pulse GSP, a gate shift clock signal GSC, a gate output enable signal GOE, and the like. The data timing control signals generated by the timing controller 28 include a source start pulse SSP, a source shift clock signal SSC, a source output enable signal SOE, a polarity control signal POL, and the like.

In particular, the timing controller 28 may output a polarity control signal POL that causes the polarity of the pixel signal supplied to the data line DL to be reversed when the dummy area DA is driven and when the effective screen area EA is driven. Occurs.

Specifically, as illustrated in FIGS. 8A and 8B, the timing controller 28 receives the polarity control signal POL in which the polarity is reversed in the horizontal period during which the last gate line GL-1 of the dummy area DA is driven. Occurs. As shown in FIG. 8B, the polarity inverted polarity control signal POL maintains the same polarity until the last gate line GL-1 of the dummy area DA is driven in the next frame. The polarity control signal POL is again inverted in the horizontal period during which the last gate line GL-1 of the dummy area DA is driven. When the Z-inversion liquid crystal display shown in FIG. 6 is driven, the timing controller 28 drives the dummy region DA when the polarity inversion point, which was the blank period between the vertical periods, is driven in the liquid crystal panel 22 of FIG. 7. The polarity control signal POL shown in FIGS. 8A and 8B is generated by delaying until the horizontal period during which the last gate line GL-1 of FIG. The polarity control signal POL causes the data line DL to reverse at least one polarity within one vertical period.

Then, the timing controller 28 supplies the effective pixel data supplied to the effective screen area EA of the liquid crystal panel 22 to the data driver 26, and the dummy area DA before supplying the effective pixel data. In addition, the dummy data to be supplied is additionally supplied. The timing controller 28 stores and supplies the blank data supplied in the blank period between the vertical periods as the dummy data or the effective pixel data supplied in the last horizontal period of the previous frame.

The gate driver 24 sequentially supplies scan signals to the gate lines GL-2 to GLn using the gate timing control signals from the timing controller 28. Accordingly, the gate driver 24 causes the thin film transistors TFT to be driven in units of horizontal lines in response to the scan signal.

The data driver 26 converts the input dummy data and pixel data into analog pixel signals, and converts one horizontal line of pixel signals into horizontal lines during which a scan signal is supplied to the gate line GL. Supply to 1). In this case, the data driver 26 converts the pixel data into the pixel signal using the gamma voltages supplied from the gamma voltage generator (not shown). In addition, the data driver 26 determines the polarity of the pixel signal in response to the polarity control signal POL from the timing controller 28 when converting the pixel data into the pixel signal.

Specifically, the data driver 26 supplies the data lines DL1 to DLm + 1 in response to the polarity control signal POL that performs one polarity inversion within one vertical period as shown in FIGS. 8A and 8B. The polarity of the pixel signal to be determined is determined. In response to the polarity control signal POL, the data driver 26 supplies the pixel signal in a column inversion manner so that the pixel signal supplied to each of the data lines DL1 to DLm + 1 is adjacent to the adjacent data line DL. Have opposite polarity. In addition, the data driver 26 causes the polarity of the pixel signal supplied to the data line DL to be opposite in the dummy area DA and the effective screen area EA in response to the polarity control signal POL. When the data driver 26 drives the effective screen area EA in response to the polarity control signal POL, the polarity of the pixel signal supplied to the data line DL is driven by the dummy area DA of the next frame. The same operation is maintained until the same time period, and is reversed when the effective screen area EA of the next frame is driven.

For example, when the data driver 26 drives the dummy area DA in the odd frame, the odd data lines DL1 and DL3 in response to the polarity control signal POL in the low state as shown in FIG. 8A. , DLm-1, DLm + 1) have a negative polarity signal (BK), and the even-numbered data lines DL2, DL4, ..., DLm have a positive polarity (+). The blank signal BK is supplied. On the contrary, when driving the effective screen area EA, positive polarity (I) is applied to the odd-numbered data lines DL1, DL3, DLm-1, and DLm + 1 in response to the polarity control signal POL inverted to the high state. The negative pixel signals R, G, and B are supplied to the even-numbered data lines DL2, DL4, ..., and DLm.

When driving the dummy area DA in the even frame, the data driver 26 may have the odd-numbered data lines DL1 and DL3 in response to the polarity control signal POL maintaining a high state as shown in FIG. 8B. In the DLm-1 and DLm + 1, the positive blank signal BK is applied, and in the even-numbered data lines DL2, DL4, ..., DLm, the negative blank signal BK is applied. ). On the other hand, when driving the effective screen area EA, the data driver 26 radiates the odd-numbered data lines DL1, DL3, ..., DLm- in response to the polarity control signal POL inverted to the low state. 1, DLm + 1 has negative polarity (-) pixel signals R, G, and B, and even-numbered data lines DL2, DL4, ..., DLm have positive polarity (+) pixel signals ( R, G, B) is supplied.

As shown in FIGS. 8A and 8B, the data driver 26 alternately blanks the blank signal BK to the first data line DL1 and the m + 1th data line DLm + 1 every horizontal period. To supply.

Thus, the liquid crystal display according to the present invention further includes a dummy region for polarity inversion of the data line to which the pixel signal is supplied in a column inversion manner. Accordingly, the application direction of the voltage deviation between the data line affecting the data line and the adjacent pixel electrode is inverted by driving the dummy region, thereby minimizing the distortion of the pixel signal on the data line due to the voltage deviation. As a result, the vertical crosstalk phenomenon can be minimized as the data line maintains the same polarity for one frame.

9 illustrates a Z-inversion liquid crystal display device according to a second embodiment of the present invention.

9 shows a liquid crystal panel 32 having a liquid crystal cell matrix and a gate driver 34 for driving the gate lines G1 to GLn + 2 of the liquid crystal panel 32. And a data driver 36 for driving the data lines DL1 to DLm + 1 of the liquid crystal panel 32, and a timing controller 38 for controlling the gate driver 34 and the data driver 36. Equipped.

The liquid crystal panel 32 includes liquid crystal cells 35 formed at regions defined by intersections of the gate lines GL1 to GLn + 2 and the data lines DL1 to DLm + 1. The liquid crystal cells 35 may include first liquid crystal cells 31 arranged in a matrix in the effective screen area EA, and second liquid crystal cells arranged in a matrix in a dummy area DA located at a lower outer portion. Field 33 is provided. Here, the first liquid crystal cells 31 of the effective screen area EA are used for image display. Second liquid crystal cells 33 of the dummy area DA are used to reverse polarity of the data line DL. The dummy area DA in which the second liquid crystal cells 33 are positioned is blocked by a black matrix (not shown) and thus is not used for image display. As shown in FIG. 9, the dummy area DA includes at least two horizontal lines including the second liquid crystal cells 33.

Each of the liquid crystal cells 35 includes a thin film transistor TFT and a pixel electrode PXL.

The thin film transistor TFT supplies a pixel signal from the data line DL to the pixel electrode PXL in response to a scan signal from the gate line GL. The pixel electrode PXL drives the liquid crystal positioned between the common electrode (not shown) in response to the supplied pixel signal. Accordingly, the liquid crystal cells 35 display an image by adjusting the light transmittance according to the driving of the liquid crystal.

In particular, the liquid crystal cells 35 are alternately connected to adjacent data lines DLi and DLi + 1 in a vertical direction for dot inversion driving. In other words, the liquid crystal panel 35 includes a first horizontal line composed of liquid crystal cells 35 connected to a data line DLi adjacent to the left side, and a liquid crystal connected to a data line DLi + 1 adjacent to the right side. It has a second horizontal line composed of cells 35. The first horizontal line and the second horizontal line are alternately arranged in units of one horizontal line as shown in FIG. 9 when dot inversion driving is performed. On the contrary, in the case of inversion driving of two dots or three dots or more, the first horizontal line and the second horizontal line are alternately arranged in units of two or three horizontal lines.

The order of arranging the first and second horizontal lines in the effective screen area EA and the dummy area DA is reversed. This is to invert the polarity of the pixel signal supplied to the data line DL while the liquid crystal cells 35 are driven in dot inversion while driving the dummy area DA.

For example, in the effective screen area EA shown in FIG. 9, the radix horizontal line driven by the radix gate lines GL1, GL3, GL5,..., GLn-1 is configured as the first horizontal line. And the even horizontal line driven by the even-numbered gate lines GL2, GL4, GL6, ..., GLn is composed of a second horizontal line. On the other hand, in the dummy area DA, the odd horizontal line driven by the odd gate line GLn + 1 is composed of a second horizontal line, and the even horizontal line driven by the even gate line GLn + 2. Consists of a first horizontal line.

The timing controller 38 generates timing control signals for controlling the gate driver 34 and the data driver 36, and supplies the pixel data signal to the data driver 36. The gate timing control signals generated by the timing controller 38 include a gate start pulse GSP, a gate shift clock signal GSC, a gate output enable signal GOE, and the like. The data timing control signals generated by the timing controller 38 include a source start pulse SSP, a source shift clock signal SSC, a source output enable signal SOE, a polarity control signal POL, and the like.

In particular, the timing controller 38 may output a polarity control signal POL such that the polarity of the pixel signal supplied to the data line DL is reversed when the dummy area DA is driven and when the effective screen area EA is driven. Occurs.                     

For example, as illustrated in FIGS. 10A and 10B, the timing controller 38 receives the polarity control signal POL whose polarity is reversed in the horizontal period in which the last gate line GLn of the effective screen area EA is driven. Occurs. The polarity inverted polarity control signal POL maintains the same polarity until the last gate line GLn of the effective screen area EA is driven in the next frame as shown in FIG. 10B. The polarity control signal POL is again inverted in the horizontal period during which the last gate line GLn of the effective screen area EA is driven. In the case of driving the Z-inversion liquid crystal display shown in FIG. 6, the timing controller 38 controls the effective screen area when driving the liquid crystal panel 32 of FIG. 9 at a polarity inversion time that was a blank period between vertical periods. EA) The polarity control signal POL shown in FIGS. 10A and 10B is generated by moving to the horizontal period during which the last gate line GLn is driven. The polarity control signal POL causes the data line DL to reverse at least one polarity within one vertical period.

The timing controller 38 supplies the effective pixel data supplied to the effective screen area EA of the liquid crystal panel 32 to the data driver 36, and after supplying the effective pixel data, the dummy area DA. In addition, the dummy data to be supplied is additionally supplied. The timing controller 38 stores and supplies the blank data supplied in the blank period between the vertical periods as the dummy data or the effective pixel data supplied in the last horizontal period of the previous frame.

The gate driver 34 sequentially supplies scan signals to the gate lines GL1 to GLn + 2 using the gate timing control signals from the timing controller 38. Accordingly, the gate driver 34 causes the thin film transistors TFT to be driven in units of horizontal lines in response to the scan signal.

The data driver 36 converts the input pixel data and the dummy data into analog pixel signals and outputs one horizontal line of pixel signals for each horizontal period during which a scan signal is supplied to the gate line GL. Supply to 1). In this case, the data driver 36 converts the pixel data into the pixel signal using the gamma voltages supplied from the gamma voltage generator (not shown). Further, the data driver 36 determines the polarity of the pixel signal in response to the polarity control signal POL from the timing controller 38 when converting the pixel data into the pixel signal.

Specifically, the data driver 36 is supplied to the data lines DL1 to DLm + 1 in response to the polarity control signal POL that performs one polarity inversion within one vertical period as shown in FIGS. 10A and 10B. The polarity of the pixel signal to be determined is determined. In response to the polarity control signal POL, the data driver 36 supplies a pixel signal in a column inversion manner so that the pixel signal supplied to each of the data lines DL1 to DLm + 1 is adjacent to the adjacent data line DL. Have opposite polarity. In addition, the data driver 36 causes the polarity of the pixel signal supplied to the data line DL to be opposite in the effective screen area EA and the dummy area DA in response to the polarity control signal POL. In this case, in response to the polarity control signal POL, the data driver 36 has the same pixel signal polarity on the data line DL opposite to the dummy area DA until the period in which the effective screen area EA of the next frame is driven. It is kept to be inverted and inverted when the dummy area DA of the next frame is driven.                     

For example, when the data driver 36 drives the effective screen area EA in an odd frame, the odd data lines DL1, in response to the polarity control signal POL in the high state, as shown in FIG. 10A. The pixel signals R, G, and B of positive polarity (+) are applied to the DL3, DLm-1, and DLm + 1, and the negative polarity (-) is applied to the even-numbered data lines DL2, DL4, ..., DLm. The pixel signals R, G, and B are supplied. In contrast, when driving the dummy area DA, the odd-numbered data lines DL1, DL3,..., DLm-1, and DLm + 1 are in response to the polarity control signal POL inverted to the low state. The negative blank signal BK is supplied to the even-numbered data lines DL2, DL4,..., DLm, and the positive blank signal BK is supplied to the even-numbered data lines DL2, DL4, ..., DLm.

In the even frame, when the data driver 26 drives the effective screen area EA as illustrated in FIG. Negative polarity (-) pixel signals R, G, and B are applied to the DL3, ..., DLm-1, DLm + 1, and positive to the even-numbered data lines DL2, DL4, ..., DLm. The pixel signals R, G, and B of polarity (+) are supplied. On the other hand, when driving the dummy area DA, the data driver 36 transmits the odd-numbered data lines DL1, DL3, DLm-1, and DLm + 1 in response to the polarity control signal POL inverted to the high state. ) Is supplied with a blank signal BK of positive polarity (+) and a blank signal (BK) of negative polarity (-) to even-numbered data lines DL2, DL4,..., DLm.

10A and 10B, the data driver 36 alternately applies the blank signal BK to the first data line DL1 and the m + 1th data line DLm + 1 every horizontal period. Supply.                     

Thus, the liquid crystal display according to the present invention further includes a dummy region for polarity inversion of the data line to which the pixel signal is supplied in a column inversion manner. Accordingly, the application direction of the voltage deviation between the data line affecting the data line and the adjacent pixel electrode is inverted by driving the dummy region, thereby minimizing the distortion of the pixel signal on the data line due to the voltage deviation. As a result, the vertical crosstalk phenomenon can be minimized as the data line maintains the same polarity for one frame.

FIG. 11 illustrates a Z-inversion liquid crystal display according to a third exemplary embodiment of the present invention.

11 shows a liquid crystal panel 42 having a liquid crystal cell matrix and a gate driver for driving gate lines GL-2 to GLn + 2 of the liquid crystal panel 42. 44, a data driver 46 for driving the data lines DL1 to DLm + 1 of the liquid crystal panel 42, and a timing controller 48 for controlling the gate driver 44 and the data driver 46. ).

The liquid crystal panel 42 includes liquid crystal cells 45 formed at regions defined by intersections of the gate lines GL-2 to GLn + 2 and the data lines DL1 to DLm + 1. The liquid crystal cells 45 may include the first liquid crystal cells 41 arranged in a matrix in the effective screen area EA, and the first and second dummy areas DA1, respectively positioned at the upper outer portion and the lower outer portion, respectively. Second liquid crystal cells 43 arranged in a matrix form on the DA2 are provided. Here, the first liquid crystal cells 41 of the effective screen area EA are used for image display. In addition, the second liquid crystal cells 43 of the first and second dummy regions DA1 and DA2 are used to reverse the polarity of the data line DL. The first and second dummy areas DA1 and DA2 in which the second liquid crystal cells 43 are positioned are blocked by a black matrix and are not used for image display. Each of the first and second dummy areas DA1 and DA2 includes at least two horizontal lines including the second liquid crystal cells 43 as shown in FIG. 11.

Each of the liquid crystal cells 45 includes a thin film transistor TFT and a pixel electrode PXL.

The thin film transistor TFT supplies a pixel signal from the data line DL to the pixel electrode PXL in response to a scan signal from the gate line GL. The pixel electrode PXL drives the liquid crystal positioned between the common electrode (not shown) in response to the supplied pixel signal. Accordingly, the liquid crystal cells 45 display an image by adjusting the light transmittance according to the driving of the liquid crystal.

In particular, the liquid crystal cells 45 are alternately connected to adjacent data lines DLi and DLi + 1 in the vertical direction for dot inversion driving. In other words, the liquid crystal panel 45 is connected to the first horizontal line composed of the liquid crystal cells 45 connected to the data line DLi adjacent to the left side, and to the data line DLi + 1 adjacent to the right side. The second horizontal line includes liquid crystal cells 45. The first horizontal line and the second horizontal line are alternately arranged in units of one horizontal line as shown in FIG. 11 when dot inversion driving is performed. On the contrary, in the case of inversion driving of two dots or three dots or more, the first horizontal line and the second horizontal line are alternately arranged in units of two or three horizontal lines.

The order of arranging the first and second horizontal lines in the effective screen area EA and the dummy areas DA1 and DA2 is reversed. This is to invert the polarity of the pixel signal supplied to the data line DL while the liquid crystal cells 45 are driven in dot inversion while driving the dummy areas DA1 and DA2.

For example, in the effective screen area EA shown in FIG. 11, the radix horizontal line driven by the radix gate lines GL1, GL3, GL5,..., GLn-1 is configured as the first horizontal line. And the even horizontal line driven by the even-numbered gate lines GL2, GL4, GL6, ..., GLn is composed of a second horizontal line. On the other hand, in the dummy areas DA1 and DA2, the odd horizontal lines driven by the odd gate lines GL-2 and GLn + 1 are configured as second horizontal lines and the even gate lines GL-1 and GLn. The even horizontal line driven by +2) consists of a first horizontal line.

The timing controller 48 generates timing control signals for controlling the gate driver 44 and the data driver 46, and supplies the pixel data signal to the data driver 46. The gate timing control signals generated by the timing controller 48 include a gate start pulse GSP, a gate shift clock signal GSC, a gate output enable signal GOE, and the like. The data timing control signals generated by the timing controller 48 include a source start pulse SSP, a source shift clock signal SSC, a source output enable signal SOE, a polarity control signal POL, and the like.

In particular, the timing controller 48 controls the polarity control signal POL such that the polarity of the pixel signal supplied to the data line DL is reversed when driving the dummy areas DA1 and DA2 and when driving the effective screen area EA. Will occur).

Specifically, as shown in FIGS. 12A and 12B, the polarity control signal POL generated by the timing controller 48 is a horizontal period during which the last gate line GL-1 of the first dummy area DA1 is driven. Polarity is reversed at, and then polarity is reversed again in the horizontal period during which the last gate line GLn of the effective screen area EA is driven. In addition, the polarity control signal POL is reversed in polarity in units of frames. The polarity control signal POL causes the data line DL to perform at least two polarity inversions within one vertical period.

The timing controller 48 supplies the effective pixel data supplied to the effective screen area EA of the liquid crystal panel 42 to the data driver 46, and the dummy area before and after the effective pixel data is supplied. The dummy data to be supplied to (DA1, DA2) is additionally supplied. The timing controller 48 stores and supplies the blank data supplied in the blank period between the vertical periods as the dummy data or the effective pixel data supplied in the last horizontal period of the previous frame.

The gate driver 44 sequentially supplies scan signals to the gate lines GL-2 to GLn + 2 using the gate timing control signals from the timing controller 48. Accordingly, the gate driver 44 causes the thin film transistors TFT to be driven in units of horizontal lines in response to the scan signal.

The data driver 46 converts the input dummy data and pixel data into analog pixel signals, and converts one horizontal line of pixel signals into horizontal lines during which a scan signal is supplied to the gate line GL. Supply to 1). In this case, the data driver 46 converts the pixel data into the pixel signal using the gamma voltages supplied from the gamma voltage generator (not shown). Further, the data driver 46 determines the polarity of the pixel signal in response to the polarity control signal POL from the timing controller 48 when converting the pixel data into the pixel signal.

Specifically, as shown in FIGS. 12A and 12B, the data driver 46 may perform data lines DL1 to DLm + 1 in response to the polarity control signal POL that performs at least two polarity inversions within one vertical period. The polarity of the pixel signal supplied to is determined. In response to the polarity control signal POL, the data driver 46 supplies the pixel signal in a column inversion manner so that the pixel signal supplied to each of the data lines DL1 to DLm + 1 is adjacent to the adjacent data line DL. Have opposite polarity. In addition, the data driver 46 causes the polarity of the pixel signal supplied to the data line DL to be opposite in the dummy areas DA1 and DA2 and the effective screen area EA in response to the polarity control signal POL. The data driver 46 inverts the polarity of the pixel signal supplied to the data line DL in units of frames in response to the polarity control signal POL.

For example, when the data driver 46 drives the first dummy area DA1 in the odd frame, the odd data lines DL1 in response to the polarity control signal POL in the low state as shown in FIG. 12A. , DL3, ..., DLm-1, DLm + 1) have a negative signal (BK) of negative polarity, and positive polarity (+) for even-numbered data lines DL2, DL4, ..., DLm. Is supplied with a blank signal BK. On the contrary, when driving the effective screen area EA, the data driver 46 has the odd-numbered data lines DL1, DL3, DLm-1, and DLm + in response to the polarity control signal POL inverted to a high state. 1) positive polarity (+) pixel signals R, G, and B, and even-numbered data lines DL2, DL4, ..., DLm have negative polarity (-) pixel signals (R, G, B). Supply B). When the second dummy area DA2 is driven, the data driver 46 returns the odd-numbered data lines DL1, DL3,..., DLm in response to the polarity control signal POL inverted to the low state again. A negative signal (BK) of negative polarity (-) is applied to -1 and DLm + 1, and a blank signal (BK) of positive polarity is provided to even-numbered data lines (DL2, DL4, ..., DLm). Supply.

In addition, when driving the first dummy area DA1 in the even frame, the data driver 46 may output the odd-numbered data lines in response to the polarity control signal POL inverted to the high state as shown in FIG. 12B. Blank signal BK of positive polarity (+) for DL1, DL3, DLm-1, DLm + 1), and negative polarity (-) for even-numbered data lines DL2, DL4, ..., DLm Supply the signal BK. In contrast, when driving the effective screen area EA, the data driver 46 has the odd-numbered data lines DL1, DL3,..., DLm− in response to the polarity control signal POL inverted in the low state. 1, DLm + 1 has negative polarity (-) pixel signals R, G, and B, and even-numbered data lines DL2, DL4, ..., DLm have positive polarity (+) pixel signals ( R, G, B) is supplied. When the second dummy area DA2 is driven, the data driver 46 may radiate the odd-numbered data lines DL1, DL3, DLm-1, and DLm + in response to the polarity control signal POL inverted to a high state. A blank signal BK of positive polarity (+) is supplied to 1), and a blank signal BK of negative polarity (−) is supplied to even-numbered data lines DL2, DL4, ..., DLm.

12A and 12B, the data driver 26 alternately applies the blank signal BK to the first data line DL1 and the m + 1th data line DLm + 1 every horizontal period. Supply.                     

Thus, the liquid crystal display according to the present invention further includes a dummy region for polarity inversion of the data line to which the pixel signal is supplied in a column inversion manner. Accordingly, the application direction of the voltage deviation between the data line affecting the data line and the adjacent pixel electrode is inverted by driving the dummy region, thereby minimizing the distortion of the pixel signal on the data line due to the voltage deviation. As a result, the vertical crosstalk phenomenon can be minimized as the data line maintains the same polarity for one frame.

As described above, the liquid crystal panel according to the present invention further includes a dummy region for polarizing the data line driven in a column inversion scheme in which the polarity is reversed in units of data lines at least once in one frame. The apparatus and method for driving the liquid crystal panel according to the present invention cause the polarity of the pixel signal on the data line when driving the dummy region to be opposite to that for driving the effective screen region. Accordingly, the application direction of the voltage deviation between the data line affecting the data line and the adjacent pixel electrode is reversed by driving the dummy region, thereby minimizing the distortion of the pixel signal on the data line due to the voltage deviation. As a result, it is possible to minimize vertical crosstalk due to the data lines maintaining the same polarity for one frame, thereby improving image quality while reducing power consumption.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (26)

A liquid crystal panel comprising liquid crystal cells formed at respective regions defined by intersections of gate lines and data lines. An effective screen area for displaying an image including first liquid crystal cells alternately connected to adjacent data lines along a vertical direction; A dummy area including second liquid crystal cells alternately connected to different data lines symmetrically adjacent to the effective screen area in a vertical direction, And the second liquid crystal cells of the dummy region are located at the intersection of at least two horizontal lines and the data lines, and the polarity of the pixel signal supplied to the data lines is inverted at least once during one frame. The method of claim 1, The effective screen area and the dummy area A first horizontal line including liquid crystal cells connected through a data line and a thin film transistor adjacent to the left side; And a second horizontal line composed of liquid crystal cells connected through a data line and a thin film transistor adjacent to the right side. The method of claim 1, The first and second horizontal line And at least one horizontal line in the effective screen area, and are alternately arranged symmetrically with the effective screen area in the dummy area. The method of claim 1, The dummy area is And a liquid crystal panel disposed at at least one outer portion of an upper outer portion and a lower outer portion of the effective screen area. delete The method of claim 1, And the dummy region is covered by a black matrix. In an apparatus for driving a liquid crystal panel comprising a plurality of liquid crystal cells, The liquid crystal panel includes an effective screen area for displaying an image including first liquid crystal cells alternately connected to different data lines adjacent in a vertical direction, and symmetrically adjacent to the effective screen area in a vertical direction. A dummy region including second liquid crystal cells alternately connected to different data lines, A data driver for supplying a pixel signal maintaining the same polarity for each data line to the effective screen area and a dummy pixel signal for maintaining a polarity opposite to the effective screen area for each of the data lines in the dummy area to the data line. Liquid crystal panel drive device characterized in that it comprises a. The method of claim 7, wherein The effective screen area and the dummy area A first horizontal line including liquid crystal cells connected through a data line and a thin film transistor adjacent to the left side; And a second horizontal line composed of liquid crystal cells connected through a data line and a thin film transistor adjacent to the right side. The method of claim 7, wherein The first and second horizontal line And alternately arranged in units of at least one horizontal line in the effective screen area, and alternately arranged symmetrically with the effective screen area in the dummy area. The method of claim 7, wherein The dummy area is And a liquid crystal panel driving apparatus arranged on at least one outer edge of the upper outer portion and the lower outer portion of the effective screen area. The method of claim 7, wherein And the data driver inverts polarities of pixel signals to be supplied to the data lines in units of the data lines. The method of claim 7, wherein Supplying the data driver with control signals including pixel data to be supplied to the effective screen area and dummy data to be supplied to the dummy area to the data driver and a polarity control signal for controlling the polarity of the pixel signal. And a timing control unit. The method of claim 12, The timing controller The polarity is reversed in the period of driving the last horizontal line of the dummy area located in the upper outer portion of the effective screen area, and the reversed polarity is reversed in the period in which the last horizontal line of the dummy area is driven in the next frame. And a polarity control signal maintained until the data driver is supplied. The method of claim 12, The timing controller The polarity is reversed in the driving period of the last horizontal line of the effective screen area, and the inverted polarity of the valid screen area is changed in the next frame via the driving period of the dummy area located at the lower edge of the effective screen area. And a polarity control signal which is maintained until inversion in the period of driving the last horizontal line to the data driver. The method of claim 12, The timing controller Polarity is reversed in the period of driving the last horizontal line of the dummy area located in the upper outer area of the effective screen area, and then polarity is reversed in the period of driving the last horizontal line of the effective screen area, again in frame units And a polarity inversion polarity control signal supplied to the data driver. The method of claim 12, The timing controller And the blank data supplied in the blank period between the frames as the dummy data, or the pixel data to be supplied to the first or last horizontal line of the effective screen area. The method of claim 7, wherein And driving the liquid crystal cells in a dot inversion form in which polarization is reversed with adjacent liquid crystal cells in vertical and horizontal directions. Supply a pixel signal that maintains the same polarity for each data line to the effective screen region, and supply a dummy pixel signal that maintains the polarity opposite to the effective screen region for each data line to a dummy region located outside the effective screen region. A method of driving a liquid crystal panel, characterized in that. The method of claim 18, And the pixel signal is supplied to first liquid crystal cells alternately connected to adjacent different data lines in a vertical direction in the effective screen area. The method of claim 19, The dummy pixel signal is supplied to second liquid crystal cells alternately connected to different adjacent data lines symmetrically with respect to the effective screen area in the dummy area. Driving method. The method of claim 18, And a pixel signal and a dummy pixel signal supplied to the data line are inverted in polarity in units of the data line. The method of claim 18, Polarities of the pixel signal and the dummy pixel signal are The polarity is reversed in the period of driving the last horizontal line of the dummy area located in the upper outer portion of the effective screen area, and the reversed polarity is reversed in the period in which the last horizontal line of the dummy area is driven in the next frame. Liquid crystal panel driving method characterized in that it is determined according to the polarity control signal to hold until. The method of claim 18, Polarities of the pixel signal and the dummy pixel signal are The polarity is reversed in the driving period of the last horizontal line of the effective screen area, and the inverted polarity of the valid screen area is changed in the next frame via the driving period of the dummy area located at the lower edge of the effective screen area. A liquid crystal panel driving method characterized in that it is determined in accordance with the polarity control signal to be maintained until inversion in the period of driving the last horizontal line. The method of claim 18, Polarities of the pixel signal and the dummy pixel signal are Polarity is reversed in the period of driving the last horizontal line of the dummy area located in the upper outer area of the effective screen area, and then polarity is reversed in the period of driving the last horizontal line of the effective screen area, again in frame units Liquid crystal panel driving method characterized in that the polarity is determined according to the polarity control signal inverted. The method of claim 18, And the blank data supplied in the blank period between the frames or the pixel data to be supplied to the first or last horizontal line of the effective screen area as the dummy data. The method of claim 18, And the liquid crystal cells are driven in a dot inversion form in which polarization is reversed with adjacent liquid crystal cells in vertical and horizontal directions.

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