JP3322948B2 - Array substrate for display device and liquid crystal display device - Google Patents
Array substrate for display device and liquid crystal display deviceInfo
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- JP3322948B2 JP3322948B2 JP23147593A JP23147593A JP3322948B2 JP 3322948 B2 JP3322948 B2 JP 3322948B2 JP 23147593 A JP23147593 A JP 23147593A JP 23147593 A JP23147593 A JP 23147593A JP 3322948 B2 JP3322948 B2 JP 3322948B2
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- signal
- display device
- liquid crystal
- wirings
- pixel electrode
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Description
【０００１】[0001]
【産業上の利用分野】本発明は液晶表示装置に係り、特
に表示品位が高くかつ信頼性の高いアクティブマトリッ
クス型液晶表示装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly to an active matrix type liquid crystal display device having high display quality and high reliability.
【０００２】[0002]
【従来の技術】液晶表示装置は、薄型、低消費電力等の
特徴を生かして、テレビあるいはグラフィックディスプ
レイなどの表示素子として盛んに利用されている。2. Description of the Related Art Liquid crystal display devices are actively used as display elements for televisions, graphic displays, and the like, taking advantage of features such as thinness and low power consumption.
【０００３】中でも、薄膜トランジスタ（Thin Film Tr
ansistor；以下、ＴＦＴと略称）をスイッチング素子と
して用いたアクティブマトリックス型液晶表示装置は、
高速応答性に優れ、高精細化に適しており、ディスプレ
イ画面の高画質化、大型化、カラー画像化を実現するも
のとして注目され、例えば画素の配列ピッチが 200μｍ
程度で、かつ画素数が約 100万画素といった高精細なア
クティブマトリックス型液晶表示装置が開発されてい
る。[0003] Among them, a thin film transistor (Thin Film Tr)
An active matrix type liquid crystal display device using an anistor (hereinafter abbreviated as TFT) as a switching element,
It excels in high-speed response and is suitable for high definition. It is attracting attention for realizing higher image quality, larger size, and color imaging of display screens. For example, the pixel arrangement pitch is 200 μm.
A high-definition active matrix type liquid crystal display device having a size of about 1 million pixels has been developed.
【０００４】アクティブマトリックス型液晶表示装置の
表示素子部分は、一般的にＴＦＴのようなスイッチング
用アクティブ素子とこれに接続された画素電極が配設さ
れたアクティブ素子アレイ基板と、これに対向して配置
される対向電極が形成された対向基板と、これら基板間
に挟持される液晶組成物と、さらに各基板の外表面側に
貼設される偏光板とから、その主要部分が構成されてい
る。A display element portion of an active matrix type liquid crystal display device generally includes an active element array substrate on which a switching active element such as a TFT and a pixel electrode connected thereto are disposed, and an active element array substrate opposed thereto. The main part is composed of a counter substrate on which a counter electrode is formed, a liquid crystal composition sandwiched between these substrates, and a polarizing plate stuck on the outer surface side of each substrate. .
【０００５】図５はこのようなアクティブマトリックス
型液晶表示装置の等価回路を示す図である。ＴＦＴ素子
基板５０１上には、交差するようにそれぞれ配列された
複数の走査配線５０３および複数の信号配線５０５と、
この走査配線５０３および信号配線５０５の交差部ごと
に形成され、走査配線５０３にゲートが接続され信号配
線５０５にドレインが接続されたスイッチング用のＴＦ
Ｔ（Thin Film Transistor；以下、ＴＦＴと略称）素子
５０７と、複数の走査配線５０３と複数の信号配線５０
５とが形成する格子ごとに収まるように外形がほぼ矩形
状に形成されＴＦＴ素子５０７のソースに接続された画
素電極５０９とが配設されている。そして前記の画素電
極５０９に間隙を有して対向電極５１１が対向配置さ
れ、画素電極５０９と対向電極５１１との間に液晶組成
物５１３が封入・挟持されて、液晶表示装置の液晶セル
（液晶表示パネル）の主要部は形成されている。FIG. 5 is a diagram showing an equivalent circuit of such an active matrix type liquid crystal display device. On the TFT element substrate 501, a plurality of scanning wirings 503 and a plurality of signal wirings 505 each arranged so as to intersect,
A switching TF formed at each intersection of the scanning wiring 503 and the signal wiring 505 and having a gate connected to the scanning wiring 503 and a drain connected to the signal wiring 505.
T (Thin Film Transistor; hereinafter abbreviated as TFT) element 507, a plurality of scanning wirings 503, and a plurality of signal wirings 50
5 and a pixel electrode 509 connected to the source of the TFT element 507 and having a substantially rectangular outer shape so as to fit in each lattice formed by the pixel electrodes 509. A counter electrode 511 is disposed to face the pixel electrode 509 with a gap therebetween, and a liquid crystal composition 513 is sealed and sandwiched between the pixel electrode 509 and the counter electrode 511 to form a liquid crystal cell (liquid crystal) of a liquid crystal display device. The main part of the display panel is formed.
【０００６】走査配線５０３は走査ドライバ回路（図示
省略）に接続されて、走査電圧（いわゆる走査パルス波
形と走査非選択時電圧波形とを含む電圧）が印加される
とともに、信号配線５０５は信号ドライバ回路（図示省
略）に接続されて、信号電圧（画像データに対応した波
形のデータ信号）が印加され、これらの印加電圧に基づ
いて液晶セルが駆動され画像表示が行なわれる。The scanning wiring 503 is connected to a scanning driver circuit (not shown), and a scanning voltage (a voltage including a so-called scanning pulse waveform and a voltage waveform when scanning is not selected) is applied. A signal voltage (a data signal having a waveform corresponding to image data) is applied to a circuit (not shown), and the liquid crystal cell is driven based on these applied voltages to perform image display.
【０００７】[0007]
【発明が解決しようとする課題】しかしながら、上記の
ような従来のアクティブマトリックス型の液晶表示装置
を約50℃の高温条件下に置き数百時間にわたって駆動
（点灯）させ続ける耐久性試験を施したとき、液晶表示
パネル画面の表示領域端部に垂直方向にライン状の表示
欠陥が頻発する。このような表示不良は、継続駆動（点
灯）時間が長くなるにしたがってさらに顕著になる。こ
の表示欠陥によって、画面の端部に垂直方向のライン状
のちらつきやむらが目立ち、表示品位が低下するという
問題があった。However, a durability test was conducted in which the conventional active matrix type liquid crystal display device as described above was driven under a high temperature condition of about 50 ° C. and operated (lit) for several hundred hours. At this time, line-shaped display defects frequently occur in the vertical direction at the end of the display area of the liquid crystal display panel screen. Such a display defect becomes more remarkable as the continuous driving (lighting) time becomes longer. Due to this display defect, there is a problem that vertical line-like flicker and unevenness are conspicuous at the edge of the screen, and the display quality is reduced.
【０００８】本発明は、このような問題を解決するため
に成されたもので、その目的は、特にアクティブマトリ
ックス型の液晶表示装置の画面の表示領域端部に発生す
る垂直方向のライン状の表示欠陥を解消して、表示品位
が高くかつ信頼性の高い液晶表示装置を提供することに
ある。The present invention has been made to solve such a problem, and an object of the present invention is to provide a vertical line-like pattern generated at an end of a display area of a screen of an active matrix type liquid crystal display device. An object of the present invention is to provide a liquid crystal display device with high display quality and high reliability by eliminating display defects.
【０００９】[0009]
【課題を解決するための手段】上記課題を解決するため
に本発明は、基板上に互いに交差するように配列された
複数の走査配線と複数の信号配線と該走査配線および該
信号配線の交差部ごとに形成され該走査配線および該信
号配線に接続されたスイッチング素子と該スイッチング
素子ごとに接続された画素電極とが形成されたスイッチ
ング素子アレイ基板と、前記スイッチング素子アレイ基
板に間隙を有して対向配置される対向電極が形成された
対向基板と、前記スイッチング素子アレイ基板と前記対
向基板との間に封入された液晶組成物とを有する液晶表
示装置において、前記複数の信号配線のうち端列に位置
する信号配線に対して略平行に画素電極を隔てて隣列し
て配置されるとともに、前記端列に位置する信号配線の
前列の信号配線に電気的に接続されたダミー信号配線を
具備することを特徴としている。SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a plurality of scanning wirings and a plurality of signal wirings arranged on a substrate so as to cross each other, and an intersection of the scanning wirings and the signal wirings. A switching element array substrate formed with a switching element formed for each unit and connected to the scanning wiring and the signal wiring, and a pixel electrode connected to the switching element; and a gap provided in the switching element array substrate. A liquid crystal display device having a counter substrate on which a counter electrode disposed to face and are disposed, and a liquid crystal composition sealed between the switching element array substrate and the counter substrate. Along with the signal line located in the column, the pixel electrode is disposed adjacent to the signal line in a row substantially in parallel with the pixel electrode, and the signal line in the preceding row of the signal line located in the end row is connected to the signal line. It is characterized by comprising a gas connected to a dummy signal line.
【００１０】あるいは、上記の液晶表示装置において、
走査電圧波形を発生し前記複数の走査配線に印加する走
査ドライバ回路と、前記複数の信号配線のうち偶数列の
信号配線に印加する信号電圧の変位方向と奇数列の信号
配線に印加する信号電圧の変位方向とが逆方向である信
号電圧波形を発生して、前記複数の信号配線に印加する
信号ドライバ回路とを具備することを特徴としている。Alternatively, in the above liquid crystal display device,
A scan driver circuit for generating a scan voltage waveform and applying the scan voltage waveform to the plurality of scan lines; a signal voltage applied to an odd-numbered signal line and a displacement direction of a signal voltage applied to an even-numbered signal line among the plurality of signal lines; And a signal driver circuit for generating a signal voltage waveform whose direction of displacement is opposite to that of the signal wiring and applying the signal voltage waveform to the plurality of signal wirings.
【００１１】なお、前記のスイッチング素子としては、
ＴＦＴ素子のようないわゆる 3端子型非線形素子や、Ｍ
ＩＭ（Metal Insulator Metal ）素子のような 2端子素
子を用いることができる。[0011] The switching element includes:
A so-called three-terminal nonlinear element such as a TFT element,
A two-terminal element such as an IM (Metal Insulator Metal) element can be used.
【００１２】本発明に係る液晶表示装置の駆動方式とし
ては、複数の信号配線のうち偶数列の信号配線に印加す
る信号電圧の変位方向と奇数列の信号配線に印加する信
号電圧の変位方向とが逆方向であるような、いわゆるＶ
ライン反転駆動方式が好適である。しかしこれのみには
限定せず、例えばコモン反転方式の液晶表示装置などに
も適用することができることは言うまでもない。The driving method of the liquid crystal display device according to the present invention includes a displacement direction of a signal voltage applied to the even-numbered signal wires and a displacement direction of the signal voltage applied to the odd-numbered signal wires among the plurality of signal wires. Are in the opposite direction, so-called V
A line inversion driving method is preferable. However, the present invention is not limited to this, and it goes without saying that the present invention can be applied to, for example, a common inversion type liquid crystal display device.
【００１３】[0013]
【作用】従来のアクティブマトリックス型の液晶表示装
置では、ｍ本列設された信号配線のうち最端列、すなわ
ちｍ列めに位置する信号配線（Ｘm ）に接続された最端
部の画素電極だけには、その次列の信号配線（Ｘm+1 ）
は隣列して設けられていないために、他の画素電極とは
異なった条件下に置かれていた。すなわち、その最端部
の画素電極だけは、左右両脇のうちいずれか一方に信号
配線が近傍に存在し他方には存在していない。In the conventional active matrix type liquid crystal display device, the endmost pixel connected to the signal line (X m ) located at the end of the m signal lines, ie, the mth column, is used. Only the electrode has the signal wiring of the next row (X m + 1 )
Are not provided next to each other, and thus are placed under different conditions from other pixel electrodes. In other words, only the endmost pixel electrode has a signal wiring near one of the left and right sides and no signal wiring on the other.
【００１４】このため、その他の画素電極においては両
脇に隣列して配置された 2本の信号配線（Ｘi 、
Ｘi+1 ；i =1,2,3…,m-1）とこれらに挟まれた画素電極
との間で、層間絶縁膜や液晶層等を誘電体として寄生的
な電気容量（寄生容量）が形成されて、これに基づいた
画素電極電位のレベルシフトが生じる一方、最端部の画
素電極には片脇の 1本の信号配線だけとの間で寄生容量
が形成されて、これに基づいた画素電極電位のレベルシ
フトが生じていたので、その最端部の画素電極だけに異
なった画素電極電位のレベルシフトが生じてしまい、最
端部の画素電極だけに他とは異なった顕著な表示不良が
発生していた。For this reason, in the other pixel electrodes, two signal wirings (X i , X i ,
X i + 1 ; i = 1, 2, 3,..., M-1) and a pixel electrode sandwiched between these, and a parasitic capacitance (parasitic capacitance) using an interlayer insulating film, a liquid crystal layer, or the like as a dielectric. ) Is formed, and the level shift of the pixel electrode potential is caused based on this. On the other hand, a parasitic capacitance is formed between only one signal wiring on one side and the other end of the pixel electrode. Since the level shift of the pixel electrode potential based on the above occurs, a different level shift of the pixel electrode potential occurs only at the endmost pixel electrode, and only the endmost pixel electrode differs from the others. Display failure has occurred.
【００１５】そこで、本発明に係る液晶表示装置におい
ては、ｍ本の信号配線のうち最端列（ｍ列め）に位置す
る信号配線（Ｘm ）に対してほぼ平行に、信号配線（Ｘ
m ）に接続された最端列（ｍ列め）の画素電極を隔てて
ダミー信号配線を並列して配置した上、そのダミー信号
配線を前記の最端列（ｍ列）に位置する信号配線
（Ｘm ）の前列（ｍ−１列め）の信号配線（Ｘm-1 ）に
電気的に接続して同じ波形の電圧が印加されるようにし
て、最端列（ｍ列め）の画素電極においてもその他の画
素電極とほぼ同様の信号配線 2本分の寄生容量を形成す
ることで、その他の画素電極と同様の画素電極電位のレ
ベルシフトを最端部の（ｍ列めの）画素電極にも生じさ
せている。これにより、最端部の画素電極を含めて全て
の画素電極でほぼ同様の条件にすることができ、画面の
最端部だけに顕著に生じていた表示不良を緩和すること
ができる。Therefore, in the liquid crystal display device according to the present invention, the signal wiring (X m ) is arranged substantially in parallel with the signal wiring (X m ) located at the end row (m-th column) of the m signal wirings.
m ), dummy signal wirings are arranged in parallel with the pixel electrodes in the endmost row (mth column) connected to the signal wirings located in the endmost row (mth column). as the voltage of the electrical connection to the same waveform is applied to the signal lines of the front row (m-1 column) of (X m) (X m- 1), endmost row of (m Me column) In the pixel electrode, the same level of the pixel electrode potential as that of the other pixel electrodes is shifted by forming a parasitic capacitance for two signal wirings substantially similar to the other pixel electrodes at the extreme end (for the m-th column). It is also generated on the pixel electrode. Accordingly, almost the same conditions can be set for all the pixel electrodes including the pixel electrode at the extreme end, and the display defect that has been significantly generated only at the extreme end of the screen can be reduced.
【００１６】特に、いわゆるＶライン反転駆動方式で駆
動される液晶表示装置の場合には、最端部の画素電極の
電位レベルシフトを、その他の画素電極における電位レ
ベルシフトと同様に小さいものに抑えることができるの
で、本発明の技術は特に効果的である。すなわち最端列
の信号配線に印加する信号電圧の変位方向とダミー信号
配線に印加する信号電圧の変位方向とを逆方向にするこ
とにより、最端列の信号配線と画素電極との間で形成さ
れる寄生容量に起因した画素電極電位のレベルシフトと
ダミー信号配線と画素電極との間で形成される寄生容量
に起因した画素電極電位のレベルシフトとをほとんど打
ち消し合うようにすることができ、画素電極電位のレベ
ルシフトを実効的に解消することができるからである。In particular, in the case of a liquid crystal display device driven by the so-called V-line inversion driving method, the potential level shift of the pixel electrode at the end is suppressed to a small value like the potential level shifts of the other pixel electrodes. Therefore, the technique of the present invention is particularly effective. That is, the direction of displacement of the signal voltage applied to the endmost column of signal lines and the direction of displacement of the signal voltage applied to the dummy signal lines are made opposite to each other, thereby forming between the signal line of the endmost column and the pixel electrode. The level shift of the pixel electrode potential caused by the parasitic capacitance and the level shift of the pixel electrode potential caused by the parasitic capacitance formed between the dummy signal line and the pixel electrode can be almost cancelled. This is because the level shift of the pixel electrode potential can be effectively eliminated.
【００１７】このようにして、画面の表示領域端部に発
生する垂直方向のライン状の表示欠陥を、極めて簡易な
構造によって解消することができる。In this way, a vertical line-shaped display defect occurring at the end of the display area of the screen can be eliminated by a very simple structure.
【００１８】[0018]
【実施例】以下、本発明に係る液晶表示装置の一実施例
を図面に基づいて詳細に説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the liquid crystal display device according to the present invention will be described below in detail with reference to the drawings.
【００１９】図１は本発明に係るアクティブマトリック
ス型液晶表示装置の等価回路を示す図である。ＴＦＴ素
子基板１０１上には、交差するようにそれぞれ配列され
たｎ本の走査配線（Ｙ1 、Ｙ2 、…Ｙn ）１０３および
ｍ本の信号配線（Ｘ1 、Ｘ2、…Ｘm ）１０５と、この
走査配線１０３および信号配線１０５の交差部ごとに形
成され、走査配線１０３にゲートが接続され信号配線１
０５にドレインが接続されたＴＦＴ素子１０７と、前記
のｎ本の走査配線１０３とｍ本の信号配線１０５とが形
成するｎ行×ｍ列の格子ごとに収まるように外形がほぼ
矩形状に形成され、ＴＦＴ素子１０７のソースに電気的
に接続された画素電極１０９とが配設されている。そし
て前記の画素電極１０９に間隙を有して対向電極１１１
が対向配置され、画素電極１０９と対向電極１１１との
間に液晶組成物１１３が封入・挟持されて、この液晶表
示装置の液晶セル（液晶表示パネル）の主要部が形成さ
れている。そして偏光板（図示省略）がその上下に貼設
されている。FIG. 1 is a diagram showing an equivalent circuit of an active matrix type liquid crystal display device according to the present invention. On the TFT element substrate 101, n scanning lines (Y 1 , Y 2 ,... Y n ) 103 and m signal lines (X 1 , X 2 ,. The signal wiring 1 is formed at each intersection of the scanning wiring 103 and the signal wiring 105, and the gate is connected to the scanning wiring 103.
The outer shape is formed in a substantially rectangular shape so as to fit in each of n rows × m columns formed by the TFT element 107 having the drain connected to the drain line 05 and the n scanning lines 103 and the m signal lines 105. In addition, a pixel electrode 109 electrically connected to the source of the TFT element 107 is provided. The counter electrode 111 is provided with a gap between the pixel electrode 109 and the pixel electrode 109.
Are opposed to each other, and a liquid crystal composition 113 is sealed and sandwiched between the pixel electrode 109 and the counter electrode 111 to form a main part of a liquid crystal cell (liquid crystal display panel) of the liquid crystal display device. And a polarizing plate (not shown) is stuck on the upper and lower sides.
【００２０】走査配線１０３は走査ドライバ回路（図示
省略）に接続され走査電圧（いわゆる走査パルス波形と
走査非選択時電圧とを含む電圧）が印加され、信号配線
１０５は信号ドライバ回路（図示省略）に接続され信号
電圧（画像データに対応した波形のデータ信号）が印加
され、これらの印加電圧により液晶セルが駆動されて画
像表示が行なわれる。The scanning wiring 103 is connected to a scanning driver circuit (not shown), and a scanning voltage (a voltage including a so-called scanning pulse waveform and a voltage when scanning is not selected) is applied. The signal wiring 105 is a signal driver circuit (not shown). And a signal voltage (a data signal having a waveform corresponding to image data) is applied thereto, and the liquid crystal cell is driven by these applied voltages to perform image display.
【００２１】本発明に係る液晶表示装置の主要部の特徴
的な部分であるダミー信号配線１１５が、ｍ列めの信号
配線（Ｘm ）１１７に接続されたｍ列めの画素電極１１
９を隔てて（ｍ列めの信号配線（Ｘm ）１１７から見て
画素電極１１９のさらに外側に）、ｍ列めの信号配線
（Ｘm ）１１７とほぼ平行にｍ＋1 列めの信号配線とし
て隣列して配置されている。このダミー信号配線１１５
はｍ列めの信号配線（Ｘm ）１１７の前列であるｍ−1
列めの信号配線（Ｘm-1 ）１２１に電気的に接続されて
いる。しかし画素電極１１９や画素電極１０９とは電気
的な接続を取られていない。また、このダミー信号配線
１１５のパターン厚および線幅および前列のｍ列めの信
号配線（Ｘm ）１１７との間隔は、その前列の全ての信
号配線１０５等とほぼ同様の寸法・仕様に形成されてい
る。The dummy signal wiring 115, which is a characteristic part of the main part of the liquid crystal display device according to the present invention, is connected to the signal wiring (X m ) 117 in the m-th column.
Across a 9 (m-th column of signal lines (further outside of the X m) viewed from 117 pixel electrode 119), as substantially parallel to m + 1 column of signal lines and m-th column of signal lines (X m) 117 They are arranged next to each other. This dummy signal wiring 115
Is m-1 which is the front row of the m-th signal wiring (X m ) 117
It is electrically connected to the column signal wiring (X m-1 ) 121. However, the pixel electrode 119 and the pixel electrode 109 are not electrically connected. The pattern thickness and line width of the dummy signal wiring 115 and the distance between the dummy signal wiring 115 and the signal wiring (X m ) 117 in the m-th row in the front row are formed to have substantially the same dimensions and specifications as those of all the signal wirings 105 in the front row. Have been.
【００２２】このとき、液晶セル画面の表示領域右端部
分は、図２（ａ）に示すような構造となる。すなわち、
最端部の画素電極であるｍ列めの画素電極１１９は、そ
の前列以前の全ての画素電極１０９が左右両脇に 2本の
信号配線１０５が形成されてそれら 2本の信号配線１０
５で挟まれているのと同様に、ほぼ同様の外形寸法に形
成されたｍ列めの信号配線（Ｘm ）１１７とダミー信号
配線１１５とで挟まれていることになる。（なお図２に
おいては図の理解を明瞭にするために各信号配線に斜線
を付して示している。また同図中においてＴＦＴ素子１
０７および走査配線１０３の図示は省略した。）したが
ってこのような構造の本発明に係る液晶表示装置におい
ては、等価回路的には図３（ａ）に示すようにｍ＋1 列
めの信号配線であるダミー信号配線１１５とｍ列めの画
素電極１１９との間での寄生容量（Ｃpd´）１２３が形
成される。この寄生容量（Ｃpd´）１２３は、ｍ列めの
信号配線（Ｘm ）１１７とｍ列めの画素電極１１９との
間やそれよりも前列の信号配線１０５と画素電極１０９
との間で形成される全ての寄生容量（Ｃpd）１２５とほ
ぼ同様のものとなっている。これにより、最端部の画素
電極であるｍ列めの画素電極１１９に生じる画素電極電
位のレベルシフトを、その他の（それ以前の列の）画素
電極１０９に生じる画素電極電位のレベルシフトとほぼ
同様の値にすることができる。At this time, the right end of the display area of the liquid crystal cell screen has a structure as shown in FIG. That is,
The pixel electrode 119 in the m-th column, which is the endmost pixel electrode, has two signal wirings 105 formed on both left and right sides of all the pixel electrodes 109 before the previous row.
5, the signal wiring (X m ) 117 in the m-th column and the dummy signal wiring 115 formed in substantially the same outer dimensions are sandwiched between them. (Note that in FIG. 2, each signal wiring is shown with diagonal lines for clarity of the drawing. In FIG.
07 and the scanning wiring 103 are not shown. Therefore, in the liquid crystal display device according to the present invention having such a structure, as shown in FIG. 3A, the dummy signal wiring 115 which is the m + 1st column signal wiring and the mth column pixel electrode as shown in FIG. A parasitic capacitance (Cpd ′) 123 is formed between the first capacitor 119 and the first capacitor 119. The parasitic capacitance (Cpd ′) 123 is formed between the signal wiring (X m ) 117 in the m-th column and the pixel electrode 119 in the m-th column, or the signal wiring 105 and the pixel electrode 109 in the preceding column.
Are almost the same as all the parasitic capacitances (Cpd) 125 formed between them. As a result, the level shift of the pixel electrode potential generated in the pixel electrode 119 in the m-th column, which is the endmost pixel electrode, is substantially the same as the level shift of the pixel electrode potential generated in the other (previous column) pixel electrodes 109. Similar values can be used.
【００２３】しかもこのとき、ダミー信号配線１１５は
その 2列前のｍ−1 列めの信号配線（Ｘm-1 ）１２１に
電気的に接続されて、信号配線（Ｘm-1 ）１２１と同様
の電圧波形が印加される。これにより、特にＶライン反
転駆動される場合にｍ列めの画素電極１１９の電位のレ
ベルシフトは寄生容量（Ｃpd´）１２３によるレベルシ
フトと寄生容量（Ｃpd）１２５によるレベルシフトとが
相殺し合って、実効的にほとんど無視できる程度にまで
低減する。つまりＶライン反転駆動方式の場合には、ｍ
列めの信号配線（Ｘm ）１１７に印加される信号電圧波
形４０１の変位方向とｍ−1 列めの信号配線（Ｘm-1 ）
１２１に印加される信号電圧波形の変位方向とが反転基
準電位（Ｖcom ）を中心として逆方向であるため、この
ようなＶライン反転時に起因して寄生容量（Ｃpd）１２
５により発生する画素電極１１９のレベルシフトと寄生
容量（Ｃpd´）１２３により発生する画素電極１１９の
レベルシフトとの変位方向が逆のものとなる。その結
果、前列の全ての画素電極１０９の場合とほぼ同様に、
画素電極１１９の電位のレベルシフトを図４（ａ）に示
すように実効的にほとんど解消することができるのであ
る。[0023] Moreover, this time, dummy signal line 115 thereof two rows before the m-1 column of signal lines (X m-1) 121 to be electrically connected, the signal lines (X m-1) 121 A similar voltage waveform is applied. Thereby, particularly when the V-line inversion driving is performed, the level shift of the potential of the pixel electrode 119 in the m-th column is offset by the level shift by the parasitic capacitance (Cpd ′) 123 and the level shift by the parasitic capacitance (Cpd) 125. And effectively reduce it to almost negligible level. That is, in the case of the V line inversion driving method, m
The displacement direction of the signal voltage waveform 401 applied to the signal wiring ( Xm ) 117 in the column and the signal wiring ( Xm-1 ) in the ( m-1 ) th column
Since the displacement direction of the signal voltage waveform applied to 121 is in the opposite direction with respect to the inversion reference potential (Vcom), the parasitic capacitance (Cpd) 12 due to such V-line inversion.
5 and the level shift of the pixel electrode 119 caused by the parasitic capacitance (Cpd ') 123 are opposite to each other. As a result, almost as in the case of all the pixel electrodes 109 in the front row,
The level shift of the potential of the pixel electrode 119 can be almost effectively eliminated as shown in FIG.
【００２４】一方、図２（ｂ）に比較例として示すよう
に、従来の液晶表示装置ではｍ列めの信号配線１１７ま
でしか信号配線は形成されていないので、最端部のｍ列
めの画素電極１１９の右脇には信号配線が存在しない。
このため、従来の液晶表示装置では、等価回路的には図
３（ｂ）に示すようにｍ列めの信号配線１１７と画素電
極１１９との間で寄生容量（Ｃpd）１２５ 1個だけが形
成されているため、その他の前列の全ての画素電極１０
９とは異なった電位のレベルシフト（Ｖpd）が図４
（ｂ）に示すように画素電極１１９に生じ、その結果、
この最端部のｍ列めの画素電極１１９に特に顕著に表示
欠陥が発生していたことを本発明者は確認した。On the other hand, as shown in FIG. 2B as a comparative example, in the conventional liquid crystal display device, only the signal lines 117 up to the m-th column are formed, so that the m-th column at the extreme end is formed. No signal wiring exists on the right side of the pixel electrode 119.
Therefore, in the conventional liquid crystal display device, only 125 parasitic capacitances (Cpd) are formed between the signal line 117 in the m-th column and the pixel electrode 119 as shown in FIG. Therefore, all the pixel electrodes 10 in the other front row
The level shift (Vpd) of the potential different from that of FIG.
As shown in (b), it occurs on the pixel electrode 119, and as a result,
The present inventor has confirmed that a display defect has occurred particularly remarkably in the pixel electrode 119 in the m-th column at the end.
【００２５】実際に、上記のような構造の本発明に係る
液晶表示装置を高温多湿条件下で駆動させて、その表示
品位および耐久性を検証したところ、画面の表示領域端
部を含めて画面上でのライン状の表示欠陥は発生するこ
となく、表示品位の良好な画像表示を長期間にわたって
維持することができた。その一方、比較例として図２
（ｂ）に示したような構造の従来の液晶表示装置にも同
様の実験を行なったところ、画面の表示領域端部にライ
ン状の表示欠陥が発生して表示品位が低いものとなっ
た。そしてこの表示欠陥は時間が経過するにつれてさら
に顕著になった。Actually, when the liquid crystal display device according to the present invention having the above-described structure was driven under high-temperature and high-humidity conditions and its display quality and durability were verified, it was confirmed that the liquid crystal display device including the edge of the display area of the screen was screened. The above-described line-shaped display defects did not occur, and image display with good display quality could be maintained for a long period of time. On the other hand, FIG.
A similar experiment was performed on a conventional liquid crystal display device having a structure as shown in FIG. 2B. As a result, a line-shaped display defect occurred at the end of the display area of the screen, resulting in poor display quality. And this display defect became more remarkable as time passed.
【００２６】なお、上記実施例においては、説明の簡潔
化のために補助容量（Ｃs ）等を省略した場合について
述べたが、本発明はこれのみには限定しない。補助容量
（Ｃs ）を用いる構造の液晶表示装置にも本発明が適用
可能である。また偏光板等の部位の詳述も説明の簡潔化
のために省略した。In the above embodiment, the case where the auxiliary capacitance (Cs) and the like are omitted for simplicity of description has been described, but the present invention is not limited to this. The present invention is also applicable to a liquid crystal display device having a structure using a storage capacitor (Cs). In addition, details of parts such as a polarizing plate are also omitted for simplification of description.
【００２７】また、上記実施例ではネマティック（Ｔ
Ｎ）型液晶を用いたアクティブマトリックス型液晶表示
装置の場合について述べたが、本発明の適用はこれのみ
には限定しない。In the above embodiment, nematic (T
Although the case of the active matrix type liquid crystal display device using the N) type liquid crystal has been described, the application of the present invention is not limited to this.
【００２８】このネマティック型液晶の他にも、例えば
スーパーツイステッドネマティック（ＳＴＮ）型液晶
や、その他の種類の液晶を用いた液晶表示装置にも適用
可能である。In addition to the nematic liquid crystal, the present invention can be applied to, for example, a super twisted nematic (STN) liquid crystal or a liquid crystal display device using other types of liquid crystal.
【００２９】その他、本発明の要旨を逸脱しない範囲
で、本発明の液晶表示装置の各部位の形成材料などの変
更が種々可能であることは言うまでもない。In addition, it goes without saying that various changes can be made in the material of each part of the liquid crystal display device of the present invention without departing from the gist of the present invention.
【００３０】[0030]
【発明の効果】以上、詳細な説明で明示したように、本
発明によれば、画面の表示領域端部に発生する垂直方向
のライン状の表示欠陥を解消して、表示品位が高くかつ
信頼性の高い液晶表示装置を提供することができる。As described above, according to the present invention, according to the present invention, a vertical line-shaped display defect generated at the end of the display area of the screen is eliminated, so that the display quality is high and the reliability is high. The liquid crystal display device having high performance can be provided.
【図１】本発明に係る液晶表示装置の主要部の等価回路
図。FIG. 1 is an equivalent circuit diagram of a main part of a liquid crystal display device according to the present invention.
【図２】本発明に係る液晶表示装置の最端部の構造を示
す図。FIG. 2 is a diagram showing a structure of an end portion of the liquid crystal display device according to the present invention.
【図３】本発明に係る液晶表示装置の最端部の等価回路
図。FIG. 3 is an equivalent circuit diagram of an end portion of the liquid crystal display device according to the present invention.
【図４】本発明に係る液晶表示装置の画素電極電位を示
す波形図。FIG. 4 is a waveform chart showing a pixel electrode potential of the liquid crystal display device according to the present invention.
【図５】従来の液晶表示装置の主要部の等価回路図。FIG. 5 is an equivalent circuit diagram of a main part of a conventional liquid crystal display device.
【符号の説明】 １０１…ＴＦＴ素子基板、１０３…走査配線、１０５…
信号配線、１０７…ＴＦＴ素子、１０９…画素電極、１
１１…対向電極、１１３…液晶組成物、１１５…ダミー
信号配線、１１７…ｍ列めの信号配線（Ｘm ）、１１９
…ｍ列めの画素電極、１２１…ｍ−1 列めの信号配線
（Ｘm-1 ）、１２３…寄生容量（Ｃpd´）、１２５…寄
生容量（Ｃpd）[Description of References] 101: TFT element substrate, 103: scanning wiring, 105:
Signal wiring, 107: TFT element, 109: pixel electrode, 1
11: Counter electrode, 113: Liquid crystal composition, 115: Dummy signal wiring, 117: Signal wiring ( Xm ) in the m-th column, 119
... Pixel electrodes in the m-th column, 121... Signal wiring (X m-1 ) in the m-th column, 123... Parasitic capacitance (Cpd ′), 125.
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) G02F 1/133 550 G02F 1/1365 G02F 1/1368 G09G 3/36 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) G02F 1/133 550 G02F 1/1365 G02F 1/1368 G09G 3/36
Claims (4)
た複数の走査配線と複数の信号配線と該走査配線および
該信号配線の交差部ごとに形成され該走査配線および該
信号配線に接続されたスイッチング素子と該スイッチン
グ素子ごとに接続された画素電極とが形成されたスイッ
チング素子アレイ基板と、 前記スイッチング素子アレイ基板に間隙を有して対向配
置される対向電極が形成された対向基板と、 前記スイッチング素子アレイ基板と前記対向基板との間
に封入された液晶組成物とを有する液晶表示装置におい
て、 前記複数の信号配線のうち端列に位置する信号配線に対
して略平行に画素電極を隔てて隣接して配置されるとと
もに、前記端列に位置する信号配線の前列の信号配線に
電気的に接続されたダミー信号配線を具備することを特
徴とする液晶表示装置。1. A plurality of scanning wirings and a plurality of signal wirings arranged on a substrate so as to intersect with each other, and formed at each intersection of the scanning wirings and the signal wirings and connected to the scanning wirings and the signal wirings. Switching element array substrate on which a switching element and a pixel electrode connected to each switching element are formed, and a counter substrate on which a counter electrode is formed so as to face the switching element array substrate with a gap therebetween, In a liquid crystal display device having a liquid crystal composition sealed between the switching element array substrate and the counter substrate, a pixel electrode is disposed substantially parallel to a signal line located in an end row of the plurality of signal lines. A dummy signal line which is arranged adjacent to and separated by a distance, and which is electrically connected to a signal line in a row preceding the signal line located in the end row. Characteristic liquid crystal display device.
走査電圧波形を発生し前記複数の走査配線に印加する走
査ドライバ回路と、 前記複数の信号配線のうち偶数列の信号配線に印加する
信号電圧の変位方向と奇数列の信号配線に印加する信号
電圧の変位方向とが逆方向である信号電圧波形を発生し
て前記複数の信号配線に印加する信号ドライバ回路とを
具備することを特徴とする液晶表示装置。2. The liquid crystal display device according to claim 1, wherein
A scan driver circuit for generating a scan voltage waveform and applying the scan voltage to the plurality of scan lines; and a displacement direction of a signal voltage applied to an even-numbered column of the plurality of signal lines and a signal voltage to be applied to an odd-numbered signal line. And a signal driver circuit for generating a signal voltage waveform whose direction of displacement is opposite to the signal direction and applying the generated signal voltage waveform to the plurality of signal lines.
た複数の走査配線と複数の信号配線と、該走査配線及び
該信号配線の交差部毎に形成され該走査配線及び該信号
配線に接続されたスイッチ素子と、該スイッチング素子
毎に配置された画素電極と、を備えた表示装置用アレイ
基板において、 前記複数の信号配線のうち端列に位置する信号配線に対
して略平行に画素電極を隔てて隣接して配置されるとと
もに、前記端列に位置する信号配線の前列の信号配線に
電気的に接続されたダミー信号配線を具備する ことを特
徴とする表示装置用アレイ基板。3. A plurality of scanning wirings and a plurality of signal wirings arranged on a substrate so as to intersect with each other, and connected to the scanning wirings and the signal wirings formed at each intersection of the scanning wirings and the signal wirings. a switching element is a pixel electrode disposed in each said switching element, a display device for an array substrate having a pair signal lines located on the inner end column of said plurality of signal lines
When they are arranged approximately parallel and adjacent to each other with a pixel electrode
In addition, the signal wiring in the front row of the signal wiring located in the end row is
An array substrate for a display device , comprising a dummy signal wiring electrically connected thereto .
おいて、隣接する一対の前記信号配線には、反転基準電
位に対して互いに極性の異なる信号電圧が印加されるこ
とを特徴とする表示装置用アレイ基板。4. The display device according to claim 3, wherein signal voltages having polarities different from each other with respect to an inversion reference potential are applied to a pair of adjacent signal lines. Array substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23147593A JP3322948B2 (en) | 1993-09-17 | 1993-09-17 | Array substrate for display device and liquid crystal display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23147593A JP3322948B2 (en) | 1993-09-17 | 1993-09-17 | Array substrate for display device and liquid crystal display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0784239A JPH0784239A (en) | 1995-03-31 |
| JP3322948B2 true JP3322948B2 (en) | 2002-09-09 |
Family
ID=16924080
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23147593A Expired - Fee Related JP3322948B2 (en) | 1993-09-17 | 1993-09-17 | Array substrate for display device and liquid crystal display device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3322948B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100898786B1 (en) * | 2002-11-11 | 2009-05-20 | 엘지디스플레이 주식회사 | Liquid crystal panel, apparatus and method of driving the same |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3624596B2 (en) * | 1996-12-09 | 2005-03-02 | ソニー株式会社 | Image display device |
| JP3335895B2 (en) | 1997-12-26 | 2002-10-21 | シャープ株式会社 | Liquid crystal display |
| JP2001282170A (en) * | 2000-03-31 | 2001-10-12 | Sharp Corp | Row electrode driving device for picture display device |
| JP2001337654A (en) * | 2000-05-25 | 2001-12-07 | Toshiba Corp | Flat display device |
| JP4609970B2 (en) * | 2001-01-17 | 2011-01-12 | カシオ計算機株式会社 | Liquid crystal display device |
| JP3730161B2 (en) | 2001-11-28 | 2005-12-21 | シャープ株式会社 | Liquid crystal display device |
| TWI397046B (en) * | 2008-04-18 | 2013-05-21 | Innolux Corp | Active matrix display device |
-
1993
- 1993-09-17 JP JP23147593A patent/JP3322948B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100898786B1 (en) * | 2002-11-11 | 2009-05-20 | 엘지디스플레이 주식회사 | Liquid crystal panel, apparatus and method of driving the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0784239A (en) | 1995-03-31 |
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