JP3311835B2 - Display device drive circuit and liquid crystal display device using the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device driving circuit and a liquid crystal display device using the same.

[0002]

2. Description of the Related Art As a display device replacing a CRT display, a flat display such as a light and thin liquid crystal display device or a plasma display device has attracted attention. Among them, a liquid crystal display device can be driven with low power consumption, and is therefore used for a display screen for various uses such as a viewfinder, a portable television, a personal computer, and the like.

In such a display device as a liquid crystal display device, there is an increasing demand for higher definition. Then, in order to realize such high definition, in order to solve the troublesome connection between the display device drive circuit portion and each display pixel electrode, the display device drive circuit portion and the display pixel electrode are made to be the same. Attempts have been made to form them on a transparent insulating substrate such as quartz.

[0004] A liquid crystal display device in which such a display device drive circuit portion and a display pixel electrode are formed on the same substrate will be briefly described. The liquid crystal display device includes a liquid crystal layer held between a pair of electrode substrates via an alignment film. One electrode substrate is an insulating substrate in which a plurality of two-dimensionally arranged display pixel electrodes and a signal line drive circuit portion and a scan line drive circuit portion connected to each display pixel electrode via a switch element are the same. Formed on top. The other electrode substrate is formed by providing a common electrically opposite electrode on a transparent insulating substrate.

The scanning line driving circuit is mainly constituted by a shift register circuit, and the signal line driving circuit is constituted by a shift register circuit and a shift register (SR) of each stage constituting the shift register circuit. An analog switch (SW) group for sequentially selecting a video signal (Vsig) by an output and outputting to each signal line; and a capacitor (C) group for holding a signal voltage (Vq) selected by the analog switch (SW) group. It is constituted by.

[0006]

By the way, in a display device such as a liquid crystal display device in which a display pixel electrode and a drive circuit portion are formed on a transparent insulating substrate such as a glass or quartz substrate,
Insulating film defects occur due to static electricity generated during the transfer of the substrate and during the manufacturing process such as the rubbing process of the alignment film formed on the substrate surface.

As a proactive technique for solving the insulation failure due to static electricity, there is known a technique in which each wiring is short-circuited by a conductor called a short ring, for example. However, at present, it is not possible to completely take countermeasures against static electricity even by using such a method.

In particular, when a short-circuit failure occurs due to the breakdown of a gate insulating film of a thin film transistor (hereinafter, abbreviated as TFT) constituting a shift register circuit portion of a scanning line drive circuit portion or a signal line drive circuit portion, the portion after the failure is detected. Are not driven, and the display operation cannot be performed at all.

As another method for solving the insulation failure due to static electricity, for example, a protection circuit such as a resistor may be provided on the signal input side of the shift register circuit section. However, in order to achieve higher definition such as for high-definition television, it is necessary to increase the driving frequency, and it is not preferable to insert an input protection circuit that causes distortion of the input signal waveform.

SUMMARY OF THE INVENTION The present invention has been made in view of the above technical problem, and eliminates a decrease in manufacturing yield due to static electricity generated during manufacturing, and furthermore, a driving circuit for a display device capable of driving with high accuracy and a liquid crystal using the same. It is an object to provide a display device.

[0011]

A display device driving circuit according to the present invention comprises a shift register circuit section mainly composed of a shift register connected to a signal input line, and a shift register circuit portion connected to the signal input line and having its output. A dummy circuit unit not connected to the shift register is provided on a substrate.

According to a second aspect of the present invention, there is provided a drive circuit for a display device, wherein the dummy circuit section according to the first aspect includes two or more dummy circuits having substantially the same structure as the shift register.

According to a third aspect of the present invention, there is provided a drive circuit for a display device, comprising a shift register circuit section mainly including a shift register electrically connected to a power supply line, an earth line, and a clock line on a substrate. The display device driving circuit, further comprising: a dummy circuit portion connected to at least one of the power supply line, the ground line, and the clock line and provided adjacent to the shift register on the substrate. Features.

According to a fourth aspect of the present invention, there is provided a drive circuit for a display device, wherein the dummy circuit portion according to the third aspect is composed of two or more dummy circuits having substantially the same structure as the shift register.

The liquid crystal display device according to a fifth aspect of the present invention includes a plurality of display pixel electrodes arranged two-dimensionally,
A switch element provided for each display pixel electrode, a signal line driving circuit for supplying a signal voltage to the switch element,
In a liquid crystal display device provided with a scanning line driving circuit for supplying a scanning signal for controlling on / off of the switch element on the same substrate, at least one of the signal line driving circuit and the scanning line driving circuit includes a signal input wiring And a dummy circuit unit connected to the signal input wiring and having its output not connected to the shift register.

Further, the liquid crystal display device according to the present invention has a plurality of display pixel electrodes arranged two-dimensionally,
A switch element provided for each display pixel electrode, a signal line driving circuit for supplying a signal voltage to the switch element,
In a liquid crystal display device including a scan line driver circuit for supplying a scan signal for controlling on / off of the switch element on the same substrate, at least one of the signal line driver circuit and the scan line driver circuit includes a power supply line, A shift register circuit portion mainly composed of a shift register electrically connected to each of the ground line and the clock line; and a power supply line, a ground line and a clock line connected to at least one of the clock lines and adjacent to the shift register. And a dummy circuit section to be provided.

[0017]

The present inventors have conducted a sincerity study focusing on defects caused by static electricity generated during the manufacture of a display device driving circuit. Gate insulation of electrically floating TFTs among the TFTs constituting the shift register (SR) near the start signal input side of the shift register circuit portion constituting the driving circuit or the shift register (SR) on the opposite side thereof. It was found that film destruction was significant.

For example, FIG. 5 shows a schematic equivalent circuit diagram of a clocked inverter type shift register circuit portion. In particular, the shift register (S
R) or the gate insulating film of the TFT in the shift register (not shown) on the opposite side is often broken, and the broken portion is the gate insulating film of the TFT shown in FIGS. Met.

The reason for this is that even if a clock signal line or a power supply voltage line or the like constituting the shift register circuit portion is connected by a short ring, the shift register circuit portion still has electrically floating TFTs. Yes, and furthermore, the clock signal line or the power supply voltage line or the like acts as an antenna due to being routed to the same length as the shift register circuit portion,
It has been newly found that this is because the insulating film is broken by static electricity.

The present inventors have arrived at the present invention as a result of sincerity research based on such novel findings. Particularly, by providing the dummy circuit section as described above, the actual operation is The area to be operated without any problem can be protected, thereby greatly improving the manufacturing yield.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A liquid crystal display according to one embodiment of the present invention will be described below.
(1) will be described with reference to the drawings. As shown in FIG. 1, this liquid crystal display device (1) is a polycrystalline silicon (hereinafter abbreviated as p-Si) for applying a scanning voltage (Vp) to each of M scanning lines (11). And a signal line (101) composed of a TFT (not shown) composed of a TFT and a p-p for sequentially applying a signal voltage (Vq) from a video signal (Vsig) to each of N signal lines (21). A signal line driving circuit section (201) constituted by a TFT (not shown) made of Si;
Each driving circuit (10) is connected via a TFT (31) made of p-Si.
(1) a first electrode substrate (5) provided with a two-dimensionally arranged display pixel electrode (41) connected to (201) on a transparent insulating substrate (3) made of quartz; A liquid crystal layer is provided between a counter electrode (51) and a second electrode substrate formed on a transparent insulating substrate.
(61) is held.

Each TFT in which a source electrode (S) is connected to a display pixel electrode (41) made of ITO (Indium-Tin-Oxide)
The gate electrode (G) and the drain electrode (D) of (31) are connected to the scanning line (11) and the signal line (21), respectively.

The signal line driving circuit section (201) includes a shift register circuit section (211) to which N shift registers (SR1) to (SRN) (see FIG. 2) are sequentially connected, and each shift register (SRj). ), A group of analog switches (SW1) to (SWN) for sequentially sampling a video signal (Vsig) input to the video signal line (251) for a predetermined period, and a selected signal voltage (Vq). It comprises a group of capacitors (C1) to (CN).

Further, the configuration of the shift register circuit section (211) will be described in detail with reference to FIG. Each shift register (SR) constituting this shift register circuit section (211)
j) is a power supply voltage line to which a power supply voltage (VDD) is applied.
(221) and a clocked inverter type mainly composed of two P-type TFTs and N-type TFTs connected in series to be connected to a ground (VG) ground line (223). 1 in synchronization with the first clock signal (CK1) and the second clock signal (CK2) which is an inverted signal of the first clock signal (CK1). ).

The shift register circuit (21)
1) A dummy circuit section (241) is provided between the first stage shift register (SR1) and the input terminal of the start signal (ST).
Dummy circuit portions (not shown) are provided on the electrically terminal side with respect to the N-th stage shift register (SRN).

The input terminal of the start signal (ST) of the shift register circuit section (211) and the first stage shift register (SR1
) Is provided with four dummy circuits (SRD1) to (SRD4) having substantially the same structure as each shift register (SRj). That is, each of the dummy circuits (SRD1) to (SRD4) is composed of two P-type TFTs (243P) and (245P) and an N-type TF
T (243N), (245N), TFT (243P), (245N)
N) are connected to the power supply voltage line (221) and the earth line (223), respectively. Also, adjacent P-type and N-type TFTs
(245P), (243N) gate is start signal line (225)
The P-type TFT (243P) connected to the power supply voltage line and the N-type TFT (245P) connected to the ground line (223)
Each gate of N) is connected to the clock signal lines (227) and (229), and each output is not connected to the next stage.

The N-th shift register circuit (211)
The dummy circuit portion (not shown) provided on the terminal side electrically with respect to the shift register (SRN) of the second stage has substantially the same structure, and the output of this dummy circuit is supplied to another shift register (SRN).
j) and the output of the N-th stage shift register (SRN) is not connected to a dummy circuit section (not shown).

With this configuration, even if static electricity is generated during manufacturing, the input terminal of the shift register circuit section (211) and the first-stage shift register (SR1) do not affect the actual operation. And a dummy circuit (S
TFTs (243P), (245P), (2
43N) and (245N) are destroyed, or T constitutes a dummy circuit portion (not shown) provided adjacent to the Nth stage shift register (SRN) of the shift register circuit portion (201).
The FT (not shown) was destroyed, and the production yield was greatly improved.

In this embodiment, the shift register circuit (2
11) and four dummy circuits (SRD) between the input terminal of the start signal (ST) and the first-stage shift register (SR1).
1) to (SRD4) are provided with four dummy circuits adjacent to the N-th stage shift register (SRN) of the shift register circuit section (201).
The number of 1) to (SRD4) is not limited to this. However, if the countermeasures against static electricity are to be taken surely, it is preferable to use two or more. If the number exceeds ten, the effect is saturated and an extra area is required. It is good to

After the end of the manufacturing, the dummy circuit (SRD1)
~ (SRD4) start signal line by laser etc.
(225) and disconnection from the power supply voltage line (221) can also prevent an unnecessary increase in capacity and the like.

Further, each of the dummy circuits (SRD1) to (SRD1)
4) TFT (243P), (245P) and TFT (243P)
N) and (245N) are preferably configured to be more easily damaged by static electricity than the TFTs constituting the shift register circuit section (211). For example, dummy circuits (SRD1) to (SRD4)
The shape of the TFT constituting the shift register circuit section (211)
It is preferable to make the structure easily breakable, for example, by forming it smaller than the TFT constituting the above, or by changing the material, thickness and the like of the insulating film.

Further, in this embodiment, each dummy circuit (S
TFTs (243P), (245P), (2
43N) and (245N) to each wiring (221), (223), (225), (227), (229)
Are connected to the clock signal lines (227) and (229), the power supply voltage line (221), the earth line (223), and the like.

Next, another embodiment of the present invention will be described with reference to FIG.
This will be described with reference to FIG. In this embodiment, the shift register circuit section (311) includes four parallel shift register groups (SR1-k
) To (SR4-k).

Each of the shift registers (SR1-k) to (SR4-k) constituting the shift register circuit section (311) is mainly composed of a power supply voltage line (321) and an earth line (323), as in the above-described embodiment. ) And two Ps connected in series.
The first shift register group (SR) is composed of a clocked inverter type mainly composed of a TFT of an N-type and an N-type TFT.
1-k) sequentially generates a start signal (ST1) at the next stage in synchronization with a first clock signal (CK1) and a second clock signal (CK2) which is an inverted signal of the first clock signal (CK1). To transfer the data to the shift register (SR1-k).

The second to fourth shift register groups (S
Similarly, the start signals R2-k) to (SR4-k) are synchronized with the third clock signal (CK3) and the fourth clock signal (CK4) which is an inverted signal of the third clock signal (CK3). (ST2) is sequentially shifted to the next stage shift register (SR2-
k), the start signal (ST3) is sequentially shifted to the next stage in synchronization with the fifth clock signal (CK5) and the sixth clock signal (CK6) which is an inverted signal of the fifth clock signal (CK5). The seventh clock signal (CK7) and the seventh clock signal (CK7) are stored in the register (SR3-k).
The operation is such that the start signal (ST4) is sequentially transferred to the next-stage shift register (SR4-k) in synchronization with the eighth clock signal (CK8) which is the inverted signal of.

Then, the input terminals of the start signals (ST1) to (ST4) of the shift register circuit section (311) and the first stage shift registers of the shift register groups (SR1-k) to (SR4-k) (SR1-1), (SR2-1), (SR3-
1) and (SR4-1), three dummy circuits (SRD1-1) to (SRD1-3) and (SRD2-1) to (SRD2-1) respectively.
D2-3), (SRD3-1)-(SRD3-3), (SRD4-1)-
A dummy circuit section (341) composed of (SRD4-3) is inserted. It goes without saying that a dummy circuit section (not shown) may be provided adjacent to the end of the shift register circuit section (311) as in the above-described embodiment.

By the way, each dummy circuit (SRD1-1) to
(SRD4-3) corresponds to each shift register (SR1-k) to (S
R4-k) and two P-type Ts connected in series having substantially the same structure
FT (343P) and (345P) and N-type TFTs (343N) and (345N), and the TFTs (343P) and (345N) at both ends are connected to the power supply voltage line (3
21) and the ground line (323).
The gates of the adjacent P-type and N-type TFTs (345P) and (343N) are connected to the start signal lines (325-1) to (325-4) and the P-type TFT connected to the power supply voltage line (321). The gates of the TFT (343P) and the N-type TFT (345N) connected to the ground line (323) are connected to the clock signal lines (327-1) to (327-4), (329
-1) to (329-4), and each output is not connected to the next stage.

As described above, the four shift register groups (S
Even if the shift register circuit section (311) is configured with a parallel configuration of R1-k) to (SR4-k), by interposing the dummy circuits (SRD1-1) to (SRD4-4) as described above, TFTs (343P), (345P), (343N), (345N) constituting dummy circuits (SRD1-1) to (SRD4-4) that do not affect the actual operation even if static electricity is generated during manufacturing. Was destroyed, and the production yield was significantly improved despite the increase in the number of wirings.

Further, in this embodiment, since the shift register circuit section (311) is constituted by four shift register groups (SR1-k) to (SR4-k) in a parallel configuration,
The operation speed of each of the shift register groups (SR1-k) to (SR4-k) can be reduced to about 1/4.

Next, still another embodiment of the present invention will be described with reference to FIG. FIG. 4 shows a shift register circuit section (411) configured to enable bidirectional transfer. In a three-panel projection liquid crystal display device or the like in which three liquid crystal display devices are combined, depending on the arrangement, at least one liquid crystal display device may have a different number of video inversions from the others. For this reason, the application order of the signal voltage (Vq) needs to be different from that of the other liquid crystal display devices for only one liquid crystal display device. Therefore, the shift register circuit portion (4
11) can eliminate the need for manufacturing multiple types of liquid crystal display devices, etc.
Problems such as product management can be solved.

Each of the shift registers (SR1) to (SR4) constituting the shift register circuit section (411) is mainly composed of the power supply voltage line (42) as in the first embodiment.
1) and a ground line (423), and is constituted by a clocked inverter type mainly composed of two P-type TFTs and N-type TFTs connected in series, and the shift register (SRj) is a first type. (CK1) and a start signal (ST) in synchronization with a second clock signal (CK2) which is an inverted signal of the first clock signal (CK1).
Are sequentially transferred to the next-stage shift register (SRj).

The first switching signal (DS1) and the second switching signal (DS1), which is the inverted signal of the first switching signal (DS1), are provided between the shift registers (SRj) constituting the shift register circuit section (411). Switching circuits (SD1) to (SDN) for determining the transfer direction between the shift registers (SRj) based on the switching signal (DS2).

The shift register circuit (411)
Is connected to one input terminal of the shift register circuit portion (411) and the first input terminal.
5 sets of dummy circuits (SRD 1) to (SRD 5), (SDD 1) to (SDD 1) between the shift register (SR 1) of the stage and
A dummy circuit section (441) comprising 5) is also provided with five sets of dummy circuits (not shown) between the other input terminal of the shift register circuit section (411) and the N-th stage shift register (SRN). (Not shown) are provided.

Each of the dummy circuits (SRD1) to (SRD5) provided between one input terminal of the shift register circuit portion (411) and the first-stage shift register (SR1) includes a shift register (SRj). Two P-type TFTs (443P) and (445P) and an N-type TFT (443N), which are connected in series and have substantially the same structure,
The TFTs (443P) and (445N) at both ends are connected to a power supply voltage line (421) and an earth line (423), respectively. The gate of the P-type TFT (445P) is connected to the power supply voltage line (421), and the gate of the N-type TFT (443N) is connected to the ground line (423).
The gate of the P), N-type TFT (445N) is connected to the clock signal line (4
27) and (429), and each output is configured not to be connected to the next stage.

Then, each of the dummy circuits (SDD1) to (SD
D5) comprises two P-type TFTs (453P) and (455P) and N-type TFTs (453N) and (455N) which are connected in series and have substantially the same structure as the switching circuits (SD1) to (SDN). TFT (4
The gates of (53P) and (455N) are connected to the switching signal lines (471) and (473), respectively. In addition, adjacent P-type and N-type T
The gates of the FT (455P) and (453N) are connected to the start signal line (42
5) so that each output is not connected to the next stage.

As described above, when the switching circuit (SDj) for providing the bidirectionality to the shift register (SRj) is provided, the switching circuit is also provided between the input side and the first-stage shift register (SR1). By inserting the dummy circuits (SDD1) to (SDD5) having substantially the same structure as (SDj), the switching circuit (SDj) together with the shift register (SRj)
Destruction of the insulating film due to static electricity generated during the manufacturing process can be prevented, thereby significantly improving the manufacturing yield as in the other embodiments described above.

As described in detail above, according to each embodiment,
It is possible to eliminate a decrease in manufacturing yield due to static electricity generated during the manufacturing of the display device driving circuit. In any of the above-described embodiments, the TFT (3) connected to the display pixel electrode (41)
Although the case 1) is made of p-Si, it may be made of amorphous silicon (a-Si) or single crystal silicon, or MIM (Metal-Insulator-
Metal) elements may be used as switching elements.

In each of the embodiments described above, the signal line drive circuit (201) has been described. However, it goes without saying that a dummy circuit may be provided in the shift register section constituting the scan line drive circuit (101). . Of course, the effect of the present invention can be obtained even when a single crystal substrate or the like is used as the substrate other than the transparent insulating substrate made of quartz.

[0049]

As described above in detail, according to the display device driving circuit and the liquid crystal display device using the same according to the present invention, it is possible to eliminate a decrease in the production yield due to static electricity generated during the production.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view of a liquid crystal display device according to one embodiment of the present invention.

FIG. 2 is a schematic equivalent circuit diagram of a shift register circuit unit in FIG. 1;

FIG. 3 is a schematic equivalent circuit diagram of a shift register circuit section according to another embodiment of the present invention.

FIG. 4 is a schematic equivalent circuit diagram of a shift register circuit section according to another embodiment of the present invention.

FIG. 5 is a schematic equivalent circuit diagram of a shift register circuit section of a conventional liquid crystal display device.

[Explanation of symbols]

 (1) Liquid crystal display (201) Signal line drive circuit (211) Shift register circuit (221) Power supply line (241) Dummy circuit

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G09G 3/36 G02F 1/133 505 G09G 3/20 670

Claims (3)

(57) [Claims] 1. For a start signal and a clock signal
A shift register circuit portion of the shift register as a main component which is connected to the signal input lines of, is connected to the signal input line and the input terminal of the signal input lines of said shift register
Display device driver circuit whose output arranged Rutotomoni is characterized in that a dummy circuit portion which is not connected to the shift register provided on the substrate between the first stage. 2. The drive circuit for a display device according to claim 1, wherein the dummy circuit section comprises two or more dummy circuits having substantially the same structure as the shift register. 3. A plurality of display pixel electrodes arranged two-dimensionally, a switch element provided for each display pixel electrode, a signal line drive circuit for supplying a signal voltage to the switch element, and the switch In a liquid crystal display device provided with a scanning line driving circuit for supplying a scanning signal for controlling on / off of an element on the same substrate, at least one of the signal line driving circuit and the scanning line driving circuit includes a start signal and a clock signal. a shift register circuit portion of the shift register as a main component which is connected to the signal input line for, before being connected to the signal input lines
An input end of the signal input line and a first stage of the shift register
The liquid crystal display device, characterized in that its output arranged Rutotomoni has a dummy circuit portion which is not connected to the shift register between.