JPH07114363A - Driving circuit for display device and liquid crystal device using the same - Google Patents

Abstract

PURPOSE:To solve the problem of lowering in the manufacturing yield caused by static electricity by providing a shift register circuit part constituted mainly of N pieces of shift registers and a dummy circuit whose output is not connected to these shift registers on a base. CONSTITUTION:A signal line driving circuit part 201 is constituted of a shift register circuit part 211 with the N pieces of shift registers sequentially connected thereto, the group of analog switches SW1 to SWN for sequentially sampling video signals Vsig to be input to a video signal line 251 in accordance with outputs from the respective shift registers for a specified periode of time and the group of capacitors C1 to CN for holding selected signal voltages Vq. Further, this shift register circuit part 211 is provided with a dummy circuit part between a first stage shift register and the input terminal of a start signal and a dummy circuit part on the more termination side than the shift register of the N stages electrically.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device drive circuit and a liquid crystal display device using the same.

[0002]

2. Description of the Related Art As a display device replacing a CRT display, a flat panel display such as a light and thin liquid crystal display device or a plasma display device has been attracting attention. Among them, liquid crystal display devices can be driven with low power consumption, and are therefore used for display screens for various applications such as viewfinders, portable televisions, personal computers and the like.

In such a display device such as a liquid crystal display device, there is an increasing demand for higher definition. Then, in order to realize such high definition, in order to solve the troublesomeness of the connection between the display device drive circuit portion and each display pixel electrode, the display device drive circuit portion and the display pixel electrode are made the same. Attempts have been made to form it on a transparent insulating substrate such as quartz.

A liquid crystal display device having such a display device drive circuit portion and display pixel electrodes formed on the same substrate will be briefly described. The liquid crystal display device is configured by holding a liquid crystal layer between a pair of electrode substrates via an alignment film. One of the electrode substrates is an insulating substrate in which a plurality of display pixel electrodes arranged two-dimensionally and a signal line driving circuit unit and a scanning line driving circuit unit connected to each display pixel electrode via a switch element are the same. Made of formed on. Further, the other electrode substrate is formed by providing a counter electrode which is electrically common on a transparent insulating substrate.

The scanning line drive circuit section is mainly composed of a shift register circuit section, and the signal line drive circuit section is composed of a shift register circuit section and a shift register (SR) of each stage constituting the shift register circuit section. An analog switch (SW) group that sequentially selects a video signal (Vsig) by output and outputs it to each signal line, and a capacitor (C) group that holds the signal voltage (Vq) selected by the analog switch (SW) group. It is composed by.

[0006]

By the way, in a display device such as a liquid crystal display device in which a display pixel electrode and a drive circuit portion are formed on a transparent insulating substrate such as a glass or quartz substrate,
Insulating film defects occur due to static electricity generated during the transportation of the substrate and during the manufacturing process such as the rubbing process of the alignment film formed on the substrate surface.

As a positive method for solving the insulation failure due to static electricity, for example, a technique is known in which each wiring is short-circuited by a conductor called a short ring. However, the current situation is that even if such a method is used, it is not possible to completely take measures against static electricity.

Particularly, when a short circuit defect occurs due to the breakdown of the gate insulating film of the thin film transistor (hereinafter abbreviated as TFT) which constitutes the shift register circuit part of the scanning line drive circuit part or the signal line drive circuit part, after the defective part. All the shift registers (SR) are not driven, and the display operation cannot be performed at all.

As another method for solving the insulation failure due to static electricity, it is possible to provide a protection circuit such as a resistor on the signal input side of the shift register circuit section. However, in order to achieve higher definition such as for high-definition, higher drive frequency is indispensable, and it is not preferable to insert an input protection circuit that causes distortion of input signal waveform.

The present invention has been made in view of the above technical problems, and solves a decrease in manufacturing yield due to static electricity generated during manufacturing and enables a highly accurate driving, and a liquid crystal using the same. It is intended to provide a display device.

[0011]

A display device drive circuit according to the present invention mainly comprises N shift registers in which a plurality of shift registers are sequentially connected to a first shift register connected to a signal input wiring. A shift register circuit section and a dummy circuit section connected to the signal input wiring and having an output connected to none of the N shift registers are provided on the substrate.

According to a second aspect of the present invention, there is provided a display device drive circuit in which the dummy circuit section according to the first aspect is composed of two or more dummy circuits having substantially the same structure as the shift register.

According to a third aspect of the present invention, there is provided a drive circuit for a display device, which is mainly composed of N shift registers electrically connected to a power supply line, a ground line and a clock line on a substrate. In a display device drive circuit including a circuit unit, at least one of the power supply line, the ground line, and the clock line.
And a dummy circuit portion provided adjacent to the first or Nth shift register on the substrate.

According to a fourth aspect of the present invention, there is provided a display device drive circuit in which the dummy circuit portion according to the third aspect is composed of two or more dummy circuits having substantially the same structure as the shift register.

According to a fifth aspect of the present invention, a plurality of display pixel electrodes arranged two-dimensionally, a switch element provided for each display pixel electrode, and a signal voltage applied to the switch element. A liquid crystal display device comprising a signal line drive circuit for supplying and a scan line drive circuit for supplying a scan signal for controlling ON / OFF of the switch element, wherein the signal line drive circuit and the scan line drive circuit are provided. At least one of which is connected to the signal input wiring, and a shift register circuit unit mainly composed of N shift registers in which a plurality of shift registers are sequentially connected to the first shift register connected to the signal input wiring. And a dummy circuit section whose output is not connected to any of the N shift registers.

According to a sixth aspect of the present invention, a plurality of display pixel electrodes arranged two-dimensionally, a switch element provided for each display pixel electrode, and a signal voltage is supplied to the switch element. A liquid crystal display device comprising a signal line driving circuit and a scanning line driving circuit for supplying a scanning signal for controlling ON / OFF of the switch element on the same substrate,
At least one of the signal line driving circuit and the scanning line driving circuit includes a shift register circuit unit mainly composed of N shift registers electrically connected to a power supply line, an earth line, and a clock line, and the power supply. A dummy circuit section which is connected to at least one of a line, the ground line and the clock line and is provided adjacent to the first or Nth shift register.

[0017]

The present inventors conducted a sincere research focusing on defects caused by static electricity generated during the manufacturing of the display device drive circuit, and found that even if countermeasures against static electricity were taken by a short ring, etc. Of the TFTs forming the shift register (SR) in the vicinity of the start signal input side of the shift register circuit portion forming the drive circuit or the shift register (SR) on the opposite side, the gate insulation of the TFT in an electrically floating state It was found that the film destruction was remarkable.

For example, FIG. 5 shows a schematic equivalent circuit diagram of a clocked inverter type shift register circuit section. In particular, a shift register (S) on the start signal input side is shown.
R) or the gate insulating film of the TFT in the shift register (not shown) on the opposite side to the gate insulating film is often broken, and the broken portion is the gate insulating film of the TFT shown in (a) to (j) of FIG. Met.

The reason for this is that even if the clock signal line or the power supply voltage line or the like forming the shift register circuit section is connected by a short ring, the shift register circuit section still has electrically floating TFTs. In addition, the clock signal line or the power supply voltage line, etc. acts as an antenna due to being routed to the same length as the shift register circuit section,
It was newly found that this is because it promotes the breakdown of the insulating film due to static electricity.

The inventors of the present invention have arrived at the present invention after conducting sincerity research based on such novel knowledge, and in particular, by providing the dummy circuit section as described above, the actual operation has no effect. It protects the areas that operate without problems, which can dramatically improve the manufacturing yield.

[0021]

EXAMPLE A liquid crystal display device according to an example of the present invention will be described below.
(1) will be described with reference to the drawings. As shown in FIG. 1, this liquid crystal display device (1) is made of polycrystalline silicon (hereinafter abbreviated as p-Si) for applying a scanning voltage (Vp) to each of the M scanning lines (11). And a scanning line driving circuit unit (101) composed of a TFT (not shown) and a signal voltage (Vq) from a video signal (Vsig) are sequentially applied to each of the N signal lines (21). A signal line drive circuit unit (201) composed of a TFT (not shown) made of Si,
Each drive circuit unit (10) via the TFT (31) made of p-Si
Although not shown, the first electrode substrate (5) is provided with the display pixel electrodes (41) connected to (1) and (201) and arranged two-dimensionally on the transparent insulating substrate (3) made of quartz. A liquid crystal layer is formed between the counter electrode (51) and the second electrode substrate formed on the transparent insulating substrate.
(61) is held and made up.

Each TFT in which the source electrode (S) is connected to the display pixel electrode (41) made of ITO (Indium-Tin-Oxide)
The gate electrode (G) and drain electrode (D) of (31) are connected to the scanning line (11) and the signal line (21), respectively.

This signal line drive circuit section (201) includes a shift register circuit section (211) in which N shift registers (SR1) to (SRN) (see FIG. 2) are sequentially connected, and each shift register (SRj). ), A group of analog switches (SW1) to (SWN) for sequentially sampling the video signal (Vsig) input to the video signal line (251) for a predetermined period, and holding the selected signal voltage (Vq). It is composed of a group of capacitors (C1) to (CN).

Further, the configuration of the shift register circuit section (211) will be described in detail with reference to FIG. Each shift register (SR
j) is the power supply voltage line to which the power supply voltage (VDD) is applied
(221) and an earth line (223) connected to the ground (VG), which is a clocked inverter type mainly composed of two P-type TFTs and N-type TFTs connected in series. The first clock signal (CK1) and the second clock signal (CK2) which is the inverted signal of the first clock signal (CK1) are sequentially synchronized with the start signal (ST) and the shift register (SRj ) Works to transfer.

By the way, the shift register circuit section (21
1) is a dummy circuit section (241) between the first-stage shift register (SR1) and the input terminal of the start signal (ST),
Further, dummy circuit portions (not shown) are provided on the terminal side of the Nth stage shift register (SRN) electrically.

The input terminal of the start signal (ST) of the shift register circuit section (211) and the shift register of the first stage (SR1
The dummy circuit section (241) provided between the shift registers (4) and (4) is composed of four dummy circuits (SRD1) to (SRD4) having substantially the same structure as each shift register (SRj). That is, each of the dummy circuits (SRD1) to (SRD4) includes two P-type TFTs (243P) and (245P) connected in series and an N-type TF.
It consists of T (243N), (245N), and TFT (243P), (245
N) is connected to the power supply voltage line (221) and the ground line (223), respectively. In addition, adjacent P-type and N-type TFTs
Gate of (245P), (243N) is start signal line (225)
And a P-type TFT (243P) connected to the power supply voltage line and an N-type TFT (245P connected to the ground line (223).
Each gate of N) is connected to the clock signal lines (227) and (229), respectively, and each output is configured not to be connected to the next stage.

Also, the Nth shift register circuit section (211)
The dummy circuit section (not shown) electrically provided on the terminal side of the shift register (SRN) of the stage has substantially the same structure, and the output of this dummy circuit is the output of another shift register (SR).
The output of the Nth stage shift register (SRN) is not connected to a dummy circuit section (not shown).

With this structure, even if static electricity is generated during manufacturing, the input terminal of the shift register circuit section (211) and the first-stage shift register (SR1) do not affect the actual operation. A dummy circuit (S
TFTs (243P), (245P), (2 which compose RD1) to (SRD4)
43N) and (245N) are destroyed or a dummy circuit section (not shown) is provided adjacent to the Nth stage shift register (SRN) of the shift register circuit section (201).
The FT (not shown) was only destroyed, and the manufacturing yield could be greatly improved.

In this embodiment, the shift register circuit section (2
Between the input terminal of the start signal (ST) 11) and the shift register (SR1) of the first stage, four dummy circuits (SRD
1) to (SRD4) are provided with four dummy circuits adjacent to the Nth stage shift register (SRN) of the shift register circuit section (201).
The number of 1) to (SRD4) is not limited to this. However, if you are sure to take measures against static electricity, it is better to use two or more each, and even if you exceed 10, the effect will be saturated and an extra area will be required, so it is preferable that 2 or more and 10 or less. Is good.

Further, a dummy circuit (SRD1) is provided after the manufacturing is completed.
~ (SRD4) start signal line by laser etc.
By disconnecting from (225) and the power supply voltage line (221), it is possible to prevent unnecessary increase in capacity and the like.

Furthermore, each dummy circuit (SRD1) to (SRD1)
4) TFT (243P), (245P) and TFT (243P)
It is preferable that N) and (245N) are more easily destroyed by static electricity than the TFTs forming the shift register circuit section (211). For example, dummy circuits (SRD1) to (SRD4)
The shape of the TFT that constitutes the shift register circuit part (211)
It is preferable to make the structure smaller than the TFT constituting the device, or to make the material and thickness of the insulating film different so as to be easily destroyed.

Further, in this embodiment, each dummy circuit (S
TFTs (243P), (245P), (2 which compose RD1) to (SRD4)
43N), (245N) each wiring (221), (223), (225), (227), (229)
However, it may be connected to the clock signal lines (227) and (229), the power supply voltage line (221), the ground line (223) and the like.

Next, another embodiment of the present invention will be described with reference to FIG.
Will be described with reference to. In this embodiment, the shift register circuit unit (311) has four parallel shift register groups (SR1-k
)-(SR4-k).

Each of the shift registers (SR1-k) to (SR4-k) constituting the shift register circuit section (311) mainly has a power supply voltage line (321) and an earth line (323), as in the above-described embodiment. ) And two Ps connected in series
-Type TFT and N-type TFT are mainly used in the clocked inverter type, and the first shift register group (SR
1-k) includes a first clock signal (CK1) and a start signal (ST1) successively in synchronization with a second clock signal (CK2) which is an inverted signal of the first clock signal (CK1). Of the shift register (SR1-k).

Further, the second to fourth shift register groups (S
Similarly, R2-k) to (SR4-k) are start signals in synchronization with the third clock signal (CK3) and the fourth clock signal (CK4) which is an inverted signal of the third clock signal (CK3). (ST2) sequentially in the next stage shift register (SR2-
In k), the start signal (ST3) is sequentially shifted to the next stage in synchronization with the fifth clock signal (CK5) and the sixth clock signal (CK6) which is an inverted signal of the fifth clock signal (CK5). In the register (SR3-k), the seventh clock signal (CK7) and this seventh clock signal (CK7)
The start signal (ST4) is sequentially transferred to the shift register (SR4-k) of the next stage in synchronization with the eighth clock signal (CK8) which is the inverted signal of the above.

Then, the input terminals of the start signals (ST1) to (ST4) of the shift register circuit section (311) and each shift register of the first stage of each shift register group (SR1-k) to (SR4-k). (SR1-1), (SR2-1), (SR3-
1) and (SR4-1) and three dummy circuits (SRD1-1) to (SRD1-3) and (SRD2-1) to (SRD), respectively.
D2-3), (SRD3-1) ~ (SRD3-3), (SRD4-1) ~
A dummy circuit section (341) composed of (SRD4-3) is inserted. Needless to say, dummy circuit sections (not shown) may be provided adjacent to the terminal side of the shift register circuit section (311) as in the above-described embodiments.

By the way, the dummy circuits (SRD1-1) to
(SRD4-3) is connected to each shift register (SR1-k) to (S).
R4-k) and two P-type Ts connected in series with the same structure
It consists of FT (343P), (345P) and N-type TFT (343N), (345N). The TFT (343P), (345N) at both ends is the power supply voltage line (3
21) and ground line (323) respectively.
In addition, the gates of the adjacent P-type and N-type TFTs (345P) and (343N) are connected to the start signal lines (325-1) to (325-4) and to the power supply voltage line (321). Each gate of the N-type TFT (345N) connected to the TFT (343P) and the ground line (323) has clock signal lines (327-1) to (327-4), (329).
-1) to (329-4), and each output is not connected to the next stage.

In this way, four shift register groups (S
Even if the shift register circuit unit (311) is configured with R1-k) to (SR4-k) in parallel, by inserting the dummy circuits (SRD1-1) to (SRD4-4) as described above, TFTs (343P), (345P), (343N), (345N) that form dummy circuits (SRD1-1) to (SRD4-4) that do not affect the actual operation even if static electricity is generated during manufacturing However, the manufacturing yield could be greatly improved even though the number of wirings was increased.

Further, in this embodiment, since the shift register circuit section (311) is constructed by arranging four shift register groups (SR1-k) to (SR4-k) in parallel,
The operation speed of each shift register group (SR1-k) to (SR4-k) can be reduced to about 1/4.

Next, still another embodiment of the present invention will be described with reference to FIG. FIG. 4 shows a shift register circuit unit (411) configured to enable bidirectional transfer. In a three-plate projection type liquid crystal display device or the like in which three liquid crystal display devices are combined, at least one liquid crystal display device may differ from the others in the number of times of image inversion depending on the arrangement. Therefore, it is necessary to make the order of applying the signal voltage (Vq) different from that of the other liquid crystal display device, so that the shift register circuit unit (4
By providing 11), it is possible to eliminate the need for manufacturing multiple types of liquid crystal display devices.
It is possible to solve problems such as product management.

Each of the shift registers (SR1) to (SR4) forming the shift register circuit section (411) mainly uses the power supply voltage line (42) as in the first embodiment described above.
1) is connected to the ground line (423), and is composed of a clocked inverter type mainly composed of two P-type TFTs and N-type TFTs connected in series, and the shift register (SRj) is the first Clock signal (CK1) and a start signal (ST) in synchronization with a second clock signal (CK2) which is an inverted signal of the first clock signal (CK1).
Are sequentially transferred to the shift register (SRj) of the next stage.

Further, between the shift registers (SRj) constituting the shift register circuit section (411), the first switching signal (DS1) and the second switching signal (DS1) which is an inversion signal of the first switching signal (DS1). There are provided switching circuits (SD1) to (SDN) for determining the transfer direction between the shift registers (SRj) based on the switching signal (DS2).

The shift register circuit section (411)
Is one input end of the shift register circuit unit (411) and the first
Five sets of dummy circuits (SRD1) to (SRD5) and (SDD1) to (SDD) are provided between the shift register (SR1) of the stage.
The dummy circuit section (441) consisting of 5) also includes five sets of dummy circuits (not shown) between the other input terminal of the shift register circuit section (411) and the Nth stage shift register (SRN). (Not shown), respectively.

The dummy circuits (SRD1) to (SRD5) provided between one input terminal of the shift register circuit section (411) and the first-stage shift register (SR1) are connected to the shift register (SRj). Two P-type TFTs (443P), (445P) and N-type TFTs (443N), which are connected in series and have almost the same structure,
It consists of (445N), and the TFTs (443P) and (445N) at both ends are connected to the power supply voltage line (421) and the earth line (423), respectively. The gate of the P-type TFT (445P) is connected to the power supply voltage line (421), the gate of the N-type TFT (443N) is connected to the ground line (423), and the P-type TFT (443) is connected.
Gates of P) and N-type TFT (445N) are clock signal lines (4
27) and (429), and the outputs are not connected to the next stage.

Then, each dummy circuit (SDD1) to (SDD1)
D5) is composed of two P-type TFTs (453P), (455P) and N-type TFTs (453N), (455N) connected in series and having substantially the same structure as the switching circuits (SD1) to (SDN). TFT (4
The gates of 53P) and (455N) are connected to the switching signal lines (471) and (473), respectively. In addition, adjacent P-type and N-type T
The gate of FT (455P), (453N) is the start signal line (42
5) and each output is configured not to be connected to the next stage.

In this way, when the shift register (SRj) is provided with the switching circuit (SDj) for providing bidirectionality, the switching circuit is also provided between the input side and the first-stage shift register (SR1). By inserting dummy circuits (SDD1) to (SDD5) having substantially the same structure as (SDj), the switching circuit (SDj) together with the shift register (SRj),
It is possible to prevent the breakdown of the insulating film due to the static electricity generated during the manufacturing process, and it is possible to greatly improve the manufacturing yield like the other embodiments described above.

As described in detail above, according to each embodiment,
It is possible to eliminate a decrease in manufacturing yield due to static electricity that occurs during manufacturing of the display device driving circuit. In any of the above-mentioned embodiments, the TFT (3
Although 1) is composed of p-Si, it may be composed of amorphous silicon (a-Si) or single crystal silicon, or MIM (Metal-Insulator-).
A metal element may be used as a switch element.

Although the signal line drive circuit (201) has been described in each of the above-described embodiments, it is needless to say that a dummy circuit may be provided in the shift register portion constituting the scanning line drive circuit (101), for example. . Of course, the effect of the present invention can be obtained even when a single crystal substrate or the like is used as the substrate in addition to the transparent insulating substrate made of quartz.

[0049]

As described in detail above, according to the driving circuit for a display device of the present invention and the liquid crystal display device using the same, it is possible to eliminate a decrease in manufacturing yield due to static electricity generated during manufacturing.

[Brief description of drawings]

FIG. 1 is a diagram showing a schematic cross-sectional view of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a schematic equivalent circuit diagram of the shift register circuit unit in FIG.

FIG. 3 is a schematic equivalent circuit diagram of a shift register circuit unit according to another embodiment of the present invention.

FIG. 4 is a schematic equivalent circuit diagram of a shift register circuit unit according to another embodiment of the present invention.

FIG. 5 is a schematic equivalent circuit diagram of a shift register circuit portion of a conventional liquid crystal display device.

[Explanation of symbols]

 (1) ... liquid crystal display (201) ... signal line drive circuit section (211) ... shift register circuit section (221) ... power supply line (241) ... dummy circuit section

Claims (6)

[Claims] 1. A shift register circuit section mainly composed of N shift registers in which a plurality of shift registers are sequentially connected to a first shift register connected to a signal input wiring, and connected to the signal input wiring. And a dummy circuit section whose output is not connected to any of the N shift registers on the substrate. 2. The drive circuit for a display device according to claim 1, wherein the dummy circuit section is composed of two or more dummy circuits having substantially the same structure as the shift register. 3. A drive circuit for a display device, comprising a shift register circuit section mainly composed of N shift registers electrically connected to a power supply line, an earth line and a clock line on a substrate, wherein the power supply is provided. A display device, comprising: a dummy circuit section connected to at least one of a line, the ground line and the clock line and provided adjacent to the first or Nth shift register on the substrate. Drive circuit. 4. The drive circuit for a display device according to claim 3, wherein the dummy circuit section is composed of two or more dummy circuits having substantially the same structure as the shift register. 5. A plurality of display pixel electrodes arranged two-dimensionally, a switch element provided for each display pixel electrode, a signal line drive circuit for supplying a signal voltage to the switch element, and the switch. A liquid crystal display device comprising a scanning line driving circuit for supplying a scanning signal for controlling ON / OFF of an element on the same substrate, wherein at least one of the signal line driving circuit and the scanning line driving circuit is connected to a signal input wiring. A shift register circuit unit mainly composed of N shift registers in which a plurality of shift registers are sequentially connected to the first shift register, and the N shift registers whose outputs are connected to the signal input wiring. A liquid crystal display device comprising a dummy circuit portion that is not connected to any of the above. 6. A plurality of display pixel electrodes arranged two-dimensionally, a switch element provided for each display pixel electrode, a signal line drive circuit for supplying a signal voltage to the switch element, and the switch. A liquid crystal display device comprising a scanning line driving circuit for supplying a scanning signal for controlling ON / OFF of an element on the same substrate, wherein at least one of the signal line driving circuit and the scanning line driving circuit is a power line or an earth line. And a shift register circuit section mainly composed of N shift registers electrically connected to each of the clock lines, and at least one of the power supply line, the ground line and the clock line, and the first or A liquid crystal display device, comprising: a dummy circuit portion provided adjacent to the Nth shift register.