JPH0784239A - Liquid crystal display device - Google Patents

Liquid crystal display device

Info

Publication number
JPH0784239A
JPH0784239A JP23147593A JP23147593A JPH0784239A JP H0784239 A JPH0784239 A JP H0784239A JP 23147593 A JP23147593 A JP 23147593A JP 23147593 A JP23147593 A JP 23147593A JP H0784239 A JPH0784239 A JP H0784239A
Authority
JP
Japan
Prior art keywords
signal
liquid crystal
wirings
display device
crystal display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP23147593A
Other languages
Japanese (ja)
Other versions
JP3322948B2 (en
Inventor
Hisaaki Hayashi
央晶 林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP23147593A priority Critical patent/JP3322948B2/en
Publication of JPH0784239A publication Critical patent/JPH0784239A/en
Application granted granted Critical
Publication of JP3322948B2 publication Critical patent/JP3322948B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To provide the liquid crystal display device having a high display grade and high reliability by eliminating display defects, such as linear image burns and unequal display in a perpendicular direction generating at the end of the display region of a screen. CONSTITUTION:Dummy signal wirings 115 are arranged in adjacent columns apart pixel electrodes 119 in nearly parallel with signal wirings (Xm) 117 existing at the extreme end of the columns (m-th column) of m-pieces of the signal wirings 105. These dummy signal wirings 115 are electrically connected to the signal wiring (Xm-1) 121 of the front column ((m-t)th column) of the signal wirings (Xm) 117 so that the same voltages are applied. Parasitic capacitances for two pieces of the signal wirings are formed in the same manner as with the other pixel electrodes 109, by which the level shift of the potentials is nearly effectively eliminated even at the pixel electrodes 119 of the m-th column in the same manner as for the other pixel electrodes 109.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は液晶表示装置に係り、特
に表示品位が高くかつ信頼性の高いアクティブマトリッ
クス型液晶表示装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly to an active matrix type liquid crystal display device having high display quality and high reliability.

【0002】[0002]

【従来の技術】液晶表示装置は、薄型、低消費電力等の
特徴を生かして、テレビあるいはグラフィックディスプ
レイなどの表示素子として盛んに利用されている。
2. Description of the Related Art Liquid crystal display devices have been widely used as display elements for televisions, graphic displays and the like by taking advantage of features such as thinness and low power consumption.

【0003】中でも、薄膜トランジスタ(Thin Film Tr
ansistor;以下、TFTと略称)をスイッチング素子と
して用いたアクティブマトリックス型液晶表示装置は、
高速応答性に優れ、高精細化に適しており、ディスプレ
イ画面の高画質化、大型化、カラー画像化を実現するも
のとして注目され、例えば画素の配列ピッチが 200μm
程度で、かつ画素数が約 100万画素といった高精細なア
クティブマトリックス型液晶表示装置が開発されてい
る。
Among them, a thin film transistor (Thin Film Tr
An active matrix type liquid crystal display device using an ansistor (hereinafter abbreviated as TFT) as a switching element is
It excels in high-speed responsiveness and is suitable for high-definition. It attracts attention as a display screen with high image quality, large size, and color imaging. For example, the pixel array pitch is 200 μm.
A high-definition active matrix type liquid crystal display device with about 1 million pixels has been developed.

【0004】アクティブマトリックス型液晶表示装置の
表示素子部分は、一般的にTFTのようなスイッチング
用アクティブ素子とこれに接続された画素電極が配設さ
れたアクティブ素子アレイ基板と、これに対向して配置
される対向電極が形成された対向基板と、これら基板間
に挟持される液晶組成物と、さらに各基板の外表面側に
貼設される偏光板とから、その主要部分が構成されてい
る。
The display element portion of an active matrix type liquid crystal display device generally comprises an active element array substrate provided with a switching active element such as a TFT and a pixel electrode connected to the switching active element, and facing the active element array substrate. A main part is composed of a counter substrate having counter electrodes arranged thereon, a liquid crystal composition sandwiched between these substrates, and a polarizing plate attached to the outer surface side of each substrate. .

【0005】図5はこのようなアクティブマトリックス
型液晶表示装置の等価回路を示す図である。TFT素子
基板501上には、交差するようにそれぞれ配列された
複数の走査配線503および複数の信号配線505と、
この走査配線503および信号配線505の交差部ごと
に形成され、走査配線503にゲートが接続され信号配
線505にドレインが接続されたスイッチング用のTF
T(Thin Film Transistor;以下、TFTと略称)素子
507と、複数の走査配線503と複数の信号配線50
5とが形成する格子ごとに収まるように外形がほぼ矩形
状に形成されTFT素子507のソースに接続された画
素電極509とが配設されている。そして前記の画素電
極509に間隙を有して対向電極511が対向配置さ
れ、画素電極509と対向電極511との間に液晶組成
物513が封入・挟持されて、液晶表示装置の液晶セル
(液晶表示パネル)の主要部は形成されている。
FIG. 5 is a diagram showing an equivalent circuit of such an active matrix type liquid crystal display device. On the TFT element substrate 501, a plurality of scanning wirings 503 and a plurality of signal wirings 505, which are arranged so as to intersect each other,
The switching TF is formed at each intersection of the scanning wiring 503 and the signal wiring 505, and the gate is connected to the scanning wiring 503 and the drain is connected to the signal wiring 505.
A thin film transistor (T) element 507, a plurality of scanning wirings 503, and a plurality of signal wirings 50
5 and a pixel electrode 509 connected to the source of the TFT element 507 is provided so that the outer shape thereof is formed into a substantially rectangular shape so as to be accommodated in each of the grids. Then, the counter electrode 511 is disposed so as to face the pixel electrode 509 with a gap therebetween, and the liquid crystal composition 513 is sealed and sandwiched between the pixel electrode 509 and the counter electrode 511, and a liquid crystal cell (liquid crystal The main part of the display panel) is formed.

【0006】走査配線503は走査ドライバ回路(図示
省略)に接続されて、走査電圧(いわゆる走査パルス波
形と走査非選択時電圧波形とを含む電圧)が印加される
とともに、信号配線505は信号ドライバ回路(図示省
略)に接続されて、信号電圧(画像データに対応した波
形のデータ信号)が印加され、これらの印加電圧に基づ
いて液晶セルが駆動され画像表示が行なわれる。
The scanning wiring 503 is connected to a scanning driver circuit (not shown) to apply a scanning voltage (a voltage including a so-called scanning pulse waveform and a scanning non-selection voltage waveform), and the signal wiring 505 is a signal driver. A signal voltage (a data signal having a waveform corresponding to image data) is applied to the circuit (not shown), and the liquid crystal cell is driven based on these applied voltages to display an image.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、上記の
ような従来のアクティブマトリックス型の液晶表示装置
を約50℃の高温条件下に置き数百時間にわたって駆動
(点灯)させ続ける耐久性試験を施したとき、液晶表示
パネル画面の表示領域端部に垂直方向にライン状の表示
欠陥が頻発する。このような表示不良は、継続駆動(点
灯)時間が長くなるにしたがってさらに顕著になる。こ
の表示欠陥によって、画面の端部に垂直方向のライン状
のちらつきやむらが目立ち、表示品位が低下するという
問題があった。
However, a durability test was conducted in which the conventional active matrix type liquid crystal display device as described above was placed under a high temperature condition of about 50 ° C. and continuously driven (lighted) for several hundred hours. At this time, line-shaped display defects frequently occur in the vertical direction at the edges of the display area of the liquid crystal display panel screen. Such a display defect becomes more remarkable as the continuous drive (lighting) time becomes longer. Due to this display defect, there is a problem that vertical line-shaped flicker or unevenness is conspicuous at the edge of the screen, and the display quality is degraded.

【0008】本発明は、このような問題を解決するため
に成されたもので、その目的は、特にアクティブマトリ
ックス型の液晶表示装置の画面の表示領域端部に発生す
る垂直方向のライン状の表示欠陥を解消して、表示品位
が高くかつ信頼性の高い液晶表示装置を提供することに
ある。
The present invention has been made to solve such a problem, and its purpose is to form a vertical line-like pattern which occurs at the end of the display area of the screen of an active matrix type liquid crystal display device. An object of the present invention is to provide a liquid crystal display device having high display quality and high reliability by eliminating display defects.

【0009】[0009]

【課題を解決するための手段】上記課題を解決するため
に本発明は、基板上に互いに交差するように配列された
複数の走査配線と複数の信号配線と該走査配線および該
信号配線の交差部ごとに形成され該走査配線および該信
号配線に接続されたスイッチング素子と該スイッチング
素子ごとに接続された画素電極とが形成されたスイッチ
ング素子アレイ基板と、前記スイッチング素子アレイ基
板に間隙を有して対向配置される対向電極が形成された
対向基板と、前記スイッチング素子アレイ基板と前記対
向基板との間に封入された液晶組成物とを有する液晶表
示装置において、前記複数の信号配線のうち端列に位置
する信号配線に対して略平行に画素電極を隔てて隣列し
て配置されるとともに、前記端列に位置する信号配線の
前列の信号配線に電気的に接続されたダミー信号配線を
具備することを特徴としている。
In order to solve the above problems, the present invention provides a plurality of scanning wirings, a plurality of signal wirings, and the intersections of the scanning wirings and the signal wirings arranged on the substrate so as to intersect each other. A switching element array substrate having switching elements connected to the scanning wirings and the signal wirings formed for each section and pixel electrodes connected to the switching elements; and a gap between the switching element array substrate. In a liquid crystal display device having a counter substrate having a counter electrode formed to face each other and a liquid crystal composition sealed between the switching element array substrate and the counter substrate, one end of the plurality of signal wirings is provided. The signal lines are arranged in parallel with the signal lines in the columns and are arranged adjacent to each other with the pixel electrodes interposed therebetween. It is characterized by comprising a gas connected to a dummy signal line.

【0010】あるいは、上記の液晶表示装置において、
走査電圧波形を発生し前記複数の走査配線に印加する走
査ドライバ回路と、前記複数の信号配線のうち偶数列の
信号配線に印加する信号電圧の変位方向と奇数列の信号
配線に印加する信号電圧の変位方向とが逆方向である信
号電圧波形を発生して、前記複数の信号配線に印加する
信号ドライバ回路とを具備することを特徴としている。
Alternatively, in the above liquid crystal display device,
A scan driver circuit that generates a scan voltage waveform and applies it to the plurality of scan wirings, a displacement direction of the signal voltage applied to the signal wirings in the even-numbered columns of the plurality of signal wirings, and a signal voltage applied to the signal wirings in the odd-numbered columns And a signal driver circuit for generating a signal voltage waveform having a direction opposite to the displacement direction and applying the signal voltage waveform to the plurality of signal wirings.

【0011】なお、前記のスイッチング素子としては、
TFT素子のようないわゆる 3端子型非線形素子や、M
IM(Metal Insulator Metal )素子のような 2端子素
子を用いることができる。
As the switching element,
So-called three-terminal type non-linear element such as TFT element, M
A two-terminal element such as an IM (Metal Insulator Metal) element can be used.

【0012】本発明に係る液晶表示装置の駆動方式とし
ては、複数の信号配線のうち偶数列の信号配線に印加す
る信号電圧の変位方向と奇数列の信号配線に印加する信
号電圧の変位方向とが逆方向であるような、いわゆるV
ライン反転駆動方式が好適である。しかしこれのみには
限定せず、例えばコモン反転方式の液晶表示装置などに
も適用することができることは言うまでもない。
As the driving method of the liquid crystal display device according to the present invention, the displacement direction of the signal voltage applied to the signal wirings in the even-numbered columns and the displacement direction of the signal voltage applied to the signal wirings in the odd-numbered columns are selected among the plurality of signal wirings. Is the opposite direction, so-called V
A line inversion drive system is suitable. However, it is needless to say that the present invention is not limited to this and can be applied to, for example, a common inversion type liquid crystal display device.

【0013】[0013]

【作用】従来のアクティブマトリックス型の液晶表示装
置では、m本列設された信号配線のうち最端列、すなわ
ちm列めに位置する信号配線(Xm )に接続された最端
部の画素電極だけには、その次列の信号配線(Xm+1
は隣列して設けられていないために、他の画素電極とは
異なった条件下に置かれていた。すなわち、その最端部
の画素電極だけは、左右両脇のうちいずれか一方に信号
配線が近傍に存在し他方には存在していない。
In the conventional active matrix type liquid crystal display device, the pixel at the end connected to the signal line (X m ) located in the end line of the m signal lines, that is, the m-th line. Signal wiring (X m + 1 ) in the next column only for the electrodes
Since they are not provided next to each other, they are placed under conditions different from those of other pixel electrodes. That is, only the pixel electrode at the extreme end has the signal wiring in the vicinity on either one of the left and right sides, and does not exist on the other side.

【0014】このため、その他の画素電極においては両
脇に隣列して配置された 2本の信号配線(Xi
i+1 ;i =1,2,3…,m-1)とこれらに挟まれた画素電極
との間で、層間絶縁膜や液晶層等を誘電体として寄生的
な電気容量(寄生容量)が形成されて、これに基づいた
画素電極電位のレベルシフトが生じる一方、最端部の画
素電極には片脇の 1本の信号配線だけとの間で寄生容量
が形成されて、これに基づいた画素電極電位のレベルシ
フトが生じていたので、その最端部の画素電極だけに異
なった画素電極電位のレベルシフトが生じてしまい、最
端部の画素電極だけに他とは異なった顕著な表示不良が
発生していた。
Therefore, in the other pixel electrodes, two signal wirings (X i , X i ,
X i + 1 ; i = 1,2,3 ..., m-1) and the pixel electrodes sandwiched between them, and the parasitic electric capacitance (parasitic capacitance) by using an interlayer insulating film or a liquid crystal layer as a dielectric. ) Is formed and a level shift of the pixel electrode potential based on this is generated, while a parasitic capacitance is formed between the pixel electrode at the end and only one signal line on one side, and Since the level shift of the pixel electrode potential based on the pixel electrode potential has occurred, only the pixel electrode potential level shifts at the outermost end pixel electrode, and only the pixel electrode potential at the outermost end point is different from the others. There was a display defect.

【0015】そこで、本発明に係る液晶表示装置におい
ては、m本の信号配線のうち最端列(m列め)に位置す
る信号配線(Xm )に対してほぼ平行に、信号配線(X
m )に接続された最端列(m列め)の画素電極を隔てて
ダミー信号配線を並列して配置した上、そのダミー信号
配線を前記の最端列(m列)に位置する信号配線
(Xm )の前列(m−1列め)の信号配線(Xm-1 )に
電気的に接続して同じ波形の電圧が印加されるようにし
て、最端列(m列め)の画素電極においてもその他の画
素電極とほぼ同様の信号配線 2本分の寄生容量を形成す
ることで、その他の画素電極と同様の画素電極電位のレ
ベルシフトを最端部の(m列めの)画素電極にも生じさ
せている。これにより、最端部の画素電極を含めて全て
の画素電極でほぼ同様の条件にすることができ、画面の
最端部だけに顕著に生じていた表示不良を緩和すること
ができる。
Therefore, in the liquid crystal display device according to the present invention, the signal wiring (Xm) is arranged substantially parallel to the signal wiring (Xm) located in the endmost column (mth column) of the m signal wirings.
The dummy signal wirings are arranged in parallel with the pixel electrodes of the outermost row (mth row) connected to m ) arranged in parallel, and the dummy signal wirings are located in the outermost row (mth row). (X m ) is electrically connected to the signal wiring (X m-1 ) on the front row (the m-1 th row) so that the voltage of the same waveform is applied to the signal wiring (X m-1 ) on the last row (the m th row). In the pixel electrode, the level shift of the pixel electrode potential similar to that of the other pixel electrodes is performed at the end (in the m-th column) by forming the parasitic capacitance of two signal lines, which is almost the same as the other pixel electrodes. It is also generated in the pixel electrode. As a result, almost the same conditions can be set for all the pixel electrodes including the pixel electrode at the outermost end, and the display failure that is noticeably caused only at the outermost end of the screen can be alleviated.

【0016】特に、いわゆるVライン反転駆動方式で駆
動される液晶表示装置の場合には、最端部の画素電極の
電位レベルシフトを、その他の画素電極における電位レ
ベルシフトと同様に小さいものに抑えることができるの
で、本発明の技術は特に効果的である。すなわち最端列
の信号配線に印加する信号電圧の変位方向とダミー信号
配線に印加する信号電圧の変位方向とを逆方向にするこ
とにより、最端列の信号配線と画素電極との間で形成さ
れる寄生容量に起因した画素電極電位のレベルシフトと
ダミー信号配線と画素電極との間で形成される寄生容量
に起因した画素電極電位のレベルシフトとをほとんど打
ち消し合うようにすることができ、画素電極電位のレベ
ルシフトを実効的に解消することができるからである。
In particular, in the case of a liquid crystal display device driven by the so-called V line inversion drive system, the potential level shift of the pixel electrode at the outermost end is suppressed to a small level like the potential level shifts of the other pixel electrodes. Therefore, the technique of the present invention is particularly effective. That is, by arranging the displacement direction of the signal voltage applied to the signal wiring of the outermost column and the displacement direction of the signal voltage applied to the dummy signal wiring in the opposite direction, the signal wiring of the outermost column and the pixel electrode are formed. It is possible to almost cancel the level shift of the pixel electrode potential caused by the parasitic capacitance and the level shift of the pixel electrode potential caused by the parasitic capacitance formed between the dummy signal wiring and the pixel electrode, This is because the level shift of the pixel electrode potential can be effectively eliminated.

【0017】このようにして、画面の表示領域端部に発
生する垂直方向のライン状の表示欠陥を、極めて簡易な
構造によって解消することができる。
In this way, it is possible to eliminate the vertical line-shaped display defects that occur at the edges of the display area of the screen with an extremely simple structure.

【0018】[0018]

【実施例】以下、本発明に係る液晶表示装置の一実施例
を図面に基づいて詳細に説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the liquid crystal display device according to the present invention will be described below in detail with reference to the drawings.

【0019】図1は本発明に係るアクティブマトリック
ス型液晶表示装置の等価回路を示す図である。TFT素
子基板101上には、交差するようにそれぞれ配列され
たn本の走査配線(Y1 、Y2 、…Yn )103および
m本の信号配線(X1 、X2、…Xm )105と、この
走査配線103および信号配線105の交差部ごとに形
成され、走査配線103にゲートが接続され信号配線1
05にドレインが接続されたTFT素子107と、前記
のn本の走査配線103とm本の信号配線105とが形
成するn行×m列の格子ごとに収まるように外形がほぼ
矩形状に形成され、TFT素子107のソースに電気的
に接続された画素電極109とが配設されている。そし
て前記の画素電極109に間隙を有して対向電極111
が対向配置され、画素電極109と対向電極111との
間に液晶組成物113が封入・挟持されて、この液晶表
示装置の液晶セル(液晶表示パネル)の主要部が形成さ
れている。そして偏光板(図示省略)がその上下に貼設
されている。
FIG. 1 is a diagram showing an equivalent circuit of an active matrix type liquid crystal display device according to the present invention. On the TFT element substrate 101, n scanning wirings (Y 1 , Y 2 , ... Y n ) 103 and m signal wirings (X 1 , X 2 , ... X m ) arranged so as to intersect each other. 105 and the signal wiring 1 formed at each intersection of the scanning wiring 103 and the signal wiring 105, and the gate is connected to the scanning wiring 103.
The TFT element 107 having a drain connected to the reference numeral 05, and the outer shape formed into a substantially rectangular shape so as to fit in each grid of n rows × m columns formed by the n scanning wirings 103 and the m signal wirings 105. And a pixel electrode 109 electrically connected to the source of the TFT element 107. The counter electrode 111 is formed with a gap in the pixel electrode 109.
Are opposed to each other, and the liquid crystal composition 113 is enclosed and sandwiched between the pixel electrode 109 and the counter electrode 111 to form a main part of a liquid crystal cell (liquid crystal display panel) of this liquid crystal display device. A polarizing plate (not shown) is attached above and below the polarizing plate.

【0020】走査配線103は走査ドライバ回路(図示
省略)に接続され走査電圧(いわゆる走査パルス波形と
走査非選択時電圧とを含む電圧)が印加され、信号配線
105は信号ドライバ回路(図示省略)に接続され信号
電圧(画像データに対応した波形のデータ信号)が印加
され、これらの印加電圧により液晶セルが駆動されて画
像表示が行なわれる。
The scanning wiring 103 is connected to a scanning driver circuit (not shown) and a scanning voltage (a voltage including a so-called scanning pulse waveform and a scanning non-selection voltage) is applied, and the signal wiring 105 is a signal driver circuit (not shown). And a signal voltage (a data signal having a waveform corresponding to the image data) is applied thereto, and the applied voltage drives the liquid crystal cell to display an image.

【0021】本発明に係る液晶表示装置の主要部の特徴
的な部分であるダミー信号配線115が、m列めの信号
配線(Xm )117に接続されたm列めの画素電極11
9を隔てて(m列めの信号配線(Xm )117から見て
画素電極119のさらに外側に)、m列めの信号配線
(Xm )117とほぼ平行にm+1 列めの信号配線とし
て隣列して配置されている。このダミー信号配線115
はm列めの信号配線(Xm )117の前列であるm−1
列めの信号配線(Xm-1 )121に電気的に接続されて
いる。しかし画素電極119や画素電極109とは電気
的な接続を取られていない。また、このダミー信号配線
115のパターン厚および線幅および前列のm列めの信
号配線(Xm )117との間隔は、その前列の全ての信
号配線105等とほぼ同様の寸法・仕様に形成されてい
る。
The dummy signal wiring 115, which is a characteristic part of the main part of the liquid crystal display device according to the present invention, is connected to the signal wiring (X m ) 117 of the m-th column, and the pixel electrode 11 of the m-th column.
9 apart (outward of the pixel electrode 119 when viewed from the signal wiring (X m ) 117 in the m-th column), and as the signal wiring in the (m + 1) -th column substantially parallel to the signal wiring (X m ) 117 in the m-th column. They are arranged next to each other. This dummy signal wiring 115
Is m−1, which is the front row of the signal wiring (X m ) 117 in the m-th row
It is electrically connected to the signal wiring (X m-1 ) 121 in the second column. However, the pixel electrode 119 and the pixel electrode 109 are not electrically connected. The pattern thickness and line width of the dummy signal wiring 115 and the interval between the dummy signal wiring 115 and the signal wiring (X m ) 117 in the m-th column in the front row are formed to have substantially the same dimensions and specifications as all the signal wirings 105 in the front row. Has been done.

【0022】このとき、液晶セル画面の表示領域右端部
分は、図2(a)に示すような構造となる。すなわち、
最端部の画素電極であるm列めの画素電極119は、そ
の前列以前の全ての画素電極109が左右両脇に 2本の
信号配線105が形成されてそれら 2本の信号配線10
5で挟まれているのと同様に、ほぼ同様の外形寸法に形
成されたm列めの信号配線(Xm )117とダミー信号
配線115とで挟まれていることになる。(なお図2に
おいては図の理解を明瞭にするために各信号配線に斜線
を付して示している。また同図中においてTFT素子1
07および走査配線103の図示は省略した。)したが
ってこのような構造の本発明に係る液晶表示装置におい
ては、等価回路的には図3(a)に示すようにm+1 列
めの信号配線であるダミー信号配線115とm列めの画
素電極119との間での寄生容量(Cpd´)123が形
成される。この寄生容量(Cpd´)123は、m列めの
信号配線(Xm )117とm列めの画素電極119との
間やそれよりも前列の信号配線105と画素電極109
との間で形成される全ての寄生容量(Cpd)125とほ
ぼ同様のものとなっている。これにより、最端部の画素
電極であるm列めの画素電極119に生じる画素電極電
位のレベルシフトを、その他の(それ以前の列の)画素
電極109に生じる画素電極電位のレベルシフトとほぼ
同様の値にすることができる。
At this time, the right end portion of the display area of the liquid crystal cell screen has a structure as shown in FIG. That is,
In the pixel electrode 119 in the m-th column, which is the endmost pixel electrode, all the pixel electrodes 109 before the previous column are formed with two signal wirings 105 on the left and right sides thereof.
5 is sandwiched between the signal wiring (X m ) 117 of the m-th column and the dummy signal wiring 115 which are formed to have substantially the same outer dimensions. (Note that, in FIG. 2, each signal wiring is shown by hatching for the sake of clear understanding of the drawing. Further, in FIG.
The illustration of 07 and the scanning wiring 103 is omitted. Therefore, in the liquid crystal display device according to the present invention having such a structure, in terms of an equivalent circuit, as shown in FIG. 3A, the dummy signal wiring 115, which is the signal wiring of the m + 1th column, and the pixel electrode of the mth column. A parasitic capacitance (Cpd ′) 123 is formed between the parasitic capacitance 119 and 119. The parasitic capacitance (Cpd ′) 123 is provided between the signal wiring (X m ) 117 in the m-th column and the pixel electrode 119 in the m-th column, and in the signal line 105 and the pixel electrode 109 in the preceding column.
It is almost the same as all the parasitic capacitances (Cpd) 125 formed between and. As a result, the level shift of the pixel electrode potential generated in the pixel electrode 119 of the m-th column, which is the pixel electrode at the outermost end, is almost the same as the level shift of the pixel electrode potential generated in the other pixel electrodes 109 (of the previous columns). It can have similar values.

【0023】しかもこのとき、ダミー信号配線115は
その 2列前のm−1 列めの信号配線(Xm-1 )121に
電気的に接続されて、信号配線(Xm-1 )121と同様
の電圧波形が印加される。これにより、特にVライン反
転駆動される場合にm列めの画素電極119の電位のレ
ベルシフトは寄生容量(Cpd´)123によるレベルシ
フトと寄生容量(Cpd)125によるレベルシフトとが
相殺し合って、実効的にほとんど無視できる程度にまで
低減する。つまりVライン反転駆動方式の場合には、m
列めの信号配線(Xm )117に印加される信号電圧波
形401の変位方向とm−1 列めの信号配線(Xm-1
121に印加される信号電圧波形の変位方向とが反転基
準電位(Vcom )を中心として逆方向であるため、この
ようなVライン反転時に起因して寄生容量(Cpd)12
5により発生する画素電極119のレベルシフトと寄生
容量(Cpd´)123により発生する画素電極119の
レベルシフトとの変位方向が逆のものとなる。その結
果、前列の全ての画素電極109の場合とほぼ同様に、
画素電極119の電位のレベルシフトを図4(a)に示
すように実効的にほとんど解消することができるのであ
る。
Moreover, at this time, the dummy signal wiring 115 is electrically connected to the signal wiring (X m-1 ) 121 in the m- 1th column which is two columns before the dummy signal wiring 115, and is connected to the signal wiring (X m-1 ) 121. Similar voltage waveforms are applied. As a result, the level shift of the potential of the pixel electrode 119 in the m-th column is canceled by the level shift of the parasitic capacitance (Cpd ′) 123 and the level shift of the parasitic capacitance (Cpd) 125, especially when the V line inversion drive is performed. Effectively reduce it to an almost negligible level. That is, in the case of the V line inversion drive system, m
Displacement direction of the signal voltage waveform 401 applied to the signal wiring (X m ) 117 in the column and the signal wiring (X m-1 ) in the column m−1
Since the displacement direction of the signal voltage waveform applied to 121 is opposite to that of the inversion reference potential (Vcom), the parasitic capacitance (Cpd) 12 is caused due to such V line inversion.
The displacement direction of the level shift of the pixel electrode 119 caused by No. 5 and the level shift of the pixel electrode 119 caused by the parasitic capacitance (Cpd ′) 123 are opposite to each other. As a result, as in the case of all the pixel electrodes 109 in the front row,
The level shift of the potential of the pixel electrode 119 can be effectively eliminated as shown in FIG.

【0024】一方、図2(b)に比較例として示すよう
に、従来の液晶表示装置ではm列めの信号配線117ま
でしか信号配線は形成されていないので、最端部のm列
めの画素電極119の右脇には信号配線が存在しない。
このため、従来の液晶表示装置では、等価回路的には図
3(b)に示すようにm列めの信号配線117と画素電
極119との間で寄生容量(Cpd)125 1個だけが形
成されているため、その他の前列の全ての画素電極10
9とは異なった電位のレベルシフト(Vpd)が図4
(b)に示すように画素電極119に生じ、その結果、
この最端部のm列めの画素電極119に特に顕著に表示
欠陥が発生していたことを本発明者は確認した。
On the other hand, as shown in FIG. 2B as a comparative example, in the conventional liquid crystal display device, the signal wiring is formed only up to the signal wiring 117 of the m-th column, so that the m-th row of the endmost portion is formed. No signal wiring exists on the right side of the pixel electrode 119.
Therefore, in the conventional liquid crystal display device, in terms of an equivalent circuit, only one parasitic capacitance (Cpd) 125 1 is formed between the signal line 117 in the m-th column and the pixel electrode 119 as shown in FIG. 3B. Therefore, all the pixel electrodes 10 in the other front columns are
The potential level shift (Vpd) different from that of Fig. 9 is shown in FIG.
As shown in (b), it occurs in the pixel electrode 119, and as a result,
The present inventor has confirmed that a display defect is particularly remarkably generated in the pixel electrode 119 in the m-th column at the end.

【0025】実際に、上記のような構造の本発明に係る
液晶表示装置を高温多湿条件下で駆動させて、その表示
品位および耐久性を検証したところ、画面の表示領域端
部を含めて画面上でのライン状の表示欠陥は発生するこ
となく、表示品位の良好な画像表示を長期間にわたって
維持することができた。その一方、比較例として図2
(b)に示したような構造の従来の液晶表示装置にも同
様の実験を行なったところ、画面の表示領域端部にライ
ン状の表示欠陥が発生して表示品位が低いものとなっ
た。そしてこの表示欠陥は時間が経過するにつれてさら
に顕著になった。
Actually, the liquid crystal display device according to the present invention having the above-mentioned structure was driven under high temperature and high humidity conditions, and its display quality and durability were verified. The above line-shaped display defects did not occur, and the image display with good display quality could be maintained for a long period of time. On the other hand, as a comparative example, FIG.
A similar experiment was conducted on the conventional liquid crystal display device having the structure as shown in (b). As a result, a line-shaped display defect occurred at the end of the display area of the screen, resulting in poor display quality. And this display defect became more remarkable as time passed.

【0026】なお、上記実施例においては、説明の簡潔
化のために補助容量(Cs )等を省略した場合について
述べたが、本発明はこれのみには限定しない。補助容量
(Cs )を用いる構造の液晶表示装置にも本発明が適用
可能である。また偏光板等の部位の詳述も説明の簡潔化
のために省略した。
In the above embodiment, the case where the auxiliary capacitance (Cs) or the like is omitted for simplification of description has been described, but the present invention is not limited to this. The present invention can be applied to a liquid crystal display device having a structure using a storage capacitor (Cs). Further, detailed description of parts such as a polarizing plate is omitted for simplification of description.

【0027】また、上記実施例ではネマティック(T
N)型液晶を用いたアクティブマトリックス型液晶表示
装置の場合について述べたが、本発明の適用はこれのみ
には限定しない。
In the above embodiment, the nematic (T
Although the case of the active matrix type liquid crystal display device using the N) type liquid crystal has been described, the application of the present invention is not limited to this.

【0028】このネマティック型液晶の他にも、例えば
スーパーツイステッドネマティック(STN)型液晶
や、その他の種類の液晶を用いた液晶表示装置にも適用
可能である。
In addition to this nematic liquid crystal, for example, it can be applied to a super twisted nematic (STN) liquid crystal and a liquid crystal display device using other kinds of liquid crystals.

【0029】その他、本発明の要旨を逸脱しない範囲
で、本発明の液晶表示装置の各部位の形成材料などの変
更が種々可能であることは言うまでもない。
In addition, it goes without saying that various changes can be made to the material for forming each part of the liquid crystal display device of the present invention without departing from the scope of the present invention.

【0030】[0030]

【発明の効果】以上、詳細な説明で明示したように、本
発明によれば、画面の表示領域端部に発生する垂直方向
のライン状の表示欠陥を解消して、表示品位が高くかつ
信頼性の高い液晶表示装置を提供することができる。
As is clear from the detailed description above, according to the present invention, the vertical line-shaped display defects that occur at the edges of the display area of the screen are eliminated, resulting in high display quality and reliability. A highly reliable liquid crystal display device can be provided.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る液晶表示装置の主要部の等価回路
図。
FIG. 1 is an equivalent circuit diagram of a main part of a liquid crystal display device according to the present invention.

【図2】本発明に係る液晶表示装置の最端部の構造を示
す図。
FIG. 2 is a diagram showing a structure of an outermost end of a liquid crystal display device according to the present invention.

【図3】本発明に係る液晶表示装置の最端部の等価回路
図。
FIG. 3 is an equivalent circuit diagram of the outermost portion of the liquid crystal display device according to the present invention.

【図4】本発明に係る液晶表示装置の画素電極電位を示
す波形図。
FIG. 4 is a waveform diagram showing a pixel electrode potential of the liquid crystal display device according to the present invention.

【図5】従来の液晶表示装置の主要部の等価回路図。FIG. 5 is an equivalent circuit diagram of a main part of a conventional liquid crystal display device.

【符号の説明】[Explanation of symbols]

101…TFT素子基板、103…走査配線、105…
信号配線、107…TFT素子、109…画素電極、1
11…対向電極、113…液晶組成物、115…ダミー
信号配線、117…m列めの信号配線(Xm )、119
…m列めの画素電極、121…m−1 列めの信号配線
(Xm-1 )、123…寄生容量(Cpd´)、125…寄
生容量(Cpd)
101 ... TFT element substrate, 103 ... Scanning wiring, 105 ...
Signal wiring, 107 ... TFT element, 109 ... Pixel electrode, 1
11 ... Counter electrode, 113 ... Liquid crystal composition, 115 ... Dummy signal wiring, 117 ... Signal wiring (X m ) in the m-th column, 119
... m-th pixel electrode, 121 ... m-1-th signal wiring (X m-1 ), 123 ... Parasitic capacitance (Cpd '), 125 ... Parasitic capacitance (Cpd)

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 基板上に互いに交差するように配列され
た複数の走査配線と複数の信号配線と該走査配線および
該信号配線の交差部ごとに形成され該走査配線および該
信号配線に接続されたスイッチング素子と該スイッチン
グ素子ごとに接続された画素電極とが形成されたスイッ
チング素子アレイ基板と、前記スイッチング素子アレイ
基板に間隙を有して対向配置される対向電極が形成され
た対向基板と、前記スイッチング素子アレイ基板と前記
対向基板との間に封入された液晶組成物とを有する液晶
表示装置において、 前記複数の信号配線のうち端列に位置する信号配線に対
して略平行に画素電極を隔てて隣列して配置されるとと
もに、前記端列に位置する信号配線の前列の信号配線に
電気的に接続されたダミー信号配線を具備することを特
徴とする液晶表示装置。
1. A plurality of scanning wirings and a plurality of signal wirings arranged so as to intersect each other on a substrate, formed at each intersection of the scanning wirings and the signal wirings, and connected to the scanning wirings and the signal wirings. A switching element array substrate on which the switching elements and pixel electrodes connected to each of the switching elements are formed; and an opposite substrate on which opposite electrodes are formed opposite to each other with a gap in the switching element array substrate, In a liquid crystal display device having a liquid crystal composition sealed between the switching element array substrate and the counter substrate, a pixel electrode is arranged substantially parallel to a signal line located in an end row among the plurality of signal lines. A dummy signal wiring that is arranged adjacent to each other and is electrically connected to the signal wiring in the front row of the signal wiring located in the end row. A liquid crystal display device according to symptoms.
【請求項2】 請求項1記載の液晶表示装置において、 走査電圧波形を発生し前記複数の走査配線に印加する走
査ドライバ回路と、 前記複数の信号配線のうち偶数列の信号配線に印加する
信号電圧の変位方向と奇数列の信号配線に印加する信号
電圧の変位方向とが逆方向である信号電圧波形を発生し
て前記複数の信号配線に印加する信号ドライバ回路とを
具備することを特徴とする液晶表示装置。
2. The liquid crystal display device according to claim 1, wherein a scan driver circuit that generates a scan voltage waveform and applies the scan voltage waveform to the plurality of scan wirings, and a signal that is applied to an even-numbered column signal wiring of the plurality of signal wirings. A signal driver circuit for generating a signal voltage waveform in which the voltage displacement direction and the displacement direction of the signal voltage applied to the odd-numbered signal lines are opposite to each other and applying the generated signal voltage waveform to the plurality of signal lines. Liquid crystal display device.
JP23147593A 1993-09-17 1993-09-17 Array substrate for display device and liquid crystal display device Expired - Fee Related JP3322948B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23147593A JP3322948B2 (en) 1993-09-17 1993-09-17 Array substrate for display device and liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23147593A JP3322948B2 (en) 1993-09-17 1993-09-17 Array substrate for display device and liquid crystal display device

Publications (2)

Publication Number Publication Date
JPH0784239A true JPH0784239A (en) 1995-03-31
JP3322948B2 JP3322948B2 (en) 2002-09-09

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Country Link
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Publication number Priority date Publication date Assignee Title
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EP0926537A2 (en) * 1997-12-26 1999-06-30 Sharp Kabushiki Kaisha Liquid crystal display device
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US6333771B1 (en) 1997-12-26 2001-12-25 Sharp Kabushiki Kaisha Liquid crystal display device capable of reducing the influence of parasitic capacities
US6608655B2 (en) 1997-12-26 2003-08-19 Sharp Kabushiki Kaisha Liquid crystal display device including identical shape dummy wire surrounding each pixel and capable of reducing the influence of parasitic capacities
KR100427994B1 (en) * 2000-03-31 2004-04-27 샤프 가부시키가이샤 Line electrode driving apparatus and image display apparatus having same
JP2001337654A (en) * 2000-05-25 2001-12-07 Toshiba Corp Flat display device
KR100470881B1 (en) * 2001-01-17 2005-03-08 가시오게산키 가부시키가이샤 Electric circuit
US7612750B2 (en) 2001-11-28 2009-11-03 Sharp Kabushiki Kaisha Liquid crystal display device
US8421724B2 (en) 2001-11-28 2013-04-16 Sharp Kabushiki Kaisha Liquid crystal display device
TWI397046B (en) * 2008-04-18 2013-05-21 Innolux Corp Active matrix display device

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