KR20030075522A - Liquid Crystal Display Device having aligning mark - Google Patents

Abstract

PURPOSE: A liquid crystal display device having align marks is provided to form a plurality of align marks with different patterns to prevent the alignment miss in a sealant doping unit, thereby reducing the sealant doping reject. CONSTITUTION: In a liquid crystal display device, a substrate(100) is formed with align marks(900,900a) of different patterns at both diagonal sides of dummy area for preventing the misalignment. The align marks are formed on a layer formed with gate electrodes.

Description

Liquid crystal display device having an alignment mark {Liquid Crystal Display Device having aligning mark}

The present invention relates to a liquid crystal display (LCD), and more particularly, to an alignment mark formed on a substrate in order to align the substrate in a seal material applying process.

Ultra-thin flat panel display devices with a display screen thickness of only a few centimeters (cm). Among them, liquid crystal display devices have low operating voltages, which consume less power and can be used as portable devices. Applications range from ships to spacecraft to aircraft.

As shown in FIG. 1A, the liquid crystal display includes a lower substrate 1 on which a thin film transistor and a pixel electrode are formed, an upper substrate 3 on which a light blocking film, a color filter layer, and a common electrode are formed, and the lower substrate ( It comprises a liquid crystal layer 5 formed between 1) and the upper substrate (3).

In addition, a seal material 7 is formed between the substrates 1 and 3 to prevent the liquid crystal layer 5 from leaking outward and to bond the substrates 1 and 3 to each other.

The seal material 7 is applied onto the lower substrate 1 or the upper substrate 3 in the manufacture of the liquid crystal display device.

FIG. 1B is a perspective view illustrating a state in which the seal material 7 is applied on the lower substrate 1. The plurality of gate wirings 2 and the data wirings on the lower substrate 1 cross each other in length and width to define pixel regions. (4) is formed, the thin film transistor 6 is formed at the intersection of the gate wiring and the data wiring, and the pixel electrode 8 is formed in the pixel region.

The seal member 7 is applied to the outer portion of the pixel region. At this time, due to the gate pad 2a and the data pad 4a formed at the end portions of the gate wiring and the data wiring, the seal member 7 is not symmetrically coated around the center of the substrate, and the pads 2a and 4a do not apply. ) Is moved to the unformed side and applied.

In mass production, in order to apply the seal material at the correct position on the substrate, the seal material is applied in a preset pattern after performing an alignment process of the substrate during the seal material applying process.

FIG. 2A is a view for explaining a process of applying a sealing material after aligning the substrate as described above. The above-described gate wiring, data wiring, thin film transistor, and pixel electrode are provided on the lower substrate 1 loaded on the sealing material applying equipment. The back layer is formed, and the alignment mark 9 is formed in both edge diagonal parts.

However, only the outermost gate wiring 2 and the gate pad 2a, the data wiring 4 and the data pad 4a are shown in the drawing.

When the lower substrate 1 having the alignment mark 9 formed thereon is loaded on the seal material applying equipment, the lower substrate 1 is aligned to the seal material applying equipment by using the alignment mark 9. After that, the sealing material coating process is performed in a preset pattern.

In the related art, however, the alignment marks 9 formed on both sides of the corner diagonal portions on the lower substrate 1 are formed in the same pattern.

Therefore, according to the manufacturing line of the liquid crystal display device, the substrate is rotated many times, and even though the substrate is rotated by 180 ° to enter the seal material applying equipment, the alignment marks on both sides are formed in the same pattern, and such an error is caused. Could not be recognized.

As shown in FIG. 2B, even though the lower substrate 1 is actually rotated 180 °, it is recognized as being correctly aligned, and thus the seal material 7 is applied as previously set, thereby causing a defect. .

Although only the case of applying the seal material on the lower substrate described above, the same problem occurs when applying the seal material on the upper substrate.

That is, even when the seal material is applied on the upper substrate, the seal material is not symmetrically applied about the center portion of the upper substrate, and as described above, the seal material is moved by an area corresponding to the pad region of the lower substrate to apply the seal material. do.

Therefore, the above-described problem occurs when the alignment mark is formed in the same pattern on both edges of the upper substrate.

The present invention has been made to solve the above problems, an object of the present invention is to ensure that the seal material is correctly applied on the substrate so that the substrate is exactly aligned with the seal material coating equipment.

1A is a schematic cross-sectional view of a general liquid crystal display device.

1B is a perspective view illustrating a lower substrate to which a conventional seal material is applied.

FIG. 2A and FIG. 2B are diagrams for describing a sealing material coating defect generated when applying a sealing material to a liquid crystal display device substrate having a conventional alignment mark, and FIG. 2A illustrates a case where the coating material is normally applied. 2b shows a case where the coating is performed in a bad manner.

3A is a perspective view of a substrate for a liquid crystal display device with an alignment mark according to an embodiment of the present invention.

3B is a perspective view of a substrate for a liquid crystal display device having an alignment mark according to another exemplary embodiment of the present invention.

4 illustrates alignment marks of various patterns according to the present invention.

5A is a perspective view illustrating a lower substrate for a liquid crystal display device having an alignment mark according to the present invention.

FIG. 5B is a cross-sectional view taken along the line AA ′ of FIG. 5A.

6A is a perspective view illustrating an upper substrate for an LCD having an alignment mark according to the present invention.

FIG. 6B is a cross-sectional view taken along the line BB ′ of FIG. 6A.

<Explanation of symbols for main parts of the drawings>

2, 300: Gate wiring 4, 400: Data wiring

6, 600 thin film transistor 7: seal material

8, 800 pixel electrodes 9, 900, 900a: alignment mark

In order to achieve the above object, the present invention is a substrate; And an alignment mark formed in plural in different patterns in the dummy region on the substrate.

That is, the present invention forms a plurality of alignment marks having different patterns on the substrate so that alignment misses do not occur in the seal material coating equipment.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3A is a perspective view of a substrate for a liquid crystal display device according to an embodiment of the present invention.

As can be seen in FIG. 3A, alignment marks 900 and 900a having different patterns are formed on both diagonal portions of the dummy region on the substrate 100. In this case, the dummy region refers to a region removed in the cell cutting process of the liquid crystal display device.

In FIG. 3A, alignment marks 900 and 900a are formed at the upper left and lower right sides of the substrate 100, but alignment marks may be formed at the lower left and upper right sides of the substrate 100.

In addition, the alignment mark 900 is sufficient if different patterns are formed on both sides of the diagonal portion on the substrate 100 to prevent misalignment. Therefore, as shown in FIG. 4, various patterns such as + type, × type, ?? type, ?? type, ?? type, ?? type, and the like may be formed in various combinations.

3B is a perspective view of a substrate for a liquid crystal display device according to another exemplary embodiment of the present invention.

As shown in FIG. 3B, the alignment marks 900 and 900a are formed at four corners of the dummy region on the substrate 100.

In this case, the alignment marks 900 of the same pattern are formed at both upper corners of the substrate 100, and the alignment marks 900a of the pattern different from the upper pattern are formed at both lower corners of the substrate 100. It is also possible to form alignment marks of the same pattern on both left corners on 100) and to form alignment marks different from the left pattern on both right corners.

In addition, it is also possible to form alignment marks of different patterns on the four corners of the substrate 100.

The patterns of the alignment marks 900 and 900a may be variously changed as shown in FIG. 4.

The alignment mark formed on the substrate described above is a mark for accurately aligning the substrate in the seal material coating equipment. Meanwhile, the seal material may be formed on the lower substrate of the liquid crystal display device or may be formed on the upper substrate according to the product model. Therefore, the substrate on which the aforementioned alignment mark is formed may be a lower substrate or an upper substrate for the liquid crystal display device.

Hereinafter, the case in which the alignment mark is formed on the lower substrate for the liquid crystal display device and the case on the upper substrate will be described.

5A is a perspective view illustrating a case in which an alignment mark is formed on a lower substrate for a liquid crystal display device.

As shown in FIG. 5A, a plurality of gate wirings 300 and data wirings 400 are formed on the lower substrate 200 to cross each other in a vertical direction to define a pixel area. A thin film transistor 600 including a gate electrode, a gate insulating film, a semiconductor layer, and a source / drain electrode is formed at the intersection of the gate wiring 300 and the data wiring 400, and the pixel electrode ( 800 is formed.

An ohmic contact layer may be further formed on the semiconductor layer, and in the case of IPS mode, a common electrode may be formed on the lower substrate 200.

In addition, alignment marks 900 and 900a having different patterns are formed on both sides of the diagonal portion of the lower substrate 200. The alignment mark may be changed and formed in various forms as described above.

The alignment marks 900 and 900a may be formed by patterning the gate lines 300 and the gate electrode when the alignment marks 900 and 900a are formed.

Therefore, as shown in FIG. 5B (FIG. 5B is a cross-sectional view along the line A-A 'of FIG. 5A), the alignment marks 900 and 900a are formed on the same layer as the gate electrode 610. FIG.

Reference numeral 620 not described in FIG. 5B is a gate insulating film, 630 is a semiconductor layer, 640 is a source electrode, 650 is a drain electrode, and 660 is a protective film.

6A is a perspective view illustrating a case in which an alignment mark is formed on an upper substrate for a liquid crystal display device.

As shown in FIG. 6A, a light shielding layer 500 (hatched region in the drawing) is formed on the upper substrate 300 to block light leakage into the gate wiring, data wiring, and thin film transistor forming regions. The color filter layer 700 is formed on the layer 500. Although not shown, an overcoat layer and / or a common electrode may be formed on the color filter layer 700.

In addition, alignment marks 900 and 900a of different patterns are formed on both sides of the diagonal portion of the upper substrate 300. The alignment mark may be changed and formed in various forms as described above.

Such alignment marks 900 and 900a may be formed by patterning the light blocking layer 500.

Therefore, as shown in FIG. 6B (FIG. 6B is a cross-sectional view of the B-B line of FIG. 6A), the alignment marks 900 and 900a are formed on the same layer as the light blocking layer 500.

Since the alignment mark according to the present invention described above is formed on the liquid crystal display element substrate in order to accurately apply the seal material, the seal material is applied onto the liquid crystal display element substrate according to the present invention in which the alignment mark is formed. In addition, the substrate to which the seal material is applied and the substrate facing the seal material form a single liquid crystal display device with a liquid crystal interposed therebetween.

As mentioned above, although preferred embodiment of this invention was described, this invention is not limited to the said embodiment, It can be changed and implemented within the range which is obvious to a person skilled in the art to which this invention belongs. .

In the liquid crystal display device according to the present invention having the above configuration, by forming a plurality of alignment marks having different patterns on the substrate, alignment miss is not generated in the seal material coating equipment, thereby reducing the seal material coating failure rate.

Claims (7)

Board; And And a plurality of alignment marks formed in a plurality of patterns in a dummy area on the substrate. The method of claim 1, The alignment mark is formed on both sides of the diagonal portion on the substrate. The method of claim 1, And the alignment mark is formed at four corners of the substrate. The method of claim 1, And a thin film transistor comprising a gate electrode, a gate insulating film, a semiconductor layer, an ohmic contact layer, a source / drain electrode, and a pixel electrode on the substrate. The method of claim 4, wherein And the alignment mark is formed on the same layer as the gate electrode. The method of claim 1, A light shielding layer and a color filter layer are formed on the substrate. The method of claim 6, The alignment mark is formed on the same layer as the light blocking layer.