KR200141124Y1 - Qfp test socket - Google Patents

Qfp test socket Download PDF

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Publication number
KR200141124Y1
KR200141124Y1 KR2019950038949U KR19950038949U KR200141124Y1 KR 200141124 Y1 KR200141124 Y1 KR 200141124Y1 KR 2019950038949 U KR2019950038949 U KR 2019950038949U KR 19950038949 U KR19950038949 U KR 19950038949U KR 200141124 Y1 KR200141124 Y1 KR 200141124Y1
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KR
South Korea
Prior art keywords
socket
lead
socket pin
semiconductor
qfp
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KR2019950038949U
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Korean (ko)
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KR970046790U (en
Inventor
서정윤
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문정환
엘지반도체주식회사
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Priority to KR2019950038949U priority Critical patent/KR200141124Y1/en
Publication of KR970046790U publication Critical patent/KR970046790U/en
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Publication of KR200141124Y1 publication Critical patent/KR200141124Y1/en

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/04—Housings; Supporting members; Arrangements of terminals
    • G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0433—Sockets for IC's or transistors
    • G01R1/0441—Details
    • G01R1/0466—Details concerning contact pieces or mechanical details, e.g. hinges or cams; Shielding
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/04—Housings; Supporting members; Arrangements of terminals
    • G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0416—Connectors, terminals
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2863—Contacting devices, e.g. sockets, burn-in boards or mounting fixtures
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G01R31/2889—Interfaces, e.g. between probe and tester

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Environmental & Geological Engineering (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Connecting Device With Holders (AREA)

Abstract

본 고안은 표면실장용 반도체의 일종인 큐에프피(QFP)를 테스트하기 위해 큐에프피(QFP)의 리드와 테스트의 단자를 상호 연결시켜 주는 역할을 하는 소켓에 관한 것으로써, 좀더 구체적으로는 리드와 소켓핀의 접촉을 확실히하면서 소켓핀을 거의 반영구적으로 사용할 수 있도록 한 것이다.The present invention relates to a socket that interconnects the QFP lead and the test terminal to test QFP, a kind of surface mount semiconductor. More specifically, The socket pin can be used almost semi-permanently while ensuring the contact between the lead and the socket pin.

이를 위해, 하우징(1)에 복수개의 소켓핀(2)을 끼워 고정하고 덮개(5)에는 반도체(3)의 리드(3a)를 눌러주는 누름편(4)을 형성하도록 된 것에 있어서, 소켓핀의 접속면(2c)을 평탄면으로 하고 상기 소켓핀(2)의 상측으로는 각 리드(3a)와 접속면이 맞닿게 하는 독립된 복수개의 도전물질(9)을 갖는 필름(8)을 위치하여서 된 것이다.To this end, the socket pin 2 is formed in the housing 1 by fixing the plurality of socket pins 2 and the cover 5 to form a pressing piece 4 for pressing the leads 3a of the semiconductor 3. Film (8) having a plurality of independent conductive materials (9) having a connecting surface (2c) of the flat surface and the upper side of the socket pin (2) to contact each lead (3a) and the connecting surface It is.

Description

큐에프피(QFP)용 테스트 소켓Test Sockets for QFP

제1도는 종래의 소켓을 나타낸 종단면도.1 is a longitudinal sectional view showing a conventional socket.

제2도는 본 고안의 소켓을 나타낸 종단면도.Figure 2 is a longitudinal sectional view showing a socket of the present invention.

제3도는 본 고안의 요부를 나타낸 필름의 평면도.3 is a plan view of a film showing the main part of the present invention.

제4도는 제3도의 A-A선 단면도.4 is a cross-sectional view taken along the line A-A of FIG.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 하우징 2 : 소켓핀1 housing 2 socket pin

2c : 접속면 3a : 리드2c: connection surface 3a: lead

4 : 누름편 5 : 덮개4: pressing piece 5: cover

7 : 누름돌기 8 : 필름7: push protrusion 8: film

9 : 도전물질 9a : 돌기9: conductive material 9a: protrusion

본 고안은 표면실장용 반도체의 일종인 큐에프피(QFP)를 테스트하기 위해 큐에프피(QFP)의 리드와 테스트의 단자를 상호 연결시켜 주는 역할을 하는 소켓에 관한 것으로써, 좀더 구체적으로는 리드와 소켓핀의 접촉을 확실히하면서 소켓핀을 거의 반영구적으로 사용할 수 있도록 한 것이다.The present invention relates to a socket that interconnects the QFP lead and the test terminal to test QFP, a kind of surface mount semiconductor. More specifically, The socket pin can be used almost semi-permanently while ensuring the contact between the lead and the socket pin.

첨부도면 제1도는 종래의 소켓을 나타낸 종단면도로써, 본체를 이루는 하우징(1)의 내부에 복수개의 소켓핀(2)이 삽입 고정되어 있고 상기 하우징에는 반도체(3)의 리드(3a)를 소케신(2)측으로 동시에 눌러주기 위한 누름편(4)이 형성된 덮개(5)가 축(6)을 중심으로 회동가능하게 결합되어 있으며 상기 덮개에는 반도체의 테스트시 하우징(1)에 덮개(5)를 록킹시키기 위한 걸림고리(7)가 설치되어 있다. 상기 소켓핀(2)은 테스터(도시는 생략함)의 단자에 끼워져 접속되는 단자(2a)와, 반도체(3)의 리드(3a)가 접속되는 접속면(2b)으로 구성되어 있다.1 is a longitudinal sectional view showing a conventional socket, in which a plurality of socket pins 2 are inserted and fixed inside a housing 1 constituting a main body, and the leads 3a of the semiconductor 3 are held in the housing. A cover 5 having a pressing piece 4 for simultaneously pressing towards the casein 2 is rotatably coupled around the shaft 6, and the cover 5 is attached to the housing 1 when the semiconductor is tested. A locking ring 7 for locking the door is installed. The socket pin 2 is composed of a terminal 2a which is inserted into and connected to a terminal of a tester (not shown) and a connection surface 2b to which a lead 3a of the semiconductor 3 is connected.

따라서 상기 하우징(1)의 하부로 노출된 소켓핀(2)의 단자(2a)를 테스터의 단자에 삽입한 상태에서 제조 완료된 반도체의 성능을 판단하기 위해 상기 반도체(3)의 각 리드(3a)가 소켓핀(2)의 접속면(2b)에 맞닿게 올려 놓고 덮개(5)를 닿으면 걸림고리(7)에 의해 덮개(5)가 하우징(1)에 고정되므로 하우징내에 장착된 반도체(3)가 유동되지 않게 된다.Therefore, each lead 3a of the semiconductor 3 is used to determine the performance of the manufactured semiconductor in a state where the terminal 2a of the socket pin 2 exposed to the lower part of the housing 1 is inserted into the terminal of the tester. Is placed in contact with the connection surface 2b of the socket pin 2 and touches the cover 5, the cover 5 is fixed to the housing 1 by the catching ring 7 so that the semiconductor 3 mounted in the housing 3 ) Will not flow.

이와 같이 덮개(5)를 닫아주면 상기 덮개의 내측면에 형성된 누름편(4)이 각 리드(3a)를 눌러 주게 되므로 리드가 접속면(2b)에 긴밀히 접속되고, 이에 따라 테스터에 의해 반도체의 테스트가 이루어지게 된다.When the lid 5 is closed in this way, the pressing pieces 4 formed on the inner side of the lid press each lead 3a, so that the leads are closely connected to the connection surface 2b, whereby the tester The test is done.

그러나 이러한 종래의 소켓은 테스트시 반도체(3)의 리드(3a)가 소켓핀(2)의 접속면(2b)에 반복적으로 접속되어 소켓핀의 접속면이 마모되므로 고가인 소켓핀의 수명(2만∼10만회 정도)이 한정되고, 반도체의 반복적인 테스트로 인해 접속면에 먼지 등의 이물질이 쌓여 접속불량을 유발시키게 됨은 물론 소켓핀의 접속면에 리드의 전체가 접속되므로 테스트시 접촉저항이 커지게 되는 문제점이 있었다.However, such a conventional socket has a lifespan of an expensive socket pin because the lead 3a of the semiconductor 3 is repeatedly connected to the connection surface 2b of the socket pin 2 during the test, and the connection surface of the socket pin is worn out. 10,000 ~ 100,000 times), and due to the repeated test of the semiconductor, foreign matters such as dust accumulate on the connection surface and cause connection failure, as well as the whole lead is connected to the connection surface of the socket pin. There was a problem that became large.

본 고안은 종래의 이와 같은 문제점을 해결하기 위해 안출한 것으로써, 반도체의 테스트시 리드가 소켓핀과 직접적으로 접속되지 않은 상태에서 테스트가 실시되도록 하므로 소켓핀의 수명을 반영구적으로 유지시킬 수 있도록 하는데 그 목적이 있다.The present invention has been made to solve such a problem in the prior art, so that the test is conducted in a state in which the lead is not directly connected to the socket pin when testing the semiconductor, so that the life of the socket pin can be semi-permanently maintained. The purpose is.

상기 목적을 달성하기 위한 본 고안의 형태에 따르면, 하우징에 복수개의 소켓핀을 끼워 고정하고 덮개에는 반도체의 리드를 눌러주는 누름편을 형성하도록 된 것에 있어서, 소켓핀의 접속면을 평탄면으로 하고 상기 소켓핀의 상측으로는 각 리드와 접속면이 맞닿게 하는 독립된 복수개의 도전물질을 갖는 필름을 위치시킴을 특징으로 하는 큐에프피(QFP)용 테스트 소켓이 제공된다.According to an aspect of the present invention for achieving the above object, in that the pressing piece for fixing the plurality of socket pins in the housing and pressing the lead of the semiconductor in the cover, the connection surface of the socket pin is a flat surface On the upper side of the socket pin is provided a test socket for QFP, characterized in that the film having a plurality of independent conductive materials to be brought into contact with each lead.

이하, 본 고안을 일 실시예로 도시한 첨부된 도면 제2도 내지 제4도를 참고로 하여 더욱 상세히 설명하면 다음과 같다.Hereinafter, the present invention will be described in more detail with reference to FIGS. 2 to 4 of the accompanying drawings showing an embodiment as follows.

첨부도면 제2도는 본 고안의 소켓을 나타낸 종단면도이고 제3도는 본 고안의 요부를 나타낸 필름의 평면도이며 제4도는 제3도의 A-A선 단면도로써, 본 고안의 구성중 종래의 구성과 동일한 부분은 그 설명을 생략하고 동일부호를 부여하기로 한다.2 is a longitudinal sectional view showing a socket of the present invention, and FIG. 3 is a plan view of a film showing the main part of the present invention, and FIG. 4 is a sectional view taken along line AA of FIG. The description is omitted and the same reference numerals will be given.

본 고안은 하우징(1)에 고정되어 반도체(3)의 각 리드(3a)가 접속되는 소켓핀(2)의 접속면(2c)이 평탄면으로 되어 있고 상기 소켓핀(2)의 상측으로는 반도체(3)의 각 리드(3a)와 소켓핀(2)의 접속면(2c)이 맞닿게 하는 독립된 복수개의 도전물질(9)을 갖는 필름(8)이 고정되어 있다.According to the present invention, the connection surface 2c of the socket pin 2 to which each lead 3a of the semiconductor 3 is connected to the housing 1 is a flat surface. The film 8 which has the several independent electrically-conductive material 9 which the each lead 3a of the semiconductor 3 and the connection surface 2c of the socket pin 2 contact | abut is fixed.

상기 필름(8)을 하우징(1)에 고정하기 위해 하우징(1) 및 필름(8)의 모서리부분에 고정수단이 구비되는데, 상기 고정수단으로 하우징 및 필름중 일측에 돌기를 형성하고, 대응되는 부위에는 상기 돌기에 끼워져 고정되는 구멍을 형성하도록 되어 있다.Fixing means are provided at the corners of the housing 1 and the film 8 to fix the film 8 to the housing 1. The fixing means forms protrusions on one side of the housing and the film, and The site is formed to form a hole to be fitted into the projection.

그리고 도전물질(9)의 상,하면에 복수개의 돌기(9a)가 형성되어 있는데, 이는 도전물질이 소켓핀(2)의 접속면(2c)과 리드(3a)에 접속되는 면적을 최소화하므로써, 접속면이 먼지 등으로부터 오염되는 것을 방지함과 동시에 반도체의 테스트시 접촉저항을 최소화하기 위함이다.In addition, a plurality of protrusions 9a are formed on the upper and lower surfaces of the conductive material 9, by minimizing the area where the conductive material is connected to the connection surface 2c and the lead 3a of the socket pin 2, This is to prevent the contact surface from being contaminated from dust and at the same time to minimize the contact resistance when testing the semiconductor.

상기 도전물질의 상,하면에 형성되는 돌기(9a)의 끝단을 곡면으로 처리하면 소켓핀(2)의 접속면(2c)과 리드(3a)에 상기 돌기가 점접촉을 하게 되므로 접속되는 면적이 더욱 최소화된다.If the ends of the protrusions 9a formed on the upper and lower surfaces of the conductive material are treated with curved surfaces, the protrusions are brought into point contact with the connection surface 2c and the lead 3a of the socket pin 2, so that the area to be connected is increased. Is further minimized.

이와 같이 구성된 본 고안의 작용, 효과를 설명하면 다음과 같다.Referring to the operation, effects of the present invention configured as described above are as follows.

먼저, 하우징(1)의 하부로 노출된 소켓핀(2)의 단자(2a)를 테스터의 단자에 삽입한 상태에서 제조 완료된 반도체의 성능을 판단하기 위해 상기 반도체(3)의 각 리드(3a)를 필름(8)에 형성된 각 도전물질(9)의 상부에 올려 놓으면 상기 각 리드(3a)는 도전물질(9)의 돌기(9a)에 접속된다.First, each lead 3a of the semiconductor 3 is used to determine the performance of the manufactured semiconductor in a state where the terminal 2a of the socket pin 2 exposed to the lower part of the housing 1 is inserted into the terminal of the tester. Is placed on top of each conductive material 9 formed in the film 8, the respective leads 3a are connected to the projections 9a of the conductive material 9.

이러한 상태에서 덮개(5)를 닿으면 덮개에 설치된 걸림고리(7)가 하우징(1)에 걸려 고정되므로 하우징내에 장착된 반도체(3)가 유동되지 않게 된다.When the cover 5 is touched in this state, the locking ring 7 installed on the cover is fixed to the housing 1 so that the semiconductor 3 mounted in the housing does not flow.

이와 같이 덮개(5)를 닫아주면 상기 덮개의 내측면에 형성된 누름편(4)이 각 리드(3a)를 도전물질(9)의 돌기(9a)측으로 눌러 주게 되므로 테스터에 의한 반도체의 테스트가 가능해지게 되는데, 이때 상기 반도체(3)의 리드(3a)는 돌기(9a)의 끝단에 형성된 곡면과 점접촉을 하여 접촉저항을 최소화하게 되므로 더욱 확실한 접속 상태가 유지된다.When the cover 5 is closed in this way, the pressing piece 4 formed on the inner side of the cover presses each lead 3a toward the protrusion 9a side of the conductive material 9, so that the tester can test the semiconductor. In this case, the lead 3a of the semiconductor 3 is in point contact with the curved surface formed at the end of the protrusion 9a, thereby minimizing the contact resistance, thereby maintaining a more reliable connection state.

상기한 바와 같은 반복되는 테스트에 의해 도전물질(9)의 돌기(9a)가 닳거나, 파손될 경우에는 하우징(1)으로부터 필름(8)을 분리한 다음 새로운 필름을 장착하여 주기만 하면 소켓핀의 반영구적인 사용이 가능해지게 된다.If the projection 9a of the conductive material 9 is worn out or damaged by the repeated test as described above, the socket pin is semi-permanent by simply removing the film 8 from the housing 1 and then attaching a new film. Phosphorus use becomes possible.

이상에서와 같이 본 고안은 소켓핀의 상면에 도전물질을 갖는 필름을 착탈가능하게 설치하여 반도체의 반복적인 테스트시에도 소켓핀이 마모되거나, 오염되는 것을 방지하고 비교적 가격이 저렴한 필름의 수명이 되었을 경우에는 필름만 교체시켜 주면 되므로 고가의 소켓핀을 반영구적으로 사용하게 되는 효과를 얻게 된다.As described above, the present invention provides a detachable film having a conductive material on the upper surface of the socket pin to prevent the socket pin from being worn or contaminated even during repeated testing of the semiconductor. In this case, since only the film needs to be replaced, an expensive socket pin is semi-permanently used.

Claims (3)

하우징에 복수개의 소켓핀을 끼워 고정하고 덮개에는 반도체의 리드를 눌러주는 누름편을 형성하도록 된 것에 있어서, 소켓핀의 접속면을 평탄면으로 하고 상기 소켓핀의 상측으로는 각 리드와 접속면이 맞닿게 하는 독립된 복수개의 도전물질을 갖는 필름을 위치시킴을 특징으로 하는 큐에프피(QFP)용 테스트 소켓.A plurality of socket pins are fixed to the housing and a pressing piece for pressing the leads of the semiconductor is formed on the cover. The connecting surface of the socket pin is a flat surface, and each lead and the connecting surface is formed on the upper side of the socket pin. A test socket for a QFP characterized by positioning a film having a plurality of independent conductive materials for abutting. 제1항에 있어서, 도전물질의 상,하면에 복수개의 돌기를 형성함을 특징으로 하는 큐에프피(QFP)용 테스트 소켓.The test socket of claim 1, wherein a plurality of protrusions are formed on upper and lower surfaces of the conductive material. 제2항에 있어서, 도전물질의 상,하면으로 형성되는 돌기의 끝단을 곡면으로 함을 특징으로 하는 큐에프피(QFP)용 테스트 소켓.The test socket for QFP according to claim 2, wherein the ends of the protrusions formed by the upper and lower surfaces of the conductive material are curved.
KR2019950038949U 1995-12-07 1995-12-07 Qfp test socket KR200141124Y1 (en)

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KR200141124Y1 true KR200141124Y1 (en) 1999-04-15

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100952735B1 (en) 2007-12-17 2010-04-13 미래산업 주식회사 Test socket

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100952735B1 (en) 2007-12-17 2010-04-13 미래산업 주식회사 Test socket

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