KR20000067355A - Method for fabricating cell capacitor of semiconductor memory device - Google Patents

Abstract

PURPOSE: A capacitor is provided to increase its capacity by increase of a surface area of storage electrodes. CONSTITUTION: A capacitor is characterized that a first anti-reflection film is formed on a first insulating film on a semiconductor substrate, a storage electrode contact hole is formed by etching the first anti-reflection film and first insulating film in turn, a conductive film for a storage electrode is formed on the first anti-reflection film including the storage electrode contact hole, a second anti-reflection film is formed on the conductive film, a first under-cut area is formed on the lower portion of the conductive film by etching the second anti-reflection film and conductive film in turn using a mask for formation of the storage electrode, and the first and second anti-reflection films is removed to form a second under-cut area larger than the first under-cut area on the lower portion of the conductive film.

Description

Method for manufacturing cell capacitor of semiconductor memory device {METHOD FOR FABRICATING CELL CAPACITOR OF SEMICONDUCTOR MEMORY DEVICE}

The present invention relates to a capacitor manufacturing method of a semiconductor memory device, and more particularly to a capacitor manufacturing method for increasing the capacitor capacity of the storage electrode.

As semiconductor devices become highly integrated, problems such as limitations of proper patterning by small patterns, storage electrode patterns become smaller, misalignment with storage electrode contacts, and lifting of small patterns.

1A through 1D are flowcharts sequentially illustrating processes of a capacitor manufacturing method of a conventional semiconductor memory device.

Referring to FIG. 1A, oxide films 12 and 14 are formed on a substrate, and the oxide films 12 and 14 are sequentially etched using a contact hole forming mask to form contact holes 16.

Referring to FIG. 1B, a conductive layer 18 and an anti reflection layer 20 for a storage electrode are formed on the oxide layer 14 including the contact hole 16. The anti-reflection film is used in the subsequent conductive film etching process to solve the difficulty of photo pattern work due to the reflective index (RI) of the conductive film, that is, to lower the RI.

Referring to FIG. 1C, the anti-reflection film 20 and the conductive film 18 are etched using a storage electrode forming mask. When the conductive film 18 is etched, it is etched up to the surface of the oxide film 14.

As a result of etching the anti-reflection film 20 and the conductive film 18, an undercut region U is formed under the conductive film 18. The undercut region U increases the surface area of the storage electrode to increase the capacitor capacity. However, when the undercut region U is formed, there is no film quality that functions as a passivation under the conductive film, causing the conductive pattern 18 to collapse.

Next, the anti-reflection film 20, which is the upper film of the storage electrode pattern 18, is removed through the phosphate strip. As a result, storage electrodes are formed. The storage electrode is formed to a thickness of 10000 Å to have a sufficient capacitor capacity.

SUMMARY OF THE INVENTION An object of the present invention is to provide a capacitor manufacturing method of a semiconductor memory device for increasing the capacitor capacity of a storage electrode.

1A to 1D are flowcharts sequentially showing processes of a capacitor manufacturing method of a semiconductor memory device according to the prior art;

2A through 2D are flowcharts sequentially illustrating processes of a capacitor manufacturing method of a semiconductor memory device according to the present invention.

* Explanation of symbols for the main parts of the drawings

12, 52: BPSG 14, 54: HTO membrane

16, 58: contact hole 18, 60: conductive film

20, 56, 62: antireflection film

According to one aspect of the present invention for achieving the above object, a capacitor manufacturing method of a semiconductor memory device forms a first antireflection film on a first insulating film formed on a semiconductor substrate. The first anti-reflection film and the first insulating film are sequentially etched to form a storage electrode contact hole. The conductive electrode for the storage electrode is formed on the first anti-reflection film including the storage electrode contact hole. A second antireflection film is formed on the conductive film. The second anti-reflection film and the conductive film are sequentially etched using a storage electrode forming mask to form a first undercut region under the conductive film. Next, the first anti-reflection film and the second anti-reflection film are simultaneously removed to form a second undercut area larger than the first undercut area under the conductive film.

In a preferred embodiment, the first and second antireflection films are PESiON.

In a preferred embodiment, the process of removing the first and second antireflective films is a phosphoric acid strip process.

(Action)

According to the present invention, an undercut region is formed under the conductive film by etching the anti-reflection film deposited on the conductive film for the storage electrode.

(Example)

Hereinafter, with reference to the reference drawings 2a to 2d according to an embodiment of the present invention will be described in detail.

2C and 2D, in the method of manufacturing a capacitor of a novel semiconductor memory device according to an embodiment of the present invention, an anti-reflection film is formed under and over a conductive film for a storage electrode. When the conductive layer is etched, the anti-reflective layers are simultaneously removed to form an undercut region under the conductive layer. Therefore, the surface area of the storage electrode can be increased to increase the capacitor capacity.

2A to 2D are flowcharts sequentially illustrating processes of a capacitor manufacturing method of a semiconductor memory device according to an embodiment of the present invention.

Referring to FIG. 2A, a first anti-reflection film 56 is formed on a substrate on which oxide films 52 and 54 are formed. The oxide films 52 and 54 are a BPSG film 52 and an HTO film (high temperature oxidation layer). The first anti-reflection film 56 is a plasma enhanced SiON (PESiON), and is formed to a thickness of 600 μs.

Referring to FIG. 2B, the first anti-reflection film 56, the HTO film 54, and the BPSG film 52 are sequentially etched using a contact hole forming mask to form a contact hole 58. Then, the conductive film 60 for the storage electrode and the second anti-reflection film 62 are formed on the first anti-reflection film 56 including the contact hole 58. The second anti-reflection film 62 is the same PESiON as the first anti-reflection film 56 and is formed to a thickness of 600 kPa.

Referring to FIG. 2C, the second anti-reflection film 62 and the conductive film 60 are sequentially etched using a storage electrode forming mask. When the conductive layer 60 is etched, the first anti-reflection layer 56 may passivate to prevent the conductive layer pattern 60 from falling down. When the conductive film 60 is etched, the surface of the first anti-reflection film 56 is also etched to form an undercut region U1 under the conductive film pattern 60.

Next, referring to FIG. 2D, the second anti-reflection film 62 and the first anti-reflection film 56 on the conductive film 60 are simultaneously removed through the phosphoric acid strip. Therefore, an undercut region U2 having a height equal to the thickness of the first anti-reflection film 56 is formed under the conductive film pattern 60.

The undercut region U2 increases the surface area of the storage electrode, thereby increasing the capacitor capacity.

According to the present invention, the undercut region is formed under the conductive film for the storage electrode while the anti-reflective film formed under the conductive film for the storage electrode is removed. Therefore, the surface area of the storage electrode is increased to increase the capacitor capacity.

Claims (3)

Sequentially etching the multilayer films 52 and 54 and the first anti-reflection film 56 formed on the substrate to form the storage electrode contact holes 58; Sequentially forming a storage electrode conductive layer (60) and a second anti-reflection layer (62) on the first anti-reflection layer (56) including the storage electrode contact hole (58); Etching the second anti-reflection film (62) and the conductive film (60) in order using a mask for forming a storage electrode to form a first under cut region under the conductive film (60); Simultaneously removing the first anti-reflection film 54 and the second anti-reflection film 62 to form a second undercut area U2 that is relatively larger than the first undercut area U1 under the conductive film 60. Capacitor manufacturing method comprising the step. The method of claim 1, And the first and second anti-reflection films are PESiON. The method of claim 1, The process of removing the first and second anti-reflection film is a phosphoric acid strip process.