KR20000035076A - 실리콘 카바이드 크롬 박막 레지스터를 형성하기 위한 방법 - Google Patents
실리콘 카바이드 크롬 박막 레지스터를 형성하기 위한 방법 Download PDFInfo
- Publication number
- KR20000035076A KR20000035076A KR1019990046766A KR19990046766A KR20000035076A KR 20000035076 A KR20000035076 A KR 20000035076A KR 1019990046766 A KR1019990046766 A KR 1019990046766A KR 19990046766 A KR19990046766 A KR 19990046766A KR 20000035076 A KR20000035076 A KR 20000035076A
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- Prior art keywords
- layer
- material layer
- resistor
- isolation region
- thin film
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/20—Resistors
- H01L28/24—Resistors with an active material comprising a refractory, transition or noble metal, metal compound or metal alloy, e.g. silicides, oxides, nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/006—Thin film resistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/06—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material including means to minimise changes in resistance with changes in temperature
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/931—Silicon carbide semiconductor
Abstract
Description
Claims (5)
- 반도체 재료와 상기 반도체 재료상에 형성된 격리영역을 갖는 반도체 디바이스에 박막 레지스터를 형성하기 위한 방법에 있어서,상기 격리 영역에 희생 재료 층을 형성하는 단계;상기 격리 영역의 노출부분을 형성하기 위해 상기 희생 재료 층의 선택된 부분을 제거하는 단계; 및상기 격리영역의 노출부분과 상기 희생 재료 층위에 저항 재료 층을 형성하는 단계를 포함하고, 상기 저항 재료 층은 실리콘의 가중치에 의한 비율, 카본의 가중치에 의한 비율, 및 크롬의 가중치에 의한 비율을 갖는 것을 특징으로 하는 방법.
- 제1항에 있어서,레지스터를 형성하기 위해 상기 저항 재료 층의 선택된 부분을 제거하는 단계; 및상기 희생 재료 층을 제거하는 단계를 더 포함하는 것을 특징으로 하는 방법.
- 반도체 재료와 상기 반도체 재료상에 형성된 격리영역을 갖는 반도체 디바이스에 박막 레지스터를 형성하기 위한 방법에 있어서,상기 격리 영역에 희생 재료 층을 형성하는 단계;상기 격리 영역의 노출부분을 형성하기 위해 상기 희생 재료 층의 선택된 부분을 제거하는 단계; 및상기 격리영역의 노출부분과 상기 희생 재료 층위에, 실리콘의 가중치에 의한 비율, 카본의 가중치에 의한 비율 및 크롬의 가중치에 의한 비율로 구성된 저항 재료 층을 형성하는 단계;레지스터를 형성하기 위해 상기 저항 재료 층의 선택된 부분을 제거하는 단계; 및상기 희생 재료 층을 제거하는 단계를 포함하는 것을 특징으로 하는 방법.
- 반도체 재료와 상기 반도체 재료상에 형성된 격리영역을 갖는 반도체 디바이스에 박막 레지스터를 형성하기 위한 방법에 있어서,상기 격리 영역에 희생 재료 층을 형성하는 단계;상기 격리 영역의 노출부분을 형성하기 위해 상기 희생 재료 층의 선택된 부분을 제거하는 단계;상기 격리영역의 노출부분과 상기 희생 재료 층위에, 실리콘 및 게르마늄으로 구성된 그룹으로부터 선택된 제1 요소의 가중치에 의한 비율, 크롬 및 니켈로 구성된 그룹으로부터 선택된 제2 요소의 가중치에 의한 비율 및 카본으로 구성된 제3 요소의 가중치에 의한 비율을 갖는 저항 재료 층을 형성하는 단계;레지스터를 형성하기 위해 상기 저항 재료 층의 선택된 부분을 제거하는 단계; 및상기 희생 재료 층을 제거하는 단계를 포함하는 것을 특징으로 하는 방법.
- 반도체 재료와 상기 반도체 재료상에 형성된 격리영역을 갖는 반도체 디바이스에 박막 레지스터를 형성하기 위한 방법에 있어서,상기 격리 영역에 희생 재료 층을 형성하는 단계;상기 격리 영역의 노출부분을 형성하기 위해 상기 희생 재료 층의 선택된 부분을 제거하는 단계;상기 격리영역의 노출부분과 상기 희생 재료 층위에, 카본 및 게르마늄으로 구성된 그룹으로부터 선택된 제1 요소의 가중치에 의한 비율, 크롬 및 니켈로 구성된 그룹으로부터 선택된 제2 요소의 가중치에 의한 비율 및 실리콘으로 구성된 제3 요소의 가중치에 의한 비율을 갖는 저항 재료 층을 형성하는 단계;레지스터를 형성하기 위해 상기 저항 재료 층의 선택된 부분을 제거하는 단계; 및상기 희생 재료 층을 제거하는 단계를 포함하는 것을 특징으로 하는 방법.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/187,244 | 1998-11-06 | ||
US09/187,244 US6211032B1 (en) | 1998-11-06 | 1998-11-06 | Method for forming silicon carbide chrome thin-film resistor |
US9/187,244 | 1998-11-06 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20000035076A true KR20000035076A (ko) | 2000-06-26 |
KR100365173B1 KR100365173B1 (ko) | 2002-12-16 |
Family
ID=22688183
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019990046766A KR100365173B1 (ko) | 1998-11-06 | 1999-10-27 | 실리콘 카바이드 크롬 박막 저항기를 형성하기 위한 방법 |
Country Status (2)
Country | Link |
---|---|
US (1) | US6211032B1 (ko) |
KR (1) | KR100365173B1 (ko) |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6365482B1 (en) * | 1999-10-28 | 2002-04-02 | Analog Devices, Inc. | I.C. thin film resistor stabilization method |
US6426268B1 (en) * | 2000-11-28 | 2002-07-30 | Analog Devices, Inc. | Thin film resistor fabrication method |
US20020177321A1 (en) * | 2001-03-30 | 2002-11-28 | Li Si Yi | Plasma etching of silicon carbide |
US7084070B1 (en) | 2001-03-30 | 2006-08-01 | Lam Research Corporation | Treatment for corrosion in substrate processing |
KR20030047604A (ko) * | 2001-12-11 | 2003-06-18 | 한국전기연구원 | 반도체 집적회로의 저 온도저항계수 저항체 제조방법 |
US7323751B2 (en) * | 2003-06-03 | 2008-01-29 | Texas Instruments Incorporated | Thin film resistor integration in a dual damascene structure |
US7345573B2 (en) * | 2005-05-24 | 2008-03-18 | Texas Instruments Incorporated | Integration of thin film resistors having different TCRs into single die |
US8242876B2 (en) | 2008-09-17 | 2012-08-14 | Stmicroelectronics, Inc. | Dual thin film precision resistance trimming |
US8659085B2 (en) * | 2010-08-24 | 2014-02-25 | Stmicroelectronics Pte Ltd. | Lateral connection for a via-less thin film resistor |
US8436426B2 (en) | 2010-08-24 | 2013-05-07 | Stmicroelectronics Pte Ltd. | Multi-layer via-less thin film resistor |
US8400257B2 (en) | 2010-08-24 | 2013-03-19 | Stmicroelectronics Pte Ltd | Via-less thin film resistor with a dielectric cap |
US8927909B2 (en) | 2010-10-11 | 2015-01-06 | Stmicroelectronics, Inc. | Closed loop temperature controlled circuit to improve device stability |
US9159413B2 (en) | 2010-12-29 | 2015-10-13 | Stmicroelectronics Pte Ltd. | Thermo programmable resistor based ROM |
US8809861B2 (en) | 2010-12-29 | 2014-08-19 | Stmicroelectronics Pte Ltd. | Thin film metal-dielectric-metal transistor |
JP5616822B2 (ja) * | 2011-03-03 | 2014-10-29 | セイコーインスツル株式会社 | 半導体装置の製造方法 |
US8981527B2 (en) * | 2011-08-23 | 2015-03-17 | United Microelectronics Corp. | Resistor and manufacturing method thereof |
US8526214B2 (en) | 2011-11-15 | 2013-09-03 | Stmicroelectronics Pte Ltd. | Resistor thin film MTP memory |
KR102148166B1 (ko) | 2019-04-09 | 2020-08-26 | 김석주 | 냉기흡입배관의 흡기홀 결로방지장치 |
US20220271118A1 (en) * | 2021-02-25 | 2022-08-25 | Semiconductor Components Industries, Llc | Method and apparatus related to controllable thin film resistors for analog integrated circuits |
KR20230132862A (ko) * | 2021-03-29 | 2023-09-18 | 도소 가부시키가이샤 | Cr-Si 계 막 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3996551A (en) | 1975-10-20 | 1976-12-07 | The United States Of America As Represented By The Secretary Of The Navy | Chromium-silicon oxide thin film resistors |
US4296309A (en) * | 1977-05-19 | 1981-10-20 | Canon Kabushiki Kaisha | Thermal head |
US4591821A (en) | 1981-06-30 | 1986-05-27 | Motorola, Inc. | Chromium-silicon-nitrogen thin film resistor and apparatus |
US4682143A (en) * | 1985-10-30 | 1987-07-21 | Advanced Micro Devices, Inc. | Thin film chromium-silicon-carbon resistor |
US4759836A (en) * | 1987-08-12 | 1988-07-26 | Siliconix Incorporated | Ion implantation of thin film CrSi2 and SiC resistors |
US4975386A (en) * | 1989-12-22 | 1990-12-04 | Micro Power Systems, Inc. | Process enhancement using molybdenum plugs in fabricating integrated circuits |
US5081439A (en) | 1990-11-16 | 1992-01-14 | International Business Machines Corporation | Thin film resistor and method for producing same |
US5254869A (en) * | 1991-06-28 | 1993-10-19 | Linear Technology Corporation | Aluminum alloy/silicon chromium sandwich schottky diode |
US5496762A (en) | 1994-06-02 | 1996-03-05 | Micron Semiconductor, Inc. | Highly resistive structures for integrated circuits and method of manufacturing the same |
JP3266041B2 (ja) * | 1996-05-22 | 2002-03-18 | 株式会社島津製作所 | 部材接合法及びこの方法により製造した光学測定装置 |
US5976944A (en) * | 1997-02-12 | 1999-11-02 | Harris Corporation | Integrated circuit with thin film resistors and a method for co-patterning thin film resistors with different compositions |
-
1998
- 1998-11-06 US US09/187,244 patent/US6211032B1/en not_active Expired - Lifetime
-
1999
- 1999-10-27 KR KR1019990046766A patent/KR100365173B1/ko active IP Right Grant
Also Published As
Publication number | Publication date |
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KR100365173B1 (ko) | 2002-12-16 |
US6211032B1 (en) | 2001-04-03 |
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