KR19990035326A - Manufacturing method of thin film type optical path control device - Google Patents

Abstract

A method of manufacturing a thin film type optical path control device that can prevent damage to an active matrix and reduce contact resistance between an active matrix and a backside metal is disclosed. After forming the support layer, the lower electrode, the strain layer, and the upper electrode on the front surface of the active matrix, the actuator is formed by patterning the upper electrode, the strain layer, the lower electrode, and the support layer. The backside of the active matrix is polished using chemical mechanical polishing or spin on glass, followed by deposition of backside metal. During the formation of the actuator, the back surface of the damaged or contaminated active matrix is first polished and flattened, followed by deposition of the backside metal, which improves the adhesion between the active matrix and the backside metal, thereby allowing hydrogen fluoride (HF) vapors to It can penetrate between the active matrix and the backside metal to prevent damage to the active matrix. In addition, the contact resistance between the active matrix and the backside metal can be reduced to accurately deliver the bias voltage to the MOS transistors without losing the applied voltage.

Description

Manufacturing method of thin film type optical path control device

The present invention relates to a method for manufacturing a thin film type optical path control device using AMA (Actuated Mirror Array), and more particularly, by polishing a back side of an active matrix on which an actuator is formed, and then forming a backside metal. The present invention relates to a method of manufacturing a thin film type optical path control device capable of improving adhesion between the active matrix and the backside metal to prevent damage to the active matrix and to reduce contact resistance between the active matrix and the backside metal.

Optical path control devices or spatial light modulators for projecting optical energy onto a screen may be applied to various fields such as optical communication, image processing, and information display devices. An image processing apparatus using such an optical modulator is generally divided into a direct-view image display device and a projection-type image display device according to a method of displaying optical energy on a screen. do.

An example of a direct-view image display device is a CRT (Cathode Ray Tube). The CRT device is called a CRT, which has excellent image quality but increases in weight and volume as the screen is enlarged, leading to an increase in manufacturing cost. There is. Projection type image display apparatuses include a liquid crystal display (LCD), a deformable mirror device (DMD), and an AMA. Such projection image display devices can be further divided into two groups according to their optical characteristics. That is, devices such as LCDs can be classified as transmissive spatial light modulators, while DMD and AMA can be classified as reflective spatial light modulators.

Transmission optical modulators, such as LCDs, have a very simple optical structure, which makes them thinner, lighter in weight, and smaller in volume. However, due to the polarity of the light, the light efficiency is low, there is a problem inherent in the liquid crystal material, for example, there is a disadvantage that the response speed is slow and the inside is easy to overheat. In addition, the maximum light efficiency of existing transmission light modulators is limited to a range of 1-2%, requiring dark room conditions to provide acceptable display quality. Therefore, optical modulators such as DMD and AMA have been developed to solve the above problems.

Although DMD shows a relatively good light efficiency of about 5%, the hinge structure employed in the DMD not only causes serious fatigue problems, but also requires a very complicated and expensive driving circuit. In the AMA, each of the mirrors installed therein reflects light incident from the light source at a predetermined angle, and the reflected light is projected on the screen through an aperture such as a slit or a pinhole. It is a device that can adjust the speed of light to form an image. Therefore, its structure and operation principle are simple, and high light efficiency (more than 10% light efficiency) can be obtained compared to LCD or DMD. In addition, the contrast of the image projected on the screen is improved to obtain a brighter and clearer image.

Each actuator of the AMA generates a deformation in accordance with the electric field generated by the applied electric picture signal and the bias signal. As the actuator deforms, each of the mirrors mounted thereon is tilted. Accordingly, the inclined mirrors reflect light incident from the light source at a predetermined angle to form an image on the screen. Piezoelectric materials such as PZT (Pb (Zr, Ti) O ₃ ) or PLZT ((Pb, La) (Zr, Ti) O ₃ ) are used as actuators for driving the respective mirrors. The actuator may also be configured as a warping material such as PMN (Pb (Mg, Nb) O ₃ ).

These AMA devices are largely divided into bulk type and thin film type. The bulk optical path control device is disclosed in US Pat. No. 5,085,497 to Gregory Um et al. The bulk optical path control device is made by thinly cutting a multilayer ceramic to mount a ceramic wafer having a metal electrode therein into an active matrix in which a transistor is built, and then processing by using a sawing method and installing a mirror on the top. . However, the bulk optical path control device requires very high precision in design and manufacture, and has a disadvantage in that the response of the deformable part is slow.

Accordingly, a thin film type optical path control apparatus that can be manufactured using a semiconductor manufacturing process has been developed. The thin film type optical path control device is a patent application No. 96-42197 (Applicant's name: thin film type optical path control device that can control the stress of the membrane and a method of manufacturing the same) of the applicant filed a patent application of the Republic of Korea Patent Office on September 24, 1996 Is disclosed.

Figure 1 shows a cross-sectional view of the thin film type optical path control device described in the preceding application. Referring to FIG. 1, the thin film type optical path adjusting apparatus includes an active matrix 1 and an actuator 60 formed on the active matrix 1. The active matrix 1 includes a protective layer 10 stacked on the active matrix 1 and the drain pad 5, and an etch stop layer 15 stacked on the protective layer 10. A backside metal 65 is formed on the rear surface of the active matrix 1 to prevent a current from flowing in the reverse direction by applying a bias voltage when driving a MOS transistor (not shown) embedded in the active matrix 1.

The actuator 60 has one side in contact with a portion where the drain pad 5 is formed at the bottom of the etch stop layer 15, and the other side has a membrane 25 formed horizontally through the air gap 20, and a membrane. Lower electrode 30 stacked on top of 25, strained layer 35 stacked on top of lower electrode 30, upper electrode 40 stacked on top of strained layer 35, and the strained layer. In the via hole 45 formed from one side of the 35 to the drain pad 5 through the strained layer 35, the lower electrode 30, the membrane 25, the etch stop layer 15, and the protective layer 10. The lower electrode 30 and the drain pad 5 include a via contact 50 electrically formed with each other.

The upper electrode 40 is uniformly operated on a part of the upper electrode 40 so that the upper electrode 40 is incident from the light source at a boundary between a portion that is deformed and an undeformed portion of the upper electrode 40. Stripes 55 are formed to prevent light from being diffusely reflected.

Hereinafter, a method of manufacturing the above-described thin film type optical path control apparatus will be described with reference to the drawings.

2A to 2D are manufacturing process diagrams of the apparatus shown in FIG. 1. Referring to FIG. 2A, an upper portion of an active matrix 1 having M x N (M, N is an integer) MOS transistors (not shown) embedded therein and a drain pad 5 extending from the drain of the transistor. The protective layer 10 is formed in the. The protective layer 10 is formed of phosphorus silicate glass (PSG) to have a thickness of about 1.0 to about 2.0 μm using a chemical vapor deposition (CVD) method. The protective layer 10 protects the active matrix 1 in which the MOS transistor is embedded during a subsequent process.

An etch stop layer 15 is formed on the passivation layer 10. The etch stop layer 15 is formed to have a thickness of about 1000 to 2000 kPa using a low pressure chemical vapor deposition (LPCVD) method. The etch stop layer 15 prevents the active matrix 1 and the protective layer 10 from being etched and damaged during the subsequent etching process.

The sacrificial layer 18 is stacked on the etch stop layer 15. The sacrificial layer 18 is formed of phosphorous silicate glass (PSG) having a high concentration of phosphorus (PG) to have a thickness of about 1.0 to 3.0 µm using the atmospheric pressure chemical vapor deposition (APCVD) method. In this case, since the sacrificial layer 18 covers the upper portion of the active matrix 1 in which the transistor is embedded, the surface flatness is very poor. Accordingly, the surface of the sacrificial layer 18 is planarized by polishing using a spin on glass (SOG) method or a chemical mechanical polishing (CMP) method. Subsequently, a portion of the sacrificial layer 18 is etched to expose a portion in which the drain pad 5 is formed below the etch stop layer 15.

Referring to FIG. 2B, the membrane 25 is stacked on the exposed etch stop layer 15 and the sacrificial layer 18 to have a thickness of about 0.1 to 1.0 μm. The membrane 25 is formed of silicon carbide (SiC) using a Plasma Enhanced CVD (PECVD) method.

The lower electrode 30 is stacked on the membrane 25. The lower electrode 30 is laminated with a metal such as platinum (Pt) or platinum-tantalum (Pt-Ta) so as to have a thickness of about 500 to 2000 kW using a sputtering method. Subsequently, the lower electrode 30 is iso-cutted so as to apply an independent first signal (image signal) for each pixel.

Referring to FIG. 2C, a strained layer 35 is stacked on the lower electrode 30. The strained layer 35 is formed of a piezoelectric material such as PZT or PLZT so as to have a thickness of about 0.1 to 1.0 탆, preferably about 0.4 탆 using a sol-gel method. Thereafter, the piezoelectric material constituting the strained layer 35 is subjected to heat treatment by a rapid heat treatment (RTA) method to cause phase shift. The strained layer 35 is applied with a second signal (bias signal) to the upper electrode 40 and a first signal is applied to the lower electrode 30 so that the potential difference between the upper electrode 40 and the lower electrode 30 is reduced. Deformation is caused by the electric field generated.

The upper electrode 40 is stacked on top of the strained layer 35. The upper electrode 40 is formed to have a thickness of about 1000 mW using a sputtering method of an electrically conductive and reflective metal such as aluminum. At this time, the deposition rate of aluminum is deposited to about 7 kW / sec to form the upper electrode 40. The second signal (bias signal) is applied to the upper electrode 40 from the outside through a common electrode line (not shown). Since the upper electrode 40 has both electrical conductivity and reflectivity, the upper electrode 40 performs not only a function of a bias electrode generating an electric field but also a function of a mirror reflecting light incident from a light source.

Subsequently, the upper electrode 40 is patterned into a predetermined pixel shape. In this case, a stripe 55 is formed on a part of the upper electrode 40. The stripe 55 uniformly operates the upper electrode 40 so that light incident from the light source is diffusely reflected at the boundary between the portion of the upper electrode 40 that is deformed and the portion that is not deformed according to the deformation of the deforming layer 35. To prevent them. The strained layer 35 and the lower electrode 30 are patterned to have a predetermined pixel shape, respectively.

Referring to FIG. 2D, the strained layer 35, the lower electrode 30, the membrane 25, the etch stop layer 15, and the protective layer 10 from one side of the strained layer 35 to an upper portion of the drain pad 5. ) Is sequentially etched to form a via hole 45 from the strained layer 35 to the drain pad 5. Subsequently, a metal such as tungsten (W) or titanium (Ti) is deposited in the via hole 45 using a sputtering method, so that the bottom contact 30 and the drain pad 5 are electrically connected to each other. 50). Accordingly, the first signal transmitted from the outside is applied to the lower electrode 30 through the transistor, the drain pad 5, and the via contact 50 embedded in the active matrix 1. In addition, the second signal is applied to the upper electrode 40 so that the deformation layer 35 formed between the upper electrode 40 and the lower electrode 30 causes deformation, and accordingly the actuator including the deformation layer 35 ( 60) is bent upwards. Therefore, the upper electrode 40 on the actuator 60 is also bent in the same direction. Light incident from the light source is reflected by the upper electrode 40 bent at a predetermined angle, and then projected onto a screen to form an image. Subsequently, platinum-tantalum (Pt-Ta) is deposited on the rear surface of the active matrix 1 using a sputtering method or a deposition method to form a backside metal 65. The backside metal 65 applies a bias voltage when the MOS transistor embedded in the active matrix 1 is driven to prevent current from flowing in the reverse direction in the MOS transistor.

Subsequently, the membrane 25 is patterned to have a predetermined pixel shape. Then, the sacrificial layer 18 is removed using 49% hydrogen fluoride (HF) vapor to form an air gap 20 at the position of the sacrificial layer 18, followed by washing and drying. Complete the AMA device.

However, in the above-described manufacturing method of the thin film type optical path control device, various damages are caused, such as scratching of the back surface of the active matrix, which is a silicon wafer, while the actuator is formed on the front surface of the active matrix. Deposition of the backside metal on the back of the damaged active matrix results in poor adhesion between the active matrix and the backside metal, which causes the backside metal to break away from the active matrix and increases the contact resistance between the backside metal and the active matrix. There is a problem done.

Accordingly, an object of the present invention is to polish the back side of an active matrix with an actuator formed on the front side, and then form a backside metal to improve the adhesion between the active matrix and the backside metal and reduce the contact resistance between the active matrix and the backside metal. It is to provide a method of manufacturing a thin film type optical path control device.

1 is a cross-sectional view of a thin film type optical path adjusting device described in the applicant's prior application.

2A to 2D are manufacturing process diagrams of the apparatus shown in FIG. 1.

3 is a plan view of a thin film type optical path control apparatus according to the present invention.

4 is an enlarged perspective view of an actuator of the apparatus shown in FIG. 3.

5 is a cross-sectional view taken along line A′A ′ of the apparatus of FIG. 4.

6A to 6C are manufacturing process diagrams of the apparatus shown in FIG.

<Explanation of symbols for main parts of drawing>

100: active matrix 125: first metal layer

130: first protective layer 135: second metal layer

140: second protective layer 145: etch stop layer

150: sacrificial layer 160: support layer

165: lower electrode 170: strained layer

175: upper electrode 180: via hole

185: Beer contact 190: Actuator

195: mirror 200: backside metal

In order to achieve the above object of the present invention, the present invention provides an active matrix including a first metal layer having M x N (M, N is an integer) MOS transistor embedded therein and having a drain pad extending from the drain of the transistor. Providing; Iii) forming a support layer on top of the front surface of the active matrix, ii) forming a bottom electrode on top of the support layer, iii) forming a strained layer on top of the bottom electrode, iii) Forming an actuator on top of the strained layer, and iii) patterning the upper electrode, the strained layer, the lower electrode, and the support layer; Polishing the back side of the active matrix; Depositing a backside metal on the backside of the polished active matrix; And depositing silver or aluminum on the patterned support layer to form a mirror.

According to the present invention, during the formation of the actuator, the back surface of the damaged or contaminated active matrix is first polished and planarized, and then the backside metal is deposited, thereby improving the adhesion between the active matrix and the backside metal, thereby improving hydrogen fluoride. (HF) vapor can penetrate between the active matrix and the backside metal to prevent damage to the active matrix. In addition, the contact resistance between the active matrix and the backside metal can be reduced to accurately deliver the bias voltage to the MOS transistors without losing the applied voltage.

Hereinafter, with reference to the accompanying drawings will be described in detail a manufacturing method of a thin film type optical path control apparatus according to a preferred embodiment of the present invention.

Figure 3 is a plan view of a thin film type optical path control device according to the present invention, Figure 4 is an enlarged perspective view of the actuator of the device shown in Figure 3, Figure 5 is a cross-sectional view taken along the line AA 'of the device of FIG. It is shown.

3 to 5, the thin film type optical path adjusting apparatus according to the present invention includes an active matrix 100, an actuator 190, and a mirror 195.

The active matrix 100 in which M × N (M, N are integers) P-MOS transistors is embedded in the source 110 and the drain 120 of the MOS transistor on the front surface of the active matrix 100. ), The first metal layer 125 extending from the first metal layer 125, the first protective layer 130 formed on the first metal layer 125, the second metal layer 135 formed on the first protective layer 130, and the second metal layer The second protective layer 140 formed on the upper portion of the 135 and the etch stop layer 145 formed on the upper portion of the second protective layer 140. The first metal layer 125 includes a drain pad extending from the drain 120 of the MOS transistor, and the second metal layer 135 includes a titanium (Ti) layer and a titanium nitride (TiN) layer. In addition, a backside metal 200 may be applied to a rear surface of the active matrix 100 to prevent a current from flowing backward in the MOS transistor by applying a bias voltage when driving the MOS transistor embedded in the active matrix 100. ) Is formed.

Referring to FIG. 4, one side of the actuator 190 is in contact with a portion of the etch stop layer 145 in which the drain pad of the first metal layer 125 is formed, and the other side thereof is horizontal through the air gap 155. The support layer 160, the lower electrode 165 formed on the support layer 160, the deformation layer 170 formed on the lower electrode 165, and the upper electrode 175 formed on the deformation layer 170. The strained layer 170, the lower electrode 165, the support layer 160, the etch stop layer 145, the second passivation layer 140, and the first passivation layer 130 are formed from one side of the strain layer 170. The via contact 185 is formed to connect the lower electrode 165 and the drain pad to the inside of the via hole 180 that is vertically formed to the drain pad of the first metal layer 125. The support layer 160 functions as a membrane supporting the actuator of the thin film type optical path adjusting device described in the previous application.

The support layer 160 has a shape in which a rectangular flat plate is integrally formed with the arms on the same plane between two rectangular arms formed in parallel from both support portions. The mirror 195 is formed on the rectangular flat plate of the support layer 160. Thus, the mirror 195 has the shape of a rectangular flat plate.

Hereinafter, a method of manufacturing a thin film type optical path control device according to the present invention will be described in detail with reference to the drawings.

6a to 6c show a manufacturing process of the thin film type optical path control apparatus according to the present invention. Referring to FIG. 6A, after preparing an active matrix 100, which is an n-type doped silicon (Si) wafer, the active matrix 100 may be formed using a conventional device isolation process, for example, silicon partial oxidation (LOCOS). ) To form an isolation layer 105 for dividing the active region and the field region. Subsequently, after forming the gate 115 made of a conductive material such as polysilicon doped with impurities on the active region, p ⁺ source 110 and drain 120 are formed by an ion implantation process, thereby forming M ×. N (M, N is an integer) P-MOS transistors are formed.

After forming the insulating layer 118 made of oxide on the P-MOS transistor is formed, openings for exposing the top of one side of the source 110 and the drain 120, respectively by a photolithography process. Subsequently, a first metal layer 125 made of a metal such as titanium, titanium nitride, and tungsten (W) is deposited on the resultant, on which the openings are formed, and then the first metal layer 125 is patterned by a photolithography process. The first metal layer 125 patterned as described above includes a drain pad extending from the drain 120 of the P-MOS transistor to one side of the support of the actuator 190.

The first passivation layer 130 is formed on the first metal layer 125. The first passivation layer 130 is formed to have a thickness of about 8000 μs using the phosphorus silicate glass (PSG) using a chemical vapor deposition (CVD) method. The first protective layer 130 prevents damage to the active matrix 100 in which the MOS transistor is embedded during a subsequent process.

The second metal layer 135 is formed on the first passivation layer 130. In order to form the second metal layer 135, first, a titanium layer is formed by sputtering titanium (Ti) to a thickness of about 300 μm. Subsequently, titanium nitride is deposited on the titanium layer using physical vapor deposition (PVD) to form a titanium nitride layer. Since the light incident from the light source is incident not only to the mirror 195 but also to a portion other than the portion where the mirror 195 is formed, the second metal layer 135 prevents light leakage current from flowing in the active matrix 100. do. Subsequently, an opening 138 is formed in the second metal layer 135 by etching the portion of the second metal layer 135 where the via contact 185 is to be formed in a subsequent process through a photolithography process.

The second passivation layer 140 is formed on the second metal layer 135. The second protective layer 140 is formed to have a thickness of about 2000 GPa using in-silicate glass (PSG). The second protective layer 140 also prevents damage to the active matrix 100 in which the MOS transistor is embedded and the results formed on the active matrix 100 during the subsequent process.

An etch stop layer 145 is formed on the second passivation layer 140. The etch stop layer 145 prevents the active matrix 100 and the second passivation layer 140 from being etched due to a subsequent etching process. The etch stop layer 145 is formed by depositing nitride (Si ₃ N ₄ ) by a low pressure chemical vapor deposition (LPCVD) method to have a thickness of about 1000 ~ 2000Å.

The sacrificial layer 150 is formed on the etch stop layer 145. The sacrificial layer 150 is formed by depositing phosphorus silicate (PSG) to a thickness of about 2.0 to about 3.0 μm using an atmospheric pressure chemical vapor deposition (APCVD) method. In this case, since the sacrificial layer 150 covers the upper portion of the active matrix 100 in which the P-MOS transistor is embedded, the surface flatness is very poor. Therefore, planarization is performed by polishing the surface of the sacrificial layer 150 such that the sacrificial layer 150 has a thickness of about 1.1 μm by using spin on glass (SOG) or chemical mechanical polishing (CMP). Let's do it. Subsequently, the portion of the first sacrificial layer 150 having the opening 138 formed under the second metal layer 135 is etched to expose a part of the etch stop layer 145, thereby anchoring the support of the actuator 190. Create the location where the anchor will be formed.

Referring to FIG. 6B, the support layer 160 is formed on the exposed etch stop layer 145 and on the sacrificial layer 150. The support layer 160 is formed to have a thickness of about 0.01 to 1.0 탆 using low pressure chemical vapor deposition (LPCVD).

The lower electrode 165 is formed on the support layer 160. The lower electrode 165 is formed of a metal such as platinum, tantalum, or platinum-tantalum to a thickness of about 0.01 to 1.0 탆 using a sputtering method or a chemical vapor deposition method. Subsequently, the lower electrode 165 is separated for each pixel so that an independent first signal (image signal) is applied to each pixel (Iso-cut process). A first signal is applied to the lower electrode 165 through a transistor embedded in the active matrix 100, a drain pad of the first metal layer 125, and a via contact 185 from the outside.

A deformation layer 170 made of a piezoelectric material such as PZT or PLZT is formed on the lower electrode 165. The strained layer 170 is formed to have a thickness of about 0.01 to 1.0 탆 using a sol-gel method, a sputtering method, or a chemical vapor deposition method. Preferably, the strained layer 170 is formed to have a thickness of about 0.4 μm using PZT using a sol-gel method. In addition, the piezoelectric material constituting the strained layer 170 may be subjected to a phase change by a rapid heat treatment (RTA). The strained layer 170 is applied with a second signal (bias signal) to the upper electrode 175 and a first signal is applied to the lower electrode 165 to thereby reduce the potential difference between the upper electrode 175 and the lower electrode 165. Deformation is caused by the electric field generated.

The upper electrode 175 is formed on the strained layer 170. The upper electrode 175 is formed to have platinum, tantalum, or platinum-tantalum so as to have a thickness of about 0.01 to 1.0 탆 using a sputtering method or a chemical vapor deposition method. The second signal is applied to the upper electrode 175 through a common electrode line (not shown) from the outside.

Referring to FIG. 6C, after the first photoresist (not shown) is coated on the upper electrode 175 by spin coating, the first photoresist is used as an etching mask. As shown in FIG. 4, the upper electrode 175 is patterned to have a mirror-shaped 'c' shape. Subsequently, after removing the first photoresist and applying and patterning a second photoresist (not shown) on the patterned upper electrode 175 and the deforming layer 170 by spin coating, the second Using the photoresist as an etching mask, the strained layer 170 is patterned to have a shape of a mirror image 'c' slightly wider than the upper electrode 175 (see FIG. 4). Subsequently, the second photoresist is removed, and a third photoresist (not shown) is applied and patterned on top of the upper electrode 175, the deforming layer 170, and the lower electrode 165. By using the third photoresist as an etching mask, the lower electrode 165 is patterned to have a mirror-shaped 'c' shape slightly wider than that of the strained layer 170.

Subsequently, the strained layer 170, the lower electrode 165, the support layer 160, and the etch stop layer 145 are formed from a portion of the strained layer 170 in which the opening 138 of the second metal layer 135 is formed below. After etching the second protective layer 140 and the first protective layer 130 in order to form the via hole 180 from one side of the strained layer 170 to the drain pad of the first metal layer 125, Vias in which the drain pads of the first metal layer 125 and the lower electrode 165 are electrically connected to each other by using a sputtering method of a metal such as tungsten (W), platinum, aluminum, or titanium in the via hole 180. The contact 185 is formed. Thus, the via contact 185 is formed from the lower electrode 165 to the top of the drain pad in the via hole 180. The first signal transmitted from the outside is applied to the lower electrode 165 through the transistor embedded in the active matrix 100, the drain pad of the first metal layer 125, and the via contact 185.

Subsequently, after applying and patterning a fourth photoresist (not shown) on the patterned lower electrode 165 and the via hole 180 by a spin coating method, the fourth photoresist is used as an etching mask. Thus, portions extending from both support portions of the support layer 160 may have a slightly wider rectangular shape than the lower electrode 165, and the center portion of the support layer 160 integrally formed thereon may be patterned to have a rectangular flat plate shape. That is, as shown in FIG. 4, the support layer 160 has a shape in which rectangular arms extend from both support portions, and a rectangular flat plate having a larger area between these arms is formed integrally with the arms on the same plane. Have As a result of the patterning of the support layer 160 as described above, a portion of the sacrificial layer 150 is exposed.

Subsequently, the rear surface of the active matrix 100 having the actuator 190 formed on the front surface is polished by using a chemical mechanical polishing (CMP) method or a spin on glass (SOG) method as described above. Flatten the back of the. Subsequently, platinum-tantalum is deposited on the back surface of the planarized active matrix 100 by sputtering, evaporation, or chemical vapor deposition to form the backside metal 200. The backside metal 200 applies a bias voltage to the transistor when the MOS transistor embedded in the active matrix 100 operates to prevent current from flowing in the reverse direction. In the present invention, as described above, the back surface of the damaged or contaminated active matrix 100 is first polished and planarized while the actuator 190 is formed, and then the backside metal 200 is deposited, thereby forming the active matrix 100. ) To improve adhesion between the backside metal 200 and the hydrogen fluoride (HF) vapor later penetrating between the active matrix 100 and the backside metal 200 to prevent the active matrix 100 from being damaged. . In addition, the contact resistance between the active matrix 100 and the backside metal 200 can be reduced to accurately transfer the bias voltage to the MOS transistor without losing the applied voltage.

Subsequently, the fourth photoresist is removed, and a fifth photoresist (not shown) is applied and patterned on the exposed sacrificial layer 150 and on the support layer 160 by spin coating. 5 The photoresist is used as an etching mask and patterned to expose a rectangular flat plate, which is a central portion of the support layer 160. Then, a metal having reflective properties such as aluminum is deposited on the center portion of the rectangular exposed support layer 160 using a sputtering method or a chemical vapor deposition method. Subsequently, the deposited metal is patterned to form the mirror 195 such that the deposited metal has the same shape as the center portion of the rectangular exposed support layer 160, and then the fifth photoresist is removed. Next, the sacrificial layer 150 is removed using hydrogen fluoride (HF) vapor to form an air gap 155 at the position of the sacrificial layer 150, and then rinsed and dried. Complete the thin film optical path control device.

In the above-described thin film type optical path control device according to the present invention, the second electrode is applied to the upper electrode 175 via a common electrode line from the outside. At the same time, the first signal is applied to the lower electrode 165 through the transistor embedded in the active matrix 100 from the outside, the drain pad of the first metal layer 155, and the via contact 185. An electric field is generated between the electrodes 165 according to the potential difference. Due to such an electric field, the deformation layer 170 formed between the upper electrode 175 and the lower electrode 165 causes deformation. The strained layer 170 contracts in a direction orthogonal to the electric field, and thus the actuator 190 including the strained layer 170 and the support layer 160 is bent at a predetermined angle. The mirror 195 reflecting the light incident from the light source is formed at an upper portion of the central portion of the support layer 160, and thus is bent at the same angle as the actuator 190. Accordingly, the mirror 195 reflects the incident light at a predetermined angle, and the reflected light passes through the slit to be projected onto the screen to form an image.

According to the present invention, during the formation of the actuator, the back surface of the damaged or contaminated active matrix is first polished and planarized, and then the backside metal is deposited, thereby improving the adhesion between the active matrix and the backside metal, thereby improving hydrogen fluoride. (HF) vapor can penetrate between the active matrix and the backside metal to prevent damage to the active matrix. In addition, the contact resistance between the active matrix and the backside metal can be reduced to accurately deliver the bias voltage to the MOS transistors without losing the applied voltage.

Although the preferred embodiments of the present invention have been described in detail with reference to the accompanying drawings, the present invention is not limited thereto and may be improved or modified by those skilled in the art within the scope of the technical idea of the present invention.

Claims (2)

Providing an active matrix comprising a first metal layer with M × N (M, N is an integer) embedded therein and having a drain pad extending from the drain of the transistor; Iii) forming a support layer on top of the front surface of the active matrix, ii) forming a bottom electrode on top of the support layer, iii) forming a strained layer on top of the bottom electrode, iii) Forming an actuator on top of the strained layer, and iii) patterning the upper electrode, the strained layer, the lower electrode, and the support layer; Polishing the back side of the active matrix; Depositing a backside metal on the backside of the polished active matrix; And And depositing silver or aluminum on top of the patterned support layer to form a mirror. The method of claim 1, wherein the polishing of the rear surface of the active matrix is performed using a chemical mechanical polishing method.