KR19990002354A - Manufacturing method of thin film type optical path control device - Google Patents

Abstract

Disclosed is a method of manufacturing a thin film type optical path control device. The method includes providing an active matrix having M × N transistors embedded therein and a plurality of panel pads formed at a periphery thereof; Forming M × N actuators each including a support layer, a lower electrode, a strain layer, and an upper electrode on the active matrix; Forming a dicing line having a rectangular shape in an outer portion of the panel pad of the active matrix in which the M × N actuators are formed; After applying the photoresist on the active matrix, patterning the photoresist such that the photoresist has an area smaller than the dicing line inside the dicing line on the active matrix; And cutting the active matrix along the dicing line. The photoresist remains only on the region where the inner element is formed from the dicing line and the panel pad portion by a predetermined distance, and a supporting layer is formed by using the remaining photoresist as an etching mask, thereby forming an end in the dicing line portion. The difference can prevent the photoresist from being lift-hoped, thereby preventing the sticking of the actuator and the electrical opening between the pad of the TCP and the AMA panel pad.

Description

Manufacturing method of thin film type optical path control device

The present invention relates to a method for manufacturing an Actuated Mirror Array (AMA), which is a thin film type optical path control device, and more particularly, a photo only on an area where an AMA panel pad and an element are formed inside a dicing line formed on an active matrix. After forming the resist protective layer, by exposing the pad portion of the AMA panel and patterning the support layer, the photoresist is lifted off due to the step of the dicing line portion when the sacrificial layer is etched using hydrogen fluoride vapor. The present invention relates to a method of manufacturing a thin film type optical path control device capable of preventing the sticking phenomenon of the actuator and the electrical opening between the pad of the TCP and the pad of the AMA panel.

In general, a spatial light modulator, which is a device for projecting optical energy onto a screen, may be variously applied to optical communication, image processing, and information display apparatus. An image processing apparatus using the optical modulator is classified into a direct view type image display device and a projection type image display device according to a method of projecting light incident from a light source onto a screen. CRT (Cathode Ray Tube) or the like is a direct view type image display device, and a liquid crystal display (LCD), a deformable mirror device (DMD), and AMA is a projection type image display device. The CRT apparatus has a high image quality but has a disadvantage in that the screen is not large in size. In other words, as the size of the screen increases, the weight and volume of the device increase, thereby increasing the manufacturing cost. Therefore, a liquid crystal display (LCD) that has a simple optical structure and can be formed thin and has a light weight has been developed. However, the liquid crystal display device has a problem that the efficiency is lowered to have a light efficiency of 1 to 2% due to the polarization of light, the response speed of the liquid crystal material therein is slow, and the device tends to overheat. Accordingly, devices such as DMD or AMA have been developed to solve the above problems. Currently, AMA can achieve 10% or more light efficiency, while DMD devices have about 5% light efficiency. In addition, AMA improves the contrast of the image projected on the screen, resulting in a brighter and clearer image, and is not affected by the polarity of the incident light and does not affect the polarity of the reflected light.

AMA, which is an optical path control device, is classified into a bulk type and a thin film type. The bulk optical path control device is disclosed in US Pat. No. 5,085,497 to Gregory Um et al. The bulk optical path controller is a ceramic wafer (thin wafer of multilayer ceramic and a metal electrode formed therein) is mounted on an active matrix containing a transistor, and then processed by sawing method. This is done by installing a mirror on the top. However, the bulk type optical path adjusting device requires a very high precision in design and manufacture, and has a problem in that the response speed of the deformable part is slow. Accordingly, a thin film type optical path control apparatus that can be manufactured using a semiconductor process has been developed.

Such a thin film type optical path control device is disclosed in patent application No. 96-42199 (name of the invention: pad connection method of a thin film type optical path control device) which the applicant applied for a patent on September 24, 1996.

Figure 1 shows a cross-sectional view of the thin film type optical path control device described in the preceding application.

Referring to FIG. 1, the thin film type optical path control apparatus includes an active matrix 1 and an actuator 65 formed on the active matrix 1.

The active matrix 1 having M x N (M, N is an integer) MOS transistors (not shown) and having a drain pad 5 is disposed on top of the active matrix 1 and the drain pad 5. The stacked protective layer 10 and the etch stop layer 15 stacked on the protective layer 10 is included.

The actuator 1 has a membrane 30 and a membrane formed on one side of the etch stop layer 15 where the drain pad 5 is formed at the lower side thereof, and the other side thereof is horizontally formed through the air gap 25. The lower electrode 35 stacked on the upper portion 30, the strained layer 40 stacked on the lower electrode 35, the upper electrode 45 stacked on the strained layer 40, and the strained layer 40. In the via hole 50 perpendicular to the drain pad 5 through the strained layer 40, the lower electrode 35, the membrane 30, the etch stop layer 15, and the protective layer 10 from one side of the And a via contact 55 formed to electrically connect the lower electrode 35 and the drain pad 5.

Hereinafter, a manufacturing method of the thin film type optical path control device will be described with reference to the drawings.

2A to 2C are manufacturing process diagrams of the apparatus shown in FIG. 1.

Referring to FIG. 2A, a protective layer 10 is stacked on top of an active matrix 1 in which M × N MOS transistors (not shown) are built in and a drain pad 5 is formed. The protective layer 10 is formed of phosphorous-silicate glass (PSG) to have a thickness of about 1.0 to 2.0 μm using a chemical vapor deposition (CVD) method. The protective layer 10 prevents damage to the active matrix 1 in which the transistor is embedded during subsequent processing.

An etch stop layer 15 is stacked on the passivation layer 10. The etch stop layer 15 is formed to have a thickness of about 1000 to 2000 kPa using a low pressure chemical vapor deposition (LPCVD) method. The etch stop layer 15 prevents the active matrix 1 and the protective layer 10 from being etched due to a subsequent process.

The sacrificial layer 20 is stacked on the etch stop layer 15. The sacrificial layer 20 is formed of phosphorous silicate (PSG) to have a thickness of about 1.0 to about 2.0 μm by the Atmospheric Pressure Vapor Deposition (APCVD) method. Subsequently, a portion of the sacrificial layer 20 in which the drain pad 5 is formed is etched to form a support part of the actuator 65 to expose a portion of the etch stop layer 15.

Referring to FIG. 2B, the first layer 29 is stacked on the exposed etch stop layer 15 and the sacrificial layer 20. The first layer 29 is formed to have a thickness of about 0.01 to 1.0 탆 using low pressure chemical vapor deposition (LPCVD). Subsequently, a lower electrode layer 34 made of platinum (Pt), tantalum (Ta), platinum-tantalum (Pt-Ta), or the like is stacked on the first layer 29. The lower electrode layer 34 is formed to have a thickness of about 500 to 2000 kV using a sputtering method. The lower electrode layer 34 is later patterned into the lower electrode 35 so that a first signal (image signal) applied from the outside is provided through the transistor, the drain pad 5 and the via contact 55 in which the active matrix 1 is embedded. Is approved.

The second layer 39 is stacked on the lower electrode layer 34. The second layer 39 is formed into a piezoelectric material such as PZT or PLZT by using a sol-gel method or a chemical vapor deposition (CVD) method in a range of 0.1 to 1.0 탆, preferably 0.4. It is formed to have a thickness of about μm. Subsequently, the piezoelectric material constituting the second layer 39 is phase shifted by using a rapid thermal annealing (RTA) method. The second layer 39 is later patterned into the strained layer 40.

An upper electrode layer is stacked on top of the second layer 39. The upper electrode layer is formed to have a thickness of about 500 to 2000 kPa using aluminum or platinum by sputtering. Subsequently, the upper electrode layer is patterned to form an upper electrode 45 having a predetermined pixel shape. In this case, the stripe 60 is formed on one side of the upper electrode 45. The stripe 60 causes the upper electrode 45 to operate uniformly when the actuator 65 causes deformation so that the boundary between the portion of the upper electrode 45 that is not deformed and the light incident from the light source causes the deformation. To prevent diffuse reflections A second signal (bias signal) is applied to the upper electrode 45 from the outside through a common electrode line (not shown). Therefore, when the first signal is applied to the lower electrode 35 and the second signal is applied to the upper electrode 45 to generate an electric field according to the potential difference between the upper electrode 45 and the lower electrode 35, As a result, the strained layer 41 is deformed.

Referring to FIG. 2C, the second layer 39 and the lower electrode layer 34 are sequentially patterned to have the same shape as the upper electrode 45, so that the strained layer 40 and the lower electrode 35 having a predetermined pixel shape are formed. ). Subsequently, the strained layer 40, the lower electrode 35, the first layer 29, the etch stop layer 15, and the protective layer 10 are sequentially etched from one side of the strained layer 40 to form a via hole 50. ). Thus, the via hole 50 is vertically formed from one side of the strained layer 40 to the drain pad 5. Subsequently, a via contact 55 is formed in the via hole 50 by sputtering a metal such as tungsten (W) or titanium (Ti). The via contact 55 is formed to electrically connect the drain pad 5 and the lower electrode 35. Therefore, the first signal applied from the outside is applied to the lower electrode 35 through the transistor, the drain pad 5, and the via contact 55 embedded in the active matrix 1.

3 is a plan view of the apparatus shown in FIG. 2C arranged in M × N. Referring to FIG. 3, as described above, after forming M × N actuators 65, a metal such as copper (Cu), nickel (Ni), or gold (Au) is sputtered to form an active matrix ( Deposition at the bottom of 1) forms an ohmic contact (not shown). Then, the active matrix 1 is diced to a predetermined depth. At this time, the active matrix 1 is diced into a predetermined shape to a depth of about 200 μm for the subsequent process. As a result, a dicing line 75 having a rectangular shape is formed. Subsequently, after the photoresist 70 is applied to the entire surface (parts A, B, and C), the pad 80 of the AMA panel connected to the pad (not shown) of TCP. The photoresist 50 of the pad 80 portion of the AMA panel is patterned to expose the pad 80 portion (part B) of the AMA panel. Subsequently, the first layer 29 is patterned using the remaining photoresist 70 as an etching mask to form a membrane 30 having a predetermined pixel shape, and then the photoresist 70 is removed. Subsequently, the sacrificial layer 20 is etched using hydrogen fluoride (HF) vapor, rinsing and drying to complete the actuator 65 as shown in FIG. 1. After cutting the active matrix 1 completely, the pad 80 of the AMA panel and the pad (not shown) of the TCP are connected to complete the manufacture of the thin film AMA module.

However, in the above-described thin film type optical path adjusting device, as shown in Fig. 4, when the active matrix 1 is first diced to a depth of about 200 μm and the photoresist 70 is applied to the entire surface of the resultant product. Since the thickness of the photoresist 70 is about 1.2 μm, the photoresist 70 may not fill the step formed in the dicing line 75. As a result, an adhesion failure of the photoresist 70 may occur at the portion of the dicing line 75, and the first layer 29 may be used as the etching mask after the first layer 29 is used as the etching mask. When the photoresist 70 was removed after patterning, the residue of the photoresist 70 was often lifted off from the dicing line 75 into the AMA panel. The lifted-off photoresist 70 rises inside the pixel and the AMA panel pad portion during cleaning of the device, causing sticking of the actuator, so that the device operates even when a signal is applied. There is a problem that does not. In addition, when the lifted-off photoresist 70 remains on the AMA panel pad, there is a problem that an electrical open occurs between the pad of the TCP and the pad of the AMA panel.

Accordingly, an object of the present invention is to prevent the phenomenon of sticking of the actuator and the sticking of the actuator and the pad between the pad of the TCP and the pad of the AMA panel by preventing the photoresist from being lifted off due to the step of the dicing line portion during etching of the sacrificial layer. It is to provide a method of manufacturing a thin film type optical path control device that can prevent the opening.

1 is a cross-sectional view of a thin film type optical path adjusting device described in the applicant's prior application.

2A to 2C are manufacturing process diagrams of the apparatus shown in FIG. 1.

3 is a plan view of the apparatus shown in FIG. 2C arranged in M × N.

4 is an enlarged cross-sectional view of a portion 'D' of FIG. 3.

5 is a plan view of the support layer of the thin film type optical path control apparatus according to the present invention.

FIG. 6 is a cross-sectional view taken along line E′E ′ of the apparatus shown in FIG. 5.

7A to 7C are manufacturing process diagrams of the apparatus shown in FIG. 6.

8A to 8B are plan views in which the apparatus shown in FIG. 5 is arranged in M × N.

* Description of the symbols for the main parts of the drawings *

100: active matrix 102: drain pad

104: protective layer 106: etch stop layer

112: support layer 114: lower electrode

116 strain layer 118 upper electrode

120: stripe 122: beer hall

124: beer contact 130: actuator

135: AMA panel pad 140: dicing line

150 photoresist

In order to achieve the above object, the present invention provides a method comprising: providing an active matrix having M × N (M, N is an integer) transistors embedded therein and a plurality of panel pads formed at a periphery thereof; On top of the active matrix, iii) forming a support layer on top of the active matrix, ii) forming a bottom electrode on top of the support layer, iii) forming a strained layer on top of the bottom electrode, And iii) forming M × N actuators each comprising forming an upper electrode on top of the strained layer; Forming a dicing line having a rectangular shape in an outer portion of the panel pad of the active matrix in which the M × N actuators are formed; After applying the photoresist on the active matrix, patterning the photoresist such that the photoresist has an area smaller than the dicing line inside the dicing line on the active matrix; And it provides a method of manufacturing a thin film type optical path control device comprising the step of cutting the active matrix along the dicing line.

In the above-described thin film type optical path control apparatus according to the present invention, the first signal (image signal) transmitted from the outside is applied to the lower electrode through the transistor, the drain pad, and the via contact embedded in the active matrix. At the same time, a second signal (bias signal) is applied to the upper electrode from the outside. Therefore, an electric field is generated according to the potential difference between the upper electrode and the lower electrode, and the deformation layer between the upper electrode and the lower electrode causes deformation by the electric field. The strained layer contracts in a direction orthogonal to the electric field, so that the actuator including the strained layer is bent upward at a predetermined angle. The upper electrode, which also functions as a mirror that reflects light, is formed on the actuator and is inclined with the actuator. Accordingly, the upper electrode reflects the light incident from the light source at a predetermined angle, and the reflected light passes through the slit to form an image on the screen.

According to the manufacturing method of the thin film type optical path control apparatus according to the present invention, after dicing an active matrix, applying a photoresist on the active matrix, and then patterning the photoresist first, a predetermined distance from the dicing line on the active matrix The photoresist remains only on the region where the inner element is formed and the AMA panel pad portion, and by using the remaining photoresist as an etching mask to form a support layer having a predetermined pixel shape, the sacrificial layer is formed of hydrogen fluoride vapor. When etching by using, it prevents the photoresist from being lifted off due to the step in the dicing line part, thereby preventing the sticking phenomenon of the actuator and the electrical opening between the pad of the TCP and the AMA panel pad. You can prevent it.

Hereinafter, a method of manufacturing a thin film type optical path control device according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

5 is a plan view showing a thin film type optical path adjusting device according to the present invention, and FIG. 6 is a cross-sectional view taken along line E′E ′ of the device shown in FIG. 5.

5 and 6, the thin film type optical path adjusting device according to the present invention includes an active matrix 100 and an active matrix 100 in which M × N (M and N are integers) MOS transistors (not shown) are embedded. It includes an actuator 130 formed on the top.

The active matrix 100 is connected to the transistor and has a drain pad 102 formed on one side of the active matrix 100, a protective layer 104 formed on the active matrix 100 and the drain pad 102. And an etch stop layer 106 formed on the passivation layer 104.

The actuator 130, one side of the etch stop layer 106 is formed in contact with the bottom of the drain pad 102 is formed, the other side is formed in parallel with the etch stop layer 106 via the air gap 110. The support layer 112 having a cross section, the lower electrode 114 formed on the support layer 112, the strain layer 116 formed on the lower electrode 114, and the upper electrode 118 formed on the strain layer 116. And from one side of the strained layer 116 to the drain pad 102 through the strained layer 116, the lower electrode 114, the support layer 112, the etch stop layer 106, and the protective layer 104. The via contact 122 includes a via contact 124 formed to electrically connect the lower electrode 114 and the drain pad 102 to the formed via hole 122. One side of the upper electrode 118 is formed with a stripe 120 to uniformly operate the upper electrode 118 to prevent diffuse reflection of light incident from the light source.

In addition, one side of the plane of the support layer 112 has a rectangular concave portion at the center thereof, and the rectangular concave portion has a shape that widens stepwise toward both edges. The other side of the plane of the support layer 112 has a protrusion that narrows stepwise to correspond to the stepped concave portion of the support layer of the adjacent actuator. Therefore, the protrusion of the support layer 112 is formed by fitting into the concave portion of the support layer of the adjacent actuator, and the protrusion of the support layer of the actuator adjacent to the concave portion of the support layer 112 is formed. The support layer 112 performs the function of a membrane supporting the actuator of the thin film type optical path adjusting device described in the prior application.

Hereinafter, a method of manufacturing a thin film type optical path control apparatus according to a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

7A to 7C show a manufacturing process diagram of the apparatus shown in FIG. 6. 7A to 7C, the same reference numerals are used for the same members as in FIG.

Referring to FIG. 7A, a protective layer 104 is formed by using silicate glass (PSG) on top of an active matrix 100 having M × N transistors (not shown) and a drain pad 102 formed on one side thereof. )). The protective layer 104 is formed to have a thickness of about 1.0 to 2.0 µm using the chemical vapor deposition (CVD) method. The protective layer 104 prevents damage to the active matrix 100 in which the transistor is embedded due to a subsequent process.

The etch stop layer 106 is stacked on the passivation layer 104 by using nitride. The etch stop layer 106 is formed to have a thickness of about 1000 to 2000 kPa using a low pressure chemical vapor deposition (LPCVD) method. The etch stop layer 106 may prevent the protective layer 104 and the active matrix 100 having the transistor embedded therein from being etched during the subsequent etching process.

The sacrificial layer 108 is stacked on the etch stop layer 106. The sacrificial layer 108 serves to facilitate lamination to form the AMA module and is removed by hydrogen fluoride (HF) vapor after the lamination of the AMA module is complete. The sacrificial layer 108 is formed of phosphorus silicate glass (PSG) having a high concentration of phosphorus (PG) to have a thickness of about 2.0 to about 3.0 μm using an atmospheric chemical vapor deposition (APCVD) method. In this case, since the sacrificial layer 108 covers the upper portion of the active matrix 100 in which the transistor is embedded, the flatness of the surface thereof is very poor. Accordingly, the surface of the sacrificial layer 108 is planarized by using a spin on glass (SOG) method or a CMP method. Subsequently, a portion of the sacrificial layer 108 in which the drain pad 102 is formed is etched to expose a portion of the etch stop layer 106 to form a position where the support portion of the actuator 130 is to be formed.

Referring to FIG. 7B, the first layer 111 may be stacked on the exposed etch stop layer 106 and the sacrificial layer 108 to a thickness of about 0.1 μm to about 1.0 μm. The first layer 111 is formed using a low pressure chemical vapor deposition (LPCVD) method of a hard material such as nitride or metal. At this time, the first layer 111 is formed while changing the ratio of the reaction gas in the low pressure reaction vessel to control the stress in the first layer 111. The first layer 111 is later patterned into a support layer 112 having a predetermined pixel shape.

The lower electrode layer 113 is stacked on the first layer 111 by using a metal having electrical conductivity such as platinum, tantalum, or platinum-tantalum. The lower electrode layer 113 is formed to have a thickness of about 0.01 to 1.0 µm using a sputtering method or a chemical vapor deposition method. Subsequently, the lower electrode layer 113 is iso-cutted to separate the lower electrode layer 113 for each pixel. The lower electrode layer 113 is later patterned into the lower electrode 114, and the lower electrode 114 includes a transistor and a drain pad 102 in which a first signal (image signal) applied from the outside is embedded in the active matrix 100. And via contact 124.

The second layer 115 is stacked on the lower electrode layer 113 by using a piezoelectric material such as PZT or PLZT. The second layer 115 may have a thickness of about 0.1-1 .0 µm using a sol-gel method, a sputtering method, or a chemical vapor deposition (CVD) method, and preferably 0.4 µm using a sol-gel method. After forming to have a thickness of about, the piezoelectric material constituting the second layer 115 is subjected to a heat treatment by a rapid heat treatment (RTA) method to phase change. The second layer 115 is later patterned into the strained layer 116, which is strained by an electric field generated between the upper electrode 118 and the lower electrode 114.

The upper electrode layer is stacked on top of the second layer 115. The upper electrode layer is formed of a metal having electrical conductivity and reflectivity, such as aluminum, silver, or platinum, to have a thickness of about 0.01 to 1.0 탆 using a sputtering method or a chemical vapor deposition method. Next, the upper electrode layer is patterned into an upper electrode 118 having a predetermined pixel shape. At this time, when the actuator 130 deforms on one side of the upper electrode 118, the upper electrode 118 is uniformly operated so that light incident from the light source is not deformed with the deforming portion of the upper electrode 118. Stripes 120 are formed to prevent diffuse reflection at the interface of the non-parts. The second signal (image signal) is applied to the upper electrode 118 through a common electrode line (not shown) from the outside to generate an electric field according to the potential difference between the lower electrode 114 and the upper electrode 118.

Referring to FIG. 7C, the second layer 115 and the lower electrode layer 113 are patterned to form a strained layer 116 and a lower electrode 114 having a predetermined pixel shape. In this case, the strained layer 116 has a slightly larger area than the upper electrode 118, and the lower electrode 114 has a slightly larger area than the strained layer 116. Subsequently, the strained layer 116, the lower electrode 114, the first layer 111, the etch stop layer 106, and the protective layer 104 are sequentially formed from one side of the strained layer 116 to the top of the drain pad 102. The via hole 122 is formed from the strained layer 116 to the upper portion of the drain pad 102 by etching. Subsequently, a via contact 124 is formed to electrically connect the drain pad 102 and the lower electrode 114 by sputtering a metal such as tungsten, platinum, or titanium. Thus, the via contact 124 is formed vertically from the lower electrode 114 to the top of the drain pad 102 in the via hole 122. Therefore, the first signal applied from the outside is applied to the lower electrode 114 through the transistor, the drain pad 102 and the via contact 124 embedded in the active matrix 100.

8A-8B show a plan view of the arrangement of FIG. 7C arranged in M × N. Referring to FIG. 8A, a metal such as chromium, copper, or gold is deposited on the bottom of the active matrix 100 using a sputtering method or a deposition method to form an ohmic contact (not shown). Subsequently, the active matrix 100 is diced into a predetermined shape. At this time, the active matrix 100 is cut only to a predetermined depth for subsequent processing. As a result, a rectangular dicing line 140 having a depth of about 200 μm is formed. Subsequently, after the photoresist 150 is applied to the entire surface of the resultant product, the photoresist 150 is first patterned to form a predetermined distance from the dicing line 140 on the active matrix 100 (see d in FIG. 8A). The photoresist 150 remains only on the region where the element is formed and the AMA panel pad 135. Preferably, the spacing d is about 100 μm.

Conventionally, after dicing the active matrix first and applying photoresist to the entire surface of the resultant, the pad region of the AMA panel is exposed and the membrane is patterned using the photoresist as an etching mask. At this time, a step occurs in the dicing line portion on the active matrix, resulting in poor adhesion of the photoresist at this portion, and when the photoresist is subsequently etched, the photoresist at this portion is lifted off to clean the device. While the lifted-off photoresist rises inside the pixel or on the AMA panel pad. As a result, when the TCP pad is connected to the AMA panel pad, an electrical open occurs or a sticking phenomenon occurs in the actuator, thereby preventing the device from operating even when a signal is applied. In contrast, in the present invention, after the photoresist 150 is applied, the photoresist 150 is first patterned so that the photoresist 150 exists only within about 100 μm based on the dicing line 140. When the sacrificial layer 108 is removed using hydrogen fluoride vapor, a region in which the device on the active matrix 100 inside the AMA panel pad 135 and the dicing line 140 is formed in the dicing line 140 portion. The photoresist 150 may be prevented from being lifted off.

Referring to FIG. 8B, the photoresist 150 is secondarily patterned to expose the AMA panel pad 135 on the active matrix 100, and then the first photoresist 150 is used as an etch mask. The layer 111 is patterned into a support layer 112 having a predetermined pixel shape. In this case, the support layer 112 has a slightly larger area than the lower electrode 114. Subsequently, the sacrificial layer 108 is etched using hydrogen fluoride (HF) vapor to form an air gap 110 to complete the M × N actuators 130. As described above, the active matrix 100 in which the thin-film AMA element is formed is completely cut out into a quadrangular shape, and then the pad 135 of the AMA panel and the pad (not shown) of the TCP (using an ACF (not shown)) are used. By connecting, the manufacture of the thin film type AMA module as shown in FIG. 5 and FIG. 6 is completed.

In the above-described thin film type optical path control device according to the present invention, a second signal (bias signal) is applied to the upper electrode 118 through a TCP pad, an AMA panel pad 135 and a common electrode line. At the same time, the first signal (image signal) transmitted through the TCP pad and the AMA panel pad 135 is transferred to the lower electrode (through the transistor, drain pad 102 and via contact 124 embedded in the active matrix 100). 114). Thus, an electric field is generated between the upper electrode 118 and the lower electrode 114 according to a potential difference, and the deformation layer 116 between the upper electrode 118 and the lower electrode 114 causes deformation by the electric field. The strained layer 116 contracts in a direction orthogonal to the electric field, and thus the actuator 130 including the strained layer 116 is bent upward at a predetermined angle. The upper electrode 118, which also functions as a mirror that reflects light, is formed on the actuator 130 and is inclined together with the actuator 130. Accordingly, the upper electrode 118 reflects the light incident from the light source at a predetermined angle, and the reflected light passes through the slit to form an image on the screen.

According to the manufacturing method of the thin film type optical path control apparatus according to the present invention, after dicing an active matrix, applying a photoresist on the active matrix, and then patterning the photoresist first, a predetermined distance from the dicing line on the active matrix The photoresist remains only on the region where the inner element is formed and the AMA panel pad portion, and by using the remaining photoresist as an etching mask to form a support layer having a predetermined pixel shape, the sacrificial layer is formed of hydrogen fluoride vapor. When etching by using, it prevents the photoresist from being lifted off due to the step in the dicing line part, causing the actuator to stick and the electrical opening between the pad of the TCP and the AMA panel pad. Can be prevented.

As mentioned above, although the present invention has been described and illustrated in detail by the preferred embodiments, the present invention is not limited thereto, and it is possible for the person skilled in the art to modify or improve the present invention within the ordinary range.

Claims (2)

Providing an active matrix having M × N (M, N is an integer) transistors embedded therein and a plurality of panel pads formed at a peripheral portion thereof; On top of the active matrix, iii) forming a support layer on top of the active matrix, ii) forming a bottom electrode on top of the support layer, iii) forming a strained layer on top of the bottom electrode, And iii) forming M × N actuators each comprising forming an upper electrode on top of the strained layer; Forming a dicing line having a rectangular shape in an outer portion of the panel pad of the active matrix in which the M × N actuators are formed; After applying the photoresist on the active matrix, patterning the photoresist such that the photoresist has an area smaller than the dicing line inside the dicing line on the active matrix; And And cutting the active matrix along the dicing line. The method of claim 1, wherein the patterning of the photoresist further comprises patterning the photoresist again to expose the plurality of panel pads on the active matrix. .