KR19980075009A - Manufacturing method of thin film type optical path control device - Google Patents

Abstract

A method of manufacturing a thin film type optical path control apparatus capable of reducing stresses inside an actuator is disclosed. The method includes forming a passivation layer on top of an active matrix having M × N (M, N is an integer) transistors and a drain pad formed on one side thereof, and a photocurrent blocking layer on top of the passivation layer. forming a photo current barrier layer, forming a low stress layer on top of the photocurrent blocking layer, and forming a support layer, a lower electrode, a strain layer, and an upper electrode on top of the low stress layer. Including forming an actuator. According to the method, it is possible to simultaneously perform the function of the protective layer which prevents the transistor embedded in the active matrix from being damaged during the subsequent process and the function of the anti-etching layer which prevents the active matrix from being etched and damaged. By forming a low stress layer, it is possible to reduce the number of thin films to be laminated to reduce the stress formed between the thin films, to prevent buckling of the blocking layer to facilitate the planarization of the top of the active matrix, and subsequently It is possible to improve the control characteristics of the actuator to be formed.

Description

Manufacturing method of thin film type optical path control device

The present invention relates to a method for manufacturing AMA (Actuated Mirror Arrays), which is a thin film type optical path control device, and more specifically, to form a low stress layer (low stress layer) to reduce the number of thin films formed on the active matrix between the thin films In the manufacturing method of the thin film type optical path control device that can minimize the stress generated, and to prevent the buckling of the blocking layer to facilitate the planarization of the upper active matrix, thereby improving the control characteristics of the actuator formed subsequently. It is about.

An optical path adjusting device or an optical modulator capable of adjusting the light flux may be variously applied to optical communication, image processing, and information display apparatus. In general, such devices are classified into two types according to their optical properties. One type is a direct view type image display device, such as a CRT (Cathode Ray Tube), and the other type is a projection type image display device, a liquid crystal display (LCD), a deformable mirror device (DMD), or an AMA. And the like. Although the CRT apparatus has excellent image quality, the weight and volume of the CRT apparatus increases, leading to an increase in manufacturing cost. On the other hand, the liquid crystal display (LCD) has a simple optical structure and can be formed thin so that the weight can be reduced and the volume can be reduced. However, the liquid crystal display device is inferior in efficiency to have a light efficiency of 1 to 2% due to polarization of light, has a disadvantage in that the response speed of the liquid crystal material is slow and the inside thereof is easily overheated.

Therefore, an image display device such as AMA or DMD has been developed to solve the above problem. Currently, AMA can achieve a light efficiency of 10% or more, compared to a DMD having a light efficiency of about 5%. The AMA is a device that can adjust the luminous flux so that each of the mirrors installed therein reflects the light flowing from the light source at a predetermined angle, and the reflected light passes through a slit to form an image on the screen. . Therefore, the structure and operation principle thereof are simple, and high light efficiency can be obtained compared to a liquid crystal display device or a DMD. In addition, the contrast can be improved to obtain a bright and clear image. The image is not affected by the polarity of the incident light beam and does not affect the polarity of the reflected light beam.

The mirrors embedded in the AMA are arranged to correspond to the slits, and the mirrors are inclined by an electric field generated inside the actuator. Therefore, the luminous flux incident from the light source is adjusted at a predetermined angle to form an image on the screen. In general, each actuator causes deformation in accordance with the electric field generated by the applied electric image signal and the bias voltage. When the actuator causes deformation, each of the mirrors mounted on top of the actuator is inclined. Accordingly, the inclined mirrors can reflect light incident from the light source at a predetermined angle. Piezoelectric materials such as PZT (Pb (Zr, Ti) O ₃ ) or PLZT ((Pb, La) (Zr, Ti) O ₃ ) are used as a constituent material of the deformable portion for driving the respective mirrors. In addition, a warping material such as PMN (Pb (Mg, Nb) O ₃ ) can be used as a constituent material of the deformation portion.

AMA, which is an optical path control device, is classified into a bulk device and a thin film device. The bulk optical path control device is disclosed, for example, in US Pat. Nos. 5,085,497 (issued to Gregory Um, et al.), 5,159,225 (issued to Gregory Um), 5,175,465 (issued to Gregory Um, et al.). It is. The bulk optical path adjusting device is to cut a thin layer of multilayer ceramic, mount a ceramic wafer having a metal electrode formed therein in an active matrix in which a transistor is built, and then process it by sawing and then It is constructed by installing a mirror. However, since the bulk light path control device must separate the actuators by a sawing method, high precision is required in design and manufacturing, and the response speed of the deformation part is slow. Therefore, a thin film type optical path control apparatus that can be manufactured using a semiconductor manufacturing process has been developed.

Such a thin film type optical path control device is disclosed in Patent Application No. 96-25324 (name of the invention: a method of manufacturing a thin film type optical path control device) filed by the applicant of the Korean Patent Office on June 28, 1996.

FIG. 1 shows a plan view of the thin film type optical path adjusting device described in the above prior application, and FIG. 2 shows a cross-sectional view taken along the line AA ′ of the device shown in FIG. 1.

As shown in FIG. 1 and FIG. 2, the thin film type optical path adjusting device includes an active matrix having M × N (M, N is an integer) metal oxide semiconductor (MOS) transistors (not shown) embedded therein. ) And an actuator 40 formed on the active matrix 31.

The active matrix 31 is formed on the diffusion barrier layer 35 formed on the active matrix 31, the blocking layer 37 formed on the diffusion barrier layer 35, and one side of the blocking layer 37. The drain pad 39, a protective layer 41 formed on a portion of the upper portion of the blocking layer 37 except for a portion where the drain pad 39 is formed, and an upper portion and a drain pad 39 of the protective layer 41. It includes an etch stop layer 43 formed on the top.

The actuator 40 includes a membrane 47, a lower electrode 51 formed on an upper portion of the membrane 47, a deformation portion 53 formed on an upper portion of the lower electrode 51, the deformation portion 53, and a lower portion. The via contact 49 includes a via contact 49 formed vertically through the electrode 51 and the membrane 47, and an upper electrode 55 formed on the deformable portion. One side of the membrane 47 is in contact with an upper portion of the etch stop layer 43 having a drain pad 39 formed at the bottom thereof, and the other side of the membrane 47 is interposed with the etch stop layer 43 through an air gap 45. It is formed to be horizontal.

In addition, referring to FIG. 1, one side of the membrane 47 has a rectangular concave portion at a central portion thereof, and the rectangular concave portion has a shape widening stepwise toward both edges. The other side of the membrane 47 has a projection that narrows stepwise to correspond to the stepped concave portion of the membrane of the adjacent actuator. Thus, the protrusion of the membrane 47 is formed by fitting into the concave portion of the adjacent membrane, and the protrusion of the membrane adjacent to the concave portion of the membrane 47 is formed.

Referring to FIG. 2, the via contact 49 having a groove formed in a central portion of the via contact 49 may be connected to the drain pad through the lower electrode 51, the membrane 47, and the etch stop layer 43 from an upper portion of the deformable portion 53. Up to 39). In addition, a stripe 57 is formed at a central portion of the upper electrode 55 to expose a portion of the deformable portion 53.

Hereinafter, a manufacturing method of the thin film type optical path control device will be described.

3A to 3E are manufacturing process diagrams of the thin film type optical path adjusting device described above. 3A to 3E, the same reference numerals are used for the same members as in FIG.

Referring to FIG. 3A, a diffusion barrier layer 35 is formed on an active matrix 31 formed of a semiconductor such as silicon (Si) and having M × N transistors (not shown). The diffusion barrier layer 35 is formed to have a thickness of about 300 to 500 kPa using titanium (Ti) by the sputtering method. The diffusion barrier layer 35 prevents silicon in the active matrix 31 from diffusing upwards under the influence of a subsequent process.

The blocking layer 37 is formed on the diffusion barrier layer 35. The barrier layer 37 is formed to have a thickness of about 1200 to 1500 kPa using titanium nitride (TiN) by using a low pressure chemical vapor deposition (LPCVD) method or a sputtering method. Subsequently, the deposited titanium nitride is heat-treated at a temperature of 800 to 900 ° C., preferably 850 ° C. for 5 to 10 minutes, preferably 10 minutes to convert delta-titanium nitride (δ-TiN) into cubic titanium nitride. Phase change to). Since the blocking layer 37 is incident on not only the upper electrode 55 where the light beam incident from the light source is the reflective layer but also the part except the portion where the upper electrode 55 is formed, the photocurrent is applied to the active matrix 31. Is prevented from flowing and silicon is prevented from diffusing into the drain pad 39 from inside the active matrix 31.

Referring to FIG. 3B, a protection layer 41 is formed on the blocking layer 37 to protect the active matrix 31 having the transistor embedded therein. The protective layer 41 is formed to have a thickness of about 1.0 μm using Phosphor-Silicate Glass (PSG) by chemical vapor deposition (CVD). Subsequently, a part of the protective layer 41 is etched to expose a part of the blocking layer 37, and then the drain pad 39 is lifted off using a lift-off method of a metal such as tungsten (W). To form. The drain pad 39 transfers the image signal generated from the transistor embedded in the active matrix 31 to the lower electrode 51 through the via contact 49.

An etch stop layer 43 is formed on the passivation layer 41 and the drain pad 39. The etch stop layer 43 is formed to have a thickness of about 2000 kPa using a low pressure chemical vapor deposition method (LPCVD). The etch stop layer 43 prevents the active matrix 31 and the protective layer 41 from being etched and damaged.

Subsequently, a sacrificial layer 46 is formed on the etch stop layer 43. The sacrificial layer 46 is formed of phosphorous silicate (PSG) to have a thickness of about 1.0 μm using an Atmospheric Pressure CVD (APCVD) method. At this time, since the sacrificial layer 46 made of in-silicate glass covers the surface of the active matrix 31 in which the transistor is embedded, the surface flatness is very poor. Therefore, the surface of the sacrificial layer 46 is planarized using a chemical mechanical polishing (CMP) method or a method using spin on glass (SOG).

Subsequently, a part of the anti-etching layer 43 is exposed by etching a portion of the sacrificial layer 46 in which the drain pad 39 is formed by using a dry etching method and a wet etching method.

Referring to FIG. 3C, the membrane 47 is formed on the exposed etch stop layer 43 and on the sacrificial layer 46 using nitride or the like. The membrane 47 is formed such that nitride or the like has a thickness of about 1.0 to about 2.0 μm using a low pressure chemical vapor deposition method (LPCVD).

Subsequently, a lower electrode 51 is formed on the membrane 47 so as to have a thickness of about 500 to 2000 kPa by sputtering a metal such as platinum or tantalum (Ta). An image signal generated from a transistor embedded in the active matrix 31 is applied to the lower electrode 51. The lower electrode 51 is etched and patterned by a dry etching method in order to separate each pixel.

Referring to FIG. 3D, a deformation part 53 is formed to cause deformation as an electric field is generated on the lower electrode 51. The deformable portion 53 is formed to have a thickness of about 1.0 to 2.0 µm using piezoelectric ceramics such as PZT or PLZT. The deformable portion 53 is formed by using a sol-gel method, and then heat-transformed using a rapid thermal annealing (RTA) method to phase change.

The upper electrode 55 is formed on the deformation part 53. The upper electrode 55 is formed of a metal having excellent electrical conductivity and reflective properties such as aluminum or platinum so as to have a thickness of about 500 to 2000 mW using a sputtering method. Since the upper electrode 55 made of aluminum or platinum has excellent electrical conductivity and reflection characteristics, the upper electrode 55 performs not only a function of a bias electrode but also a function of a reflective layer reflecting an incident light beam.

After the upper electrode 55 is formed, a stripe 57 is formed at the center of the upper electrode 55 by using a sawing method on the upper electrode 55 to increase light efficiency. The stripe 57 uniformly operates the upper electrode 55 to prevent diffuse reflection of the luminous flux.

Referring to FIG. 3E, the deformable portion 53, the lower electrode 51, the membrane 47, the etch stop layer 43, and the protective layer 41 are sequentially etched from the top, and then tungsten, titanium, or the like. The metal is formed using the lift-off method to form the via contact 49. Accordingly, the via contact 49 is vertically formed from the upper portion of the deformable portion 53 to the upper portion of the drain pad 39 to electrically connect the drain pad 39 and the lower electrode 51. The sacrificial layer 46 is etched by dry etching using hydrogen fluoride (HF) vapor, and then washed and dried to complete an AMA device.

In the above-described thin film type optical path adjusting device, the image signal generated from the transistor embedded in the active matrix is applied to the lower electrode through the drain pad and the via contact. In addition, a bias voltage is applied to the upper electrode, and an electric field is generated between the upper electrode and the lower electrode. The deformed portion formed between the upper electrode and the lower electrode causes deformation by this electric field. The deformation part contracts in the direction perpendicular to the electric field, so that the actuator is bent in the direction opposite to the direction in which the membrane is formed. The upper electrode formed on the upper portion of the deformed portion is inclined at a predetermined angle as the actuator is bent, and reflects the incident light beam to form an image.

However, in the thin film type optical path control device described in the preceding application, a plurality of layers, such as a protective layer, an etch stop layer, a sacrificial layer, and the like are stacked on top of a blocking layer which functions to prevent photo current from flowing in an active matrix. As a result, stress is generated between the thin films and is unevenly distributed. Accordingly, stress is concentrated on the blocking layer, and the blocking layer is bent, so that all the thin films stacked thereon are broken. Further, the thin films deposited subsequently due to the step on top of the active matrix are deposited according to the imbalance of the topology of the active matrix. That is, when stacking thin films on top of the active matrix, an unbalance occurs in the shape (particularly flatness) of the thin films. Therefore, there is a problem in that the actuator characteristic of the actuator which causes deformation according to the electric field is deteriorated because the actuator is not accurately formed in a horizontal state.

Accordingly, an object of the present invention is to reduce the number of thin films to be laminated by depositing a low stress layer capable of simultaneously performing the functions of a protective layer and an etch stop layer in the thin film type optical path control device described in the preceding application. It is possible to reduce the stress generated between the thin films, to prevent the bending of the blocking layer, and to facilitate the planarization of the upper active matrix to improve the cantilever (cantilever) characteristics of the subsequently formed actuator of the thin film type optical path control device It is to provide a manufacturing method.

1 is a plan view of a thin film type optical path adjusting device described in the applicant's prior application.

FIG. 2 is a cross-sectional view taken along line A′A ′ of the apparatus shown in FIG. 1.

3A to 3E are manufacturing process diagrams of the apparatus shown in FIG.

4 is a plan view of a thin film type optical path control apparatus according to the present invention.

FIG. 5 is a cross-sectional view taken along line B′B ′ of the apparatus shown in FIG. 4.

6A to 6E are manufacturing process diagrams of the apparatus shown in FIG.

Explanation of symbols for the main parts of the drawings

100: active matrix 105: drain pad

110: protective layer 115: photocurrent blocking layer

120: low stress layer 125: sacrificial layer

130: support layer 135: lower electrode

140: strained layer 145: upper electrode

150: beer hall 155: beer contact

160: stripe 165: air gap

200: actuator

In order to achieve the above object, the present invention is a step of forming a passivation layer (passivation layer) on the top of the active matrix is built in M × N (M, N is an integer) transistor and the drain pad is formed on one side, the protective layer Forming a photo current barrier layer on top of the photocurrent barrier; forming a low stress layer on top of the photocurrent barrier layer; and a support layer, a lower electrode, a strained layer on top of the low stress layer. It provides a method of manufacturing a thin film type optical path control apparatus for forming an actuator, including forming an upper electrode.

In the above-described thin film type optical path control device according to the present invention, a bias current signal is applied to the upper electrode. At the same time, the image current signal applied from the outside is applied to the lower electrode through the transistor, the drain pad, and the via contact embedded in the active matrix. Therefore, an electric field is generated between the upper electrode and the lower electrode, and the strained layer between the upper electrode and the lower electrode causes deformation by this electric field. At this time, since the strained layer shrinks in a direction perpendicular to the electric field, the actuator including the strained layer is bent at a predetermined angle according to the magnitude of the applied electric field. Therefore, since the upper electrode which performs the function of the mirror which reflects a light beam is formed in the upper part of an actuator, it inclines at a predetermined angle with an actuator. Accordingly, the upper electrode reflects the light beam incident from the light source at a predetermined angle, and the reflected light beam passes through the slit to form an image on the screen.

Therefore, the manufacturing method of the thin film type optical path control device according to the present invention by forming a low stress layer (low stress layer) that can simultaneously perform the function of the protective layer and the etch stop layer in the thin film type optical path control device described in the preceding application, It is possible to reduce the stress formed between the thin films by reducing the number of stacked thin films, and to prevent buckling of the blocking layer to facilitate flattening the top of the active matrix.

Hereinafter, a method of manufacturing a thin film type optical path control device according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

4 is a plan view of a thin film type optical path control device according to an embodiment of the present invention, Figure 5 is a cross-sectional view taken along the line B 'B' of the device shown in FIG.

As shown in Figure 4 and 5, the thin film type optical path control apparatus according to the present invention has M × N (M, N is an integer) transistor (not shown) is built therein and drain pad (drain pad) on the upper side An active matrix 100 in which the 105 is formed and an actuator 200 formed on the active matrix 100 are included.

The active matrix 100 may include a passivation layer 110 formed on the active matrix 100, a photo current barrier layer 115 formed on the passivation layer 110, and a photocurrent. And a low stress layer 120 formed on the blocking layer 115.

The actuator 200 has a support layer in which one side thereof is in contact with the upper portion of the low stress layer 120 and the other side is stacked in parallel with the low stress layer 120 via an air gap 165. 130, the bottom electrode 135 stacked on top of the support layer 130, the active layer 140 stacked on top of the lower electrode 135, and the strained layer 140. The upper electrode 145 stacked on the upper side, the strained layer 140, the lower electrode 135, the support layer 130, the low stress layer 120, and the protective layer 110 from the other side of the strained layer 140. The via hole 150 includes a via hole 150 formed vertically through the drain pad 105, and a via contact 155 formed inside the via hole 150.

In addition, referring to Figure 4, one side of the support layer 130 has a concave portion of the rectangular shape in the center, the rectangular concave portion has a shape that widens stepwise toward both edges. The other side of the support layer 130 has a protrusion that narrows stepwise to correspond to the stepped concave portion of the support layer of the adjacent actuator. Thus, the protrusion of the support layer 130 is formed by inserting into the concave portion of the adjacent support layer, the protrusion of the support layer adjacent to the concave portion of the support layer 130 is formed.

The via contact 155 is formed from an upper portion of the strained layer 140 to an upper portion of the drain pad 105 through a lower electrode 135, a support layer 130, a low stress layer 120, and a protective layer 110. do. In addition, a stripe 160 is formed at the center of the upper electrode 145.

6A to 6E are manufacturing process diagrams of the apparatus shown in FIG. 6A to 6E, the same reference numerals are used for the same members as in FIG.

Referring to FIG. 6A, an M × N MOS transistor (not shown) is formed in a semiconductor such as silicon (Si) and the like, and a drain pad 105 is formed on one side of the active matrix 100. The protective layer 110 is formed. The passivation layer 110 is formed to have a thickness of about 8000 GPa using a silicate glass (PSG) method using a chemical vapor deposition (CVD) method. The protective layer 110 prevents the transistor embedded in the active matrix 100 from being damaged during subsequent processing.

The photocurrent blocking layer 115 is formed on the protective layer 110. In order to form the photocurrent blocking layer 115, a first layer of titanium metal is first deposited using a sputtering method, and then titanium nitride (TiN) is deposited on the first layer using a physical vapor deposition method. The second layer is laminated. The photocurrent blocking layer 115 including the first layer and the second layer is formed to have a thickness of about 2000 mA. Since the photocurrent blocking layer 115 is incident on not only the upper electrode 145 which is the reflecting layer but the light flux incident from the light source, but also on a portion other than the portion where the upper electrode 145 is formed, the photocurrent is applied to the active matrix 100. ) To prevent flow. Subsequently, in the subsequent process, the portion of the photocurrent blocking layer 115 on which the via contact 155 is to be formed is etched and patterned.

Referring to FIG. 6B, the low stress layer 120 is formed on the photocurrent blocking layer 115 to protect the active matrix 100 having the transistor embedded therein. The low stress layer 120 is formed of nitride to a thickness of 1500 to 2500 kPa, preferably about 2000 kPa, using low pressure chemical vapor deposition (LPCVD). The low stress layer 120 is a sacrificial layer 125 stacked in a subsequent process, with the function of the protective layer described in the preceding application, that is, preventing the transistor embedded in the active matrix from being damaged during the subsequent process. When etching, the active matrix 100 simultaneously performs a function of an etch stop layer to prevent the active matrix 100 is etched and damaged. The deposition conditions of the nitride constituting the low stress layer 120 is from 0.01 to 1. Under the pressure of 0 torr, the silane dichloride (SiH ₂ Cl ₂ : DCS) to ammonia (NH ₃ ) is adjusted at a ratio of 4: 1 to 8: 1 to form a low stress layer 120 at a temperature of 750 to 850 ° C. .

Conventionally, two layers of a protective layer and an etch stop layer are laminated, but in the present invention, by forming the low stress layer 120 using nitride as described above, the overall process may be reduced, thereby simplifying the manufacturing process. In addition, since the number of stacked thin films may be reduced, stress induced in the photocurrent blocking layer 115 may be reduced to prevent the photocurrent blocking layer 115 from bending. Accordingly, the planarization of the upper portion of the active matrix 100 may be facilitated, and the tilting characteristics of the subsequently formed actuator 200 may be improved.

Subsequently, a sacrificial layer 125 is stacked on the low stress layer 120. The sacrificial layer 125 is formed of a silicate glass (PSG) so as to have a thickness of about 2 ~ 3.0㎛ by the atmospheric pressure chemical vapor deposition (APCVD) method. In this case, since the sacrificial layer 125 covers the upper portion of the active matrix 100 in which the transistor is embedded, the flatness of the surface thereof is very poor. Accordingly, the surface of the sacrificial layer 125 is planarized by using a spin on glass (SOG) method or a chemical mechanical polishing (CMP) method. Subsequently, the sacrificial layer 125 is etched to expose a portion of the low stress layer 120 in which the drain pad 105 is formed.

Referring to FIG. 6C, the support layer 130 is stacked on the exposed low stress layer 120 and the sacrificial layer 125. The support layer 130 is formed to have a thickness of about 0.1 to 1.0 μm using a low pressure chemical vapor deposition (LPCVD) method.

Subsequently, a lower electrode 135, which is a signal electrode, is stacked on the support layer 130. The lower electrode 135 has a metal such as platinum, tantalum, or platinum-tantalum (Pt-Ta) by using a sputtering method. It is formed to have a thickness of about 0㎛.

The strained layer 140 is stacked on the lower electrode 135. The strained layer 140 is formed into a piezoelectric material such as PZT or PLZT by using a sol-gel method, a sputtering method, or a chemical vapor deposition (CVD) method, in a range of 0.1 to 1.0 µm, preferably about 0.4 µm. It is formed to have a thickness of. Subsequently, the strained layer 140 is subjected to a heat treatment by a rapid heat treatment (RTA) method to phase change. The strained layer 140 is deformed by an electric field generated between the upper electrode 145 and the lower electrode 135.

The upper electrode 145 is stacked on top of the strained layer 140. The upper electrode 145 uses a sputtering method for a metal such as aluminum, silver, or platinum, from 0.01 to 1. It is formed to have a thickness of about 0㎛. The upper electrode 145 is applied with a bias current signal as a common electrode. Therefore, when an image signal current is applied to the lower electrode 135 and a bias current signal is applied to the upper electrode 145, an electric field is generated between the upper electrode 145 and the lower electrode 135. The deformation layer 140 causes deformation. Since the upper electrode 145 made of aluminum, silver, platinum, or the like has excellent electrical conductivity and reflection characteristics, the upper electrode 145 performs not only a function of a bias electrode but also a mirror reflecting an incident light beam.

Subsequently, the upper electrode 145, the strained layer 140, and the lower electrode 135 are sequentially patterned from a top of the upper electrode 145 into a predetermined pixel shape. That is, after forming a photo resist layer (not shown) on the upper electrode 145, the upper electrode 145 is patterned. At this time, the stripe 160 is formed in the center of the upper electrode 145. The stripe 160 operates the upper electrode 145 uniformly to prevent diffuse reflection of the light beam incident from the light source. Subsequently, after forming the photoresist layer (not shown) on the upper electrode 145 and the strained layer 140, the strained layer 140 is patterned. In the same manner as described above, the lower electrode 135 is also sequentially patterned into a predetermined pixel shape. At this time, Iso-cutting is performed to separate the lower electrode 135 for each pixel.

Referring to FIG. 6D, a via hole is sequentially etched from one side of the strained layer 140 by etching the strained layer 140, the lower electrode 135, the support layer 130, the low stress layer 120, and the protective layer 110. 150 is formed. Thus, the via hole 150 is vertically formed from one side of the strained layer 140 to the drain pad 105. Next, the via contact 155 is formed of a metal having excellent electrical conductivity such as tungsten (W), aluminum, or titanium (Ti) using a sputtering method. The via contact 155 is electrically connected to the drain pad 105 and the lower electrode 135. Therefore, the image current signal applied from the outside is applied to the lower electrode 135 through the transistor, the drain pad 105 and the via contact 155 embedded in the active matrix 100. Subsequently, the support layer 130 is patterned into a predetermined pixel shape using a method similar to the method of patterning the lower electrode 135.

Referring to FIG. 6E, the sacrificial layer 125 is etched using hydrogen fluoride (HF) vapor to form an air gap 165, and then cleaned and dried to complete the actuator 200. Then, a rinse and dry treatment is performed to remove the remaining etching solution to complete the AMA device.

As described above, after completing the M × N thin film type AMA devices, the active matrix 100 may be sputtered or evaporated on a metal such as chromium (Cr), nickel (Ni), or gold (Au). Is deposited at the bottom of the to form an ohmic contact (not shown). Then, a tape carrier package (TCP) (not shown) for applying a bias current signal to a subsequent upper electrode 145, which is a common electrode, and an image current signal to a lower electrode 135, which is a signal electrode, is bonded. In contrast, the active matrix 100 is cut to a predetermined thickness using a conventional photolithography method. Subsequently, a photoresist layer (not shown) is formed on the pad of the AMA panel so that the pad of the AMA panel (not shown) has a sufficient height in preparation for TCP bonding. Subsequently, a portion of the photoresist layer on which the pad is formed is patterned to expose the pad of the AMA panel. Subsequently, the photoresist layer is etched using a dry etching method or a wet etching method, and the active matrix 100 is completely cut into a predetermined shape, and then the pads of the AMA panel and the TCP pads are ACF (Anisotropic Conductive Film). (Not shown) to complete the manufacture of the thin film AMA module (module).

In the above-described thin film type optical path control device according to the present invention, the image current signal transmitted through the pad of the TCP and the pad of the AMA panel is a transistor, drain pad 105 and via contact 155 embedded in the active matrix 100. It is applied to the lower electrode 135 which is a signal electrode through. At the same time, a bias current signal is applied to the upper electrode 145, which is a common electrode, to generate an electric field between the upper electrode 145 and the lower electrode 135. Due to this electric field, the strained layer 140 formed between the upper electrode 145 and the lower electrode 135 causes deformation. At this time, since the strained layer 140 contracts in a direction perpendicular to the electric field, the actuator 200 including the strained layer 140 is bent at a predetermined angle according to the magnitude of the applied electric field. Since the upper electrode 145, which also functions as a mirror that reflects the light beam, is formed on the actuator 200, the upper electrode 145 is inclined together with the actuator 200. Accordingly, the upper electrode 145 reflects the light beam incident from the light source at a predetermined angle, and the reflected light flux passes through the slit to form an image on the screen.

According to the manufacturing method of the thin film type optical path control apparatus according to the present invention, unlike the previous application, by forming a low stress layer capable of simultaneously performing the function of the protective layer and the etch stop layer, the number of thin films stacked on the active matrix It can be reduced to reduce the stress formed between the thin films. Therefore, it is possible to prevent the bending of the blocking layer due to the stress between the thin films to facilitate the planarization of the active matrix. As a result, the flatness of the subsequently formed actuator can be improved, so that the actuator's conveyor characteristics can be improved. Furthermore, the overall manufacturing process can be simplified because the number of thin films deposited on top of the barrier layer is reduced.

As described above, although described with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified without departing from the spirit and scope of the invention described in the claims below. And can be changed.

Claims (7)

Forming a passivation layer on an active matrix having M × N (M, N is an integer) transistors and a drain pad formed on one side thereof; Forming a photo current barrier layer on the protective layer; Forming a low stress layer on the photocurrent blocking layer; And And forming a support layer, a lower electrode, a strained layer, and an upper electrode on the low stress layer to form an actuator. The method of claim 1, wherein the forming of the actuator comprises: stacking a sacrificial layer on top of the low stress layer and patterning the sacrificial layer to expose a portion of the low stress layer under which the drain pad is formed. Method of manufacturing a thin film type optical path control device, characterized in that carried out after the step. The method of claim 2, wherein the forming of the actuator comprises: i) laminating a support layer on top of the exposed low stress layer and on top of the sacrificial layer, ii) laminating a lower electrode on top of the support layer, Iii) laminating a strained layer on top of the lower electrode, iii) forming an upper electrode on the strained layer, and iii) patterning the upper electrode, the strained layer, the lower electrode and the support layer. The manufacturing method of the thin film type optical path control apparatus, further comprising the step. The method of claim 1, wherein the forming of the low stress layer is performed using nitride. The method of claim 4, wherein the forming of the low stress layer is performed using a low pressure chemical vapor deposition (LPCVD) method to have a thickness of 1500 kPa to 2500 kPa. The method of claim 5, wherein the forming of the low stress layer is performed at a temperature of 750 ° C. to 850 ° C. under a pressure of 0.1 tor to 1.0 tor. The method of claim 1, wherein the forming of the low stress layer is performed using a nitride having a ratio of 4: 1 to 8: 1 of dichlorosilane (SiH ₂ Cl ₂ : DCS) to ammonia (NH ₃ ). The manufacturing method of the thin film type optical path control apparatus characterized by the above-mentioned.