KR19980073617A - Transistor Manufacturing Method - Google Patents

Abstract

The present invention relates to a transistor manufacturing method, and by using the gate electrode photosensitive film pattern as an ion implantation buffer layer in the process of forming the LDD structure, a separate ion implantation buffer layer forming process is not required, thereby simplifying the process, and also by ion implantation. A method of fabricating a transistor is disclosed so that damage to the transistor portion due to damage can be prevented.

Description

Transistor manufacturing method

The present invention relates to a method for manufacturing a transistor, and more particularly, to a method for manufacturing a transistor of a semiconductor device having a lightly doped drain (LDD) structure.

In general, a hot carrier degradation occurs during operation of the device due to the size reduction of the transistor due to the high integration of the semiconductor device. In order to prevent such a phenomenon, the junction region of the transistor is formed in the LDD structure. A transistor manufacturing method having a conventional LDD structure will be described with reference to FIGS. 1A to 1F as follows.

1A is a cross-sectional view of a state in which the gate oxide film 3 and the polysilicon layer 4 are sequentially formed on the silicon substrate 1 on which the field oxide film 2 is formed.

FIG. 1B is a cross-sectional view of a state in which the photosensitive film 5 is applied onto the polysilicon layer 4 and then the photosensitive film 5 is patterned by an exposure and development process using a mask.

1C is a cross-sectional view of a state in which the gate electrode 4 is formed by patterning the polysilicon layer 4 by an etching process using the patterned photoresist film 5 as an etching mask.

FIG. 1D is a cross-sectional view of the oxide film 6 formed on the entire structure including the gate electrode 4 by performing a thermal oxidation process after removing the photosensitive film 5.

FIG. 1E shows a low concentration impurity region 7 in the silicon substrate 1 on both sides of the gate electrode 4 by a low concentration impurity ion (for example, N ⁻ type) implantation process using the oxide film 6 as an ion implantation buffer layer. ) Is a cross-sectional view of the formed state.

FIG. 1F is a cross-sectional view of the junction region 9 having an LDD structure formed by forming an insulating film spacer 8 on both sidewalls of the gate electrode 4 and then implanting a high concentration impurity ion (for example, an N + type).

However, in the case of using the conventional transistor manufacturing method as described above, since the size of the device is reduced according to the reduction of the design rule, the change of electrical parameters such as threshold voltage is severely generated by the thermal oxidation process. As a result, the electrical characteristics of the device are degraded. Therefore, in order to prevent this, a thermal oxidation process is omitted. In this case, a step of the process is complicated because a separate mask layer used as a buffer layer must be formed during ion implantation.

Accordingly, an object of the present invention is to provide a method for manufacturing a transistor that simplifies the process by using a photosensitive film as an ion implantation buffer layer during low concentration ion implantation.

According to another aspect of the present invention, there is provided a method of manufacturing a transistor, the method including: forming a gate electrode by an etching process using a photosensitive film pattern; Forming a low concentration impurity region on the silicon substrate on both sides of the gate electrode by a low concentration impurity ion implantation process using the photoresist pattern as an ion implantation buffer layer; Forming an insulating film on the entire structure after removing the photoresist pattern; Forming an spacer on both sidewalls of the gate electrode by etching the insulating layer, and then forming a high concentration impurity region on the silicon substrate by a high concentration impurity ion implantation process.

1A to 1F are cross-sectional views of devices for explaining a conventional transistor manufacturing method.

2A to 2E are cross-sectional views of devices for explaining the transistor manufacturing method according to the present invention.

Explanation of symbols for main parts of the drawings

1 and 11: silicon substrate 2 and 12: field oxide film

3 and 13: gate oxide film 4 and 14: gate electrode

5 and 15: photosensitive film 6: oxide film

7 and 17: low concentration impurity regions 8 and 16B: insulating film spacer

9 and 18: high concentration impurity region 10 and 20: junction region

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

2A through 2E are cross-sectional views illustrating a method of manufacturing a transistor according to the present invention.

2A is a cross-sectional view of a state in which the gate oxide film 13 and the polysilicon layer 14 are sequentially formed on the silicon substrate 11 on which the field oxide film 12 is formed.

FIG. 2B is a cross-sectional view of the photosensitive film 15 coated on the polysilicon layer 14 and then patterned on the photosensitive film 15 by an exposure and development process using a mask, wherein the photosensitive film 15 has a thickness of 9500 to 9700 kPa. To form.

FIG. 2C illustrates that the polysilicon layer 14 of the exposed portion is patterned by the etching process using the patterned photosensitive film 15 as an etching mask to form the gate electrode 14, and then the patterned photosensitive film 15 is ion implanted buffer layer. The low concentration impurity region 17 is formed in the silicon substrate 11 on both sides of the gate electrode 14 by a low concentration impurity ion (for example, N ⁻ ) implantation step.

FIG. 2D is a cross-sectional view of the insulating film 16 formed on the entire structure after the photosensitive film 15 is removed.

2E shows that the insulating film 16 is etched by a spacer etching process to form spacers 16B on both side walls of the gate electrode 14, and then the highly doped impurity region 18 is formed by implanting high concentration impurity ions (eg, N ⁺ type). This is a cross-sectional view of the LDD structure in which the junction region 20 formed of the low concentration impurity region 17 and the high concentration impurity region 18 is thus formed.

On the other hand, when a thermal process is required to compensate for the damage occurring after the etching process of the polysilicon layer 14 for the gate electrode and the removal process of the photosensitive film 15, the insulating film deposition process for forming a spacer may be performed using any one of O ₂ and N ₂ gases. It can be done in place of the thermal process. The heat treatment process may be performed in a selected process before and after the deposition of the insulating film.

As described above, the low concentration impurity ion implantation process is replaced by a photosensitive film used as an etching mask for forming a gate electrode, so that a separate ion implantation buffer layer forming process is not required, so the process can be simplified, thereby reducing raw materials and reducing production time. There is.

Claims (2)

In the transistor manufacturing method, Forming a gate electrode by an etching process using a photoresist pattern; Forming a low concentration impurity region on the silicon substrate on both sides of the gate electrode by a low concentration impurity ion implantation process using the photoresist pattern as an ion implantation buffer layer; Forming an insulating film on the entire structure after removing the photoresist pattern; And forming a spacer on both sidewalls of the gate electrode by etching the insulating layer, and then forming a high concentration impurity region on the silicon substrate by a high concentration impurity ion implantation process. The method of claim 1, wherein when a thermal process is required to compensate for damage occurring after the photoresist pattern is removed, heat is generated in an atmosphere of any one of N ₂ and O ₂ gases during the insulating film forming process and a selected process before and after the forming process. Transistor manufacturing method comprising performing the process