KR19980056156A - Semiconductor package - Google Patents

Abstract

The present invention relates to a semiconductor package, comprising: a pattern film having the same size as a wafer including a plurality of semiconductor chips and provided with an electrical connection means, first and second semiconductor chips attached to the top and bottom of the pattern film, and It consists of a lead frame connected to the edge part of a pattern film.

Description

Semiconductor package

TECHNICAL FIELD The present invention relates to a semiconductor package, and more particularly, to a stack chip package capable of achieving large capacity and miniaturization.

In general, each semiconductor chip on which an integrated circuit is formed is sent to an assembly process and packaged through a process such as chip cutting, chip attaching, wire bonding, molding, and trimming / forming. The out lead of the lead frame, which is a signal transmission path, has a shape protruding to the outside of the package body in which one chip is molded with a molding compound such as an epoxy resin.

1 is a cross-sectional view illustrating a semiconductor package according to the related art, in which a semiconductor chip 1 is attached by an adhesive 3 to a paddle 2a of a lead frame, and the semiconductor chip 1 is formed of a metal wire ( 4) is electrically connected to the inner lead 2b of the lead frame, and a predetermined area including the semiconductor chip 1, the inner lead 2b, and the metal wire 4 is sealed by a molding compound to seal the package body. (5) is formed. Subsequently, a trim / forming process is performed in which the out lead 2c of the lead frame protruding outward of the package body 5 has a predetermined shape.

However, the semiconductor package as described above has a limitation in expanding its capacity since only one semiconductor chip is embedded, and in order to embed two or more chips, the size of the semiconductor package is increased because the paddle of the lead frame must be large. have.

Therefore, as another method for solving the above problems, a chip on chip board grid array (COCB) semiconductor package, as shown in FIGS. 2 and 3, is used.

FIG. 2 is a cross-sectional view illustrating a COCB semiconductor package using a pattern film, wherein the first semiconductor chip 12 and the second semiconductor chip 13 are attached to the upper and lower portions of the pattern film 11 on which a predetermined electrical pattern is formed. The lead frame 14, which forms an electrical signal transmission path to the outside, is connected to the first and second semiconductor chips 12 and 13 at a portion adjacent to an end portion of the pattern film 11.

3 is a cross-sectional view illustrating a COCB semiconductor package using solder balls, in which a first semiconductor chip 12 and a second semiconductor chip 13 are attached to upper and lower portions of the pattern film 11. The pattern film 11 is connected to the inner lead 15 of the lead frame which forms an electrical signal transmission path to the outside with the first and second semiconductor chips 12 and 13 by the solder balls 14, and the pattern A predetermined area including the film 11 and the first and second semiconductor chips 12 and 13 attached to the upper and lower portions thereof and the inner lead 15 of the lead frame is sealed by the molding compound so as to package the body 16. Is formed.

However, the prior art as described above has a drawback in that the size of the package is increased because the semiconductor chip is attached onto a pattern film larger than the size of the semiconductor chip. In order to form the semiconductor package, it is impossible to process the wafer in a wafer state. There is a problem.

In addition, in the case of using the solder ball, the thickness of the package increases, and there is a problem in that a delay of an electrical signal occurs due to the use of the inner lead and the out lead.

Therefore, in order to solve the above problems, by using a pattern film having the same size as the wafer and having an electrical connection means at the same position as the scribe line of the wafer, the present invention can be processed in a wafer state, miniaturized and It is an object of the present invention to provide a semiconductor package capable of achieving an increase in capacity.

1 is a cross-sectional view for explaining a semiconductor package according to the prior art.

Figure 2 is a process cross-sectional view for explaining a COCB bar conductor package according to the prior art.

Figure 3 is a process cross-sectional view for explaining a COCB semiconductor package using a solder ball according to the prior art.

4 is a plan view for explaining a pattern film according to the present invention.

5A and 5B are detailed views of portion A of FIG.

6A to 6C are cross-sectional views illustrating a COCB semiconductor package according to the present invention.

7 is a cross-sectional view for explaining another embodiment of the present invention.

* Description of the symbols for the main parts of the drawings *

20,31: pattern film 21: scribe line

22: groove 23: metal wiring

32: first wafer 33: second wafer

34: first semiconductor chip 35: second semiconductor chip

36: solder ball 37: lead frame

38: cramped lead frame 40: semiconductor package

50: stack type semiconductor package

The above object is a pattern film having the same size as a wafer including a plurality of semiconductor chips and provided with an electrical connection means, first and second semiconductor chips attached to the top and bottom of the pattern film, and the pattern film. It is achieved by a semiconductor package according to the invention, characterized in that it consists of a lead frame connected to an end.

According to the present invention, since the package process can be performed in a wafer state, the efficiency of the wafer can be improved, and the size of the package can be reduced since the solder ball is directly connected to the lead frame at the end of the pattern film. .

EXAMPLE

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

4 is a plan view illustrating a pattern film according to the present invention, and manufactures a pattern film 20 having the same size as a wafer including a plurality of semiconductor chips.

5A and 5B are detailed views of the portion A of FIG. 4, and as shown in FIG. 5A, a plurality of grooves 22 are electrically connected to the same positions as the scribe lines 21 of the wafer through an etching process. Is formed, and as shown in Fig. 5B, the wall surface portion of the groove 22 of the pattern film is made to be electrically conductive, and the internal metal wiring 23 is connected to the groove 22 portion.

6A through 6C are cross-sectional views illustrating a COCB semiconductor package according to the present invention. First, referring to FIG. 6A, a plurality of upper and lower surfaces of the pattern film 31 may be bumped. First and second wafers 32 and 33 including semiconductor chips are attached, respectively. At this time, the first and second wafers 32 and 33 are attached so that their scribe lines and the grooves (not shown) of the pattern film 31 are in the same position.

Referring to FIG. 6B, the pattern film 31 and the first and second wafers 32 and 33 attached to the upper and lower surfaces thereof are cut along the scribe line. As a result, a pattern film 31 having the same size is interposed between the first and second semiconductor chips 34 and 35, and a groove (which is an electrical connection means at an end of the pattern film 31) is formed. Not shown) is exposed in the form of a semicircle.

Referring to FIG. 6C, solder balls 36 are formed in the grooves of the pattern film 31 exposed in the form of a semicircle, and the pattern film 31 and the lead frame 37 are formed using the solder balls 36. Are connected to form the semiconductor package 40.

FIG. 7 is a view showing another embodiment of the present invention, after the solder balls 36 are formed in the exposed grooves in the form of a semicircle of the resultant pattern film 31 of FIG. After manufacturing the lead frame 38 in the shape of a bracket to surround the ends of the first and second semiconductor chips 34 and 35 attached to the lower surface and the solder ball 36, the solder ball 36 and the bracket The first semiconductor package is formed by connecting the lead frames 38 of the shape, and then a second semiconductor package having the same shape as that of the first semiconductor package is formed, and the respective lead frames are connected to each other to form the stacked semiconductor package 50. ).

As described above, since the semiconductor package of the present invention can perform a package process in a wafer state, the process is simplified, and the wafer is cut by the size of a semiconductor chip to manufacture a package, thereby improving wafer efficiency. In addition, since the solder ball is directly connected to the lead frame at the end of the pattern film, the size of the package can be reduced.

Meanwhile, although specific embodiments of the present invention have been described and illustrated, modifications and variations can be made by those skilled in the art. Accordingly, the following claims are to be understood as including all modifications and variations as long as they fall within the true spirit and scope of the present invention.

Claims (4)

A pattern film having the same size as a wafer including a plurality of semiconductor chips and provided with an electrical connection means, first and second semiconductor chips attached to the top and bottom of the pattern film, and a lead frame connected to an end of the pattern film. A semiconductor package comprising a. 2. The semiconductor package of claim 1, wherein the electrical connection means is formed at the same position as the scribe line of the wafer. The semiconductor package of claim 1, wherein the electrical connection means has a groove shape. The semiconductor package according to claim 1, wherein a connection of an end of the electric connecting means and a lead frame is connected by solder balls.