KR102718211B1 - 반도체 소자의 제조 방법 - Google Patents

반도체 소자의 제조 방법 Download PDF

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Publication number
KR102718211B1
KR102718211B1 KR1020227032511A KR20227032511A KR102718211B1 KR 102718211 B1 KR102718211 B1 KR 102718211B1 KR 1020227032511 A KR1020227032511 A KR 1020227032511A KR 20227032511 A KR20227032511 A KR 20227032511A KR 102718211 B1 KR102718211 B1 KR 102718211B1
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KR
South Korea
Prior art keywords
substrate
circuit element
semiconductor
support substrate
manufacturing
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KR1020227032511A
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English (en)
Korean (ko)
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KR20220143741A (ko
Inventor
마사히로 후지카와
에이지 야규
Original Assignee
미쓰비시덴키 가부시키가이샤
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Publication of KR20220143741A publication Critical patent/KR20220143741A/ko
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00—Bonding of wafers, substrates or parts of devices
    • H10P10/12—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
    • H01L21/185—
    • H01L21/304—
    • H01L29/2003—
    • H01L29/66462—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/015—Manufacture or treatment of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00—Cutting or separating of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7448—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support the bond interface between the auxiliary support and the wafer comprising two or more, e.g. multilayer adhesive or adhesive and release layer
    • H10P72/745—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support the bond interface between the auxiliary support and the wafer comprising two or more, e.g. multilayer adhesive or adhesive and release layer the bond interface between the auxiliary support and the wafer comprises three or more layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7412—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support the auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7422—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/744—Details of chemical or physical process used for separating the auxiliary support from a device or a wafer

Landscapes

  • Mechanical Treatment Of Semiconductor (AREA)
KR1020227032511A 2020-04-13 2020-04-13 반도체 소자의 제조 방법 Active KR102718211B1 (ko)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2020/016312 WO2021210047A1 (ja) 2020-04-13 2020-04-13 半導体素子の製造方法

Publications (2)

Publication Number Publication Date
KR20220143741A KR20220143741A (ko) 2022-10-25
KR102718211B1 true KR102718211B1 (ko) 2024-10-15

Family

ID=78084736

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020227032511A Active KR102718211B1 (ko) 2020-04-13 2020-04-13 반도체 소자의 제조 방법

Country Status (6)

Country Link
US (1) US12387934B2 (https=)
EP (1) EP4138116B1 (https=)
JP (1) JP7186921B2 (https=)
KR (1) KR102718211B1 (https=)
CN (1) CN115428127B (https=)
WO (1) WO2021210047A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12347717B2 (en) * 2021-06-24 2025-07-01 Taiwan Semiconductor Manufacturing Company, Ltd. Debonding structures for wafer bonding
JP2025020566A (ja) * 2023-07-31 2025-02-13 株式会社東芝 半導体装置の製造方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1174230A (ja) * 1997-08-29 1999-03-16 Nippon Telegr & Teleph Corp <Ntt> 薄膜半導体装置の製造方法
JPH11261198A (ja) * 1998-03-11 1999-09-24 Dainippon Printing Co Ltd 転写用原版を用いた配線基板の製造方法と転写用原版、および該転写用原版の製造方法
US6593213B2 (en) * 2001-09-20 2003-07-15 Heliovolt Corporation Synthesis of layers, coatings or films using electrostatic fields
JP2004055593A (ja) * 2002-07-16 2004-02-19 Hoya Corp 配線基板およびその製造方法
JP2005129825A (ja) 2003-10-27 2005-05-19 Sumitomo Chemical Co Ltd 化合物半導体基板の製造方法
JP2007188967A (ja) * 2006-01-11 2007-07-26 Sony Corp 基板支持体、基板処理方法及び半導体装置の製造方法
JP5003023B2 (ja) 2006-06-01 2012-08-15 ソニー株式会社 基板処理方法及び半導体装置の製造方法
JP2012028477A (ja) 2010-07-22 2012-02-09 Sumitomo Electric Ind Ltd 半導体装置の製造方法
US20140144593A1 (en) * 2012-11-28 2014-05-29 International Business Machiness Corporation Wafer debonding using long-wavelength infrared radiation ablation
JP6299478B2 (ja) * 2013-06-26 2018-03-28 日亜化学工業株式会社 発光装置およびその製造方法
WO2015156381A1 (ja) * 2014-04-10 2015-10-15 富士電機株式会社 半導体基板の処理方法及び該処理方法を用いる半導体装置の製造方法
CN110651359A (zh) * 2017-05-25 2020-01-03 株式会社新川 结构体的制造方法及结构体
SG10201913156WA (en) * 2017-07-14 2020-02-27 Shinetsu Chemical Co Device substrate with high thermal conductivity and method of manufacturing the same
JP7041338B2 (ja) * 2017-09-01 2022-03-24 日亜化学工業株式会社 発光装置の製造方法
JP7002398B2 (ja) 2018-04-13 2022-01-20 株式会社ディスコ 光学部品の接合方法

Also Published As

Publication number Publication date
CN115428127B (zh) 2025-02-18
WO2021210047A1 (ja) 2021-10-21
JPWO2021210047A1 (https=) 2021-10-21
US12387934B2 (en) 2025-08-12
KR20220143741A (ko) 2022-10-25
EP4138116A4 (en) 2023-07-19
EP4138116B1 (en) 2024-03-13
CN115428127A (zh) 2022-12-02
US20230134255A1 (en) 2023-05-04
JP7186921B2 (ja) 2022-12-09
EP4138116A1 (en) 2023-02-22

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