KR102639877B1 - 반도체 메모리 장치 - Google Patents
반도체 메모리 장치 Download PDFInfo
- Publication number
- KR102639877B1 KR102639877B1 KR1020180157989A KR20180157989A KR102639877B1 KR 102639877 B1 KR102639877 B1 KR 102639877B1 KR 1020180157989 A KR1020180157989 A KR 1020180157989A KR 20180157989 A KR20180157989 A KR 20180157989A KR 102639877 B1 KR102639877 B1 KR 102639877B1
- Authority
- KR
- South Korea
- Prior art keywords
- transistor
- voltage
- sense amplifiers
- write drivers
- conductive lines
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 59
- 239000003990 capacitor Substances 0.000 claims abstract description 36
- 239000000463 material Substances 0.000 claims description 21
- 239000000696 magnetic material Substances 0.000 claims description 3
- 239000012782 phase change material Substances 0.000 claims description 3
- 230000000295 complement effect Effects 0.000 claims 4
- 230000003321 amplification Effects 0.000 description 93
- 238000003199 nucleic acid amplification method Methods 0.000 description 93
- 238000010586 diagram Methods 0.000 description 12
- 230000006870 function Effects 0.000 description 8
- 230000004044 response Effects 0.000 description 6
- 230000004913 activation Effects 0.000 description 4
- 239000013078 crystal Substances 0.000 description 4
- 229910052735 hafnium Inorganic materials 0.000 description 4
- 230000001360 synchronised effect Effects 0.000 description 4
- 101150110971 CIN7 gene Proteins 0.000 description 3
- 101150110298 INV1 gene Proteins 0.000 description 3
- 101100397044 Xenopus laevis invs-a gene Proteins 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 230000010287 polarization Effects 0.000 description 3
- 229910052726 zirconium Inorganic materials 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000005415 magnetization Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40111—Multistep manufacturing processes for data storage electrodes the electrodes comprising a layer which is used for its ferroelectric properties
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Memories (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW108115967A TWI746972B (zh) | 2018-07-05 | 2019-05-09 | 半導體記憶元件 |
US16/428,184 US10957373B2 (en) | 2018-07-05 | 2019-05-31 | Semiconductor memory device |
CN201910520336.3A CN110689911B (zh) | 2018-07-05 | 2019-06-17 | 半导体存储器设备 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR20180078287 | 2018-07-05 | ||
KR1020180078287 | 2018-07-05 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20200010980A KR20200010980A (ko) | 2020-01-31 |
KR102639877B1 true KR102639877B1 (ko) | 2024-02-27 |
Family
ID=69369501
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020180157989A KR102639877B1 (ko) | 2018-07-05 | 2018-12-10 | 반도체 메모리 장치 |
Country Status (2)
Country | Link |
---|---|
KR (1) | KR102639877B1 (zh) |
TW (1) | TWI746972B (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102434912B1 (ko) | 2022-01-24 | 2022-08-23 | 주식회사 하이 | 신경언어장애를 개선하는 방법 및 장치 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3039245B2 (ja) * | 1993-12-22 | 2000-05-08 | 日本電気株式会社 | 半導体メモリ装置 |
JP2001102465A (ja) * | 1999-09-30 | 2001-04-13 | Rohm Co Ltd | 不揮発性メモリ |
KR100425160B1 (ko) * | 2001-05-28 | 2004-03-30 | 주식회사 하이닉스반도체 | 불휘발성 강유전체 메모리 장치의 승압전압 발생회로 및그 발생방법 |
KR100460459B1 (ko) * | 2002-07-30 | 2004-12-08 | 삼성전자주식회사 | 향상된 테스트 모드를 갖는 반도체 메모리 장치 |
JP4290457B2 (ja) * | 2003-03-31 | 2009-07-08 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
KR101842507B1 (ko) * | 2011-10-06 | 2018-03-28 | 삼성전자주식회사 | 불휘발성 메모리의 동작 방법 및 불휘발성 메모리를 제어하는 방법 |
US9460770B1 (en) * | 2015-09-01 | 2016-10-04 | Micron Technology, Inc. | Methods of operating ferroelectric memory cells, and related ferroelectric memory cells |
-
2018
- 2018-12-10 KR KR1020180157989A patent/KR102639877B1/ko active IP Right Grant
-
2019
- 2019-05-09 TW TW108115967A patent/TWI746972B/zh active
Also Published As
Publication number | Publication date |
---|---|
KR20200010980A (ko) | 2020-01-31 |
TW202006724A (zh) | 2020-02-01 |
TWI746972B (zh) | 2021-11-21 |
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E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant |