KR102271382B1 - Variable low resistance line based electronic device and controlling thereof - Google Patents

Abstract

An embodiment of the present invention, a base including a first region and a second region having different coercive fields; and a gate disposed adjacent the base to apply an electric field to the base, the base comprising: an active layer comprising a spontaneously polarizable material; and a paraelectric layer positioned on at least one of an upper surface and a lower surface of the active layer, wherein the paraelectric layer includes a first paraelectric layer positioned to correspond to the first region and a first paraelectric layer positioned to correspond to the second region. Disclosed is a variable low-resistance line-based electronic device including two paraelectric layers, wherein the permittivity of the first paraelectric layer and the permittivity of the second paraelectric layer are different.

Description

Variable low resistance line based electronic device and controlling method thereof

The present invention relates to an electronic device using a fluctuating low resistance line and a method for controlling the same.

With the development of technology and increasing interest in people's convenience in life, attempts to develop various electronic products are becoming active.

In addition, these electronic products are becoming smaller and more integrated, and the places where they are used are increasing widely.

These electronic products include various electrical components, for example, CPUs, memories, and other various electrical components. These base elements may include various types of electrical circuits.

For example, electrical devices are used in products in various fields such as computers and smart phones as well as home sensor devices for IoT and bio-electronic devices for ergonomics.

On the other hand, the use and application fields of these electrical devices are rapidly increasing according to the recent speed of technological development and the rapid improvement of the living standards of users, and the demand thereof is also increasing accordingly.

According to this trend, there is a limit in implementing and controlling an electronic circuit that is easily and quickly applied to various electrical devices that are commonly used.

Meanwhile, memory devices, particularly nonvolatile memory devices, are widely used as information storage and/or processing devices of various electronic devices such as cameras and communication devices as well as computers.

These memory devices, particularly in terms of lifespan and speed, are being developed a lot. Most of the problems are in securing the memory lifespan and speed, but there is a limit to realizing the improved memory device.

The present invention can provide an electronic device based on a variable low resistance line that can be easily applied to various uses and a method for controlling the same.

An embodiment of the present invention, a base including a first region and a second region having different coercive fields; and a gate disposed adjacent the base to apply an electric field to the base, the base comprising: an active layer comprising a spontaneously polarizable material; and a paraelectric layer positioned on at least one of an upper surface and a lower surface of the active layer, wherein the paraelectric layer includes a first paraelectric layer positioned to correspond to the first region and a first paraelectric layer positioned to correspond to the second region. Disclosed is a variable low-resistance line-based electronic device including two paraelectric layers, wherein the permittivity of the first paraelectric layer and the permittivity of the second paraelectric layer are different.

In this embodiment, the dielectric constant of the first paraelectric layer may be greater than that of the second paraelectric layer, and the coercive field of the second region may be greater than the coercive field of the first region.

In the present embodiment, the second region may surround the first region, and the gate may be positioned to overlap the first region.

In the present embodiment, when the magnitude of the electric field is greater than the coercive field of the first region and smaller than the coercive field of the second region, a first variable low resistance that forms a current path in the active layer in the first region A line may be formed.

In the present embodiment, when the magnitude of the electric field is greater than the coercive field of the second region, a second variable low resistance line may be formed in the active layer in the second region.

In this embodiment, a first electrode positioned to be in contact with the first variable low resistance line and the second variable low resistance line; and a plurality of second electrodes positioned to contact each of the first variable low resistance line and the second variable low resistance line, respectively.

Another embodiment of the present invention includes a base including an active layer including a spontaneously polarizable material and a paraelectric layer formed on at least one of an upper surface and a lower surface of the active layer, and a gate disposed adjacent to the base for a variable low resistance line-based electronic device, applying a voltage to the gate to apply an electric field to the base; and changing the polarization direction of the spontaneously polarizable material by the electric field to form a variable low-resistance line through which a current can flow in the active layer. and a second region positioned outside the region, wherein the paraelectric layer is formed to correspond to the first region and the second region, and has a dielectric constant different from that of the first paraelectric layer. The first region and the second region are formed such that the first region and the second region have different coercive fields, and the first region or the second region according to the magnitude of the voltage applied to the base. Disclosed is a method for controlling an electronic device based on a variable low resistance line in which the variable low resistance line is formed in the active layer.

In the present embodiment, the second region is formed to surround the first region, the coercive field of the second region is greater than the coercive field of the first region, and the dielectric constant of the first paraelectric layer is the second region. It may be formed to be larger than the permittivity of the two paraelectric layer.

In the present embodiment, when the magnitude of the electric field is greater than the coercive field of the first region and smaller than the coercive field of the second region, the variable low resistance line is formed in the active layer in the first region, When the magnitude of the electric field is greater than the coercive field of the second region, the variable low resistance line may be formed in the active layer in the second region.

In this embodiment, the gate may be formed to overlap the first paraelectric layer.

Other aspects, features and advantages other than those described above will become apparent from the following drawings, claims, and detailed description of the invention.

The electronic device using the variable low resistance line and the control method thereof according to the present invention can be easily applied to various uses.

1 is a schematic plan view showing an electronic device according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view taken along line II of FIG. 1 .
3 is an enlarged view of K of FIG. 2 .
4A to 4C are diagrams for explaining a current path range control method related to the electronic device of FIG. 1 .
5 is a schematic plan view illustrating an electronic device according to an embodiment of the present invention.
FIG. 6 is a cross-sectional view taken along line II-II of FIG. 5 .
7 is a schematic plan view illustrating an electronic device according to another embodiment of the present invention.
FIG. 8 is a cross-sectional view taken along line III-III of FIG. 7 .
9 is a graph illustrating a voltage and current relationship between a first polarization region and a variable low resistance line.
10 is a schematic plan view illustrating an electronic device according to another embodiment of the present invention.
11 to 14 are cross-sectional views taken along line IV-IV of FIG. 10 .

Hereinafter, the configuration and operation of the present invention will be described in detail with reference to the embodiments of the present invention shown in the accompanying drawings.

Since the present invention can apply various transformations and can have various embodiments, specific embodiments are illustrated in the drawings and described in detail in the detailed description. Effects and features of the present invention, and a method of achieving them, will become apparent with reference to the embodiments described below in detail in conjunction with the drawings. However, the present invention is not limited to the embodiments disclosed below and may be implemented in various forms.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, and when described with reference to the drawings, the same or corresponding components are given the same reference numerals, and the overlapping description thereof will be omitted. .

In the following embodiments, terms such as first, second, etc. are used for the purpose of distinguishing one component from another, not in a limiting sense.

In the following examples, the singular expression includes the plural expression unless the context clearly dictates otherwise.

In the following embodiments, terms such as include or have means that the features or components described in the specification are present, and the possibility of adding one or more other features or components is not excluded in advance.

In the drawings, the size of the components may be exaggerated or reduced for convenience of description. For example, since the size and thickness of each component shown in the drawings are arbitrarily indicated for convenience of description, the present invention is not necessarily limited to the illustrated bar.

In the following embodiments, the x-axis, the y-axis, and the z-axis are not limited to three axes on a Cartesian coordinate system, and may be interpreted in a broad sense including them. For example, the x-axis, y-axis, and z-axis may be orthogonal to each other, but may refer to different directions that are not orthogonal to each other.

Where certain embodiments are otherwise feasible, a specific process sequence may be performed different from the described sequence. For example, two processes described in succession may be performed substantially simultaneously, or may be performed in an order opposite to the order described.

1 is a plan view for explaining in detail a method for controlling a current path range using an electric field according to an embodiment of the present invention, FIG. 2 is a cross-sectional view taken along line II of FIG. 1, and FIG. 3 is a K of FIG. It is an enlarged view of a part.

1 and 2 , the electronic device 10 of the present embodiment may include an active layer 11 , an application electrode 12 , and a variable low resistance line VL.

The active layer 11 may include a spontaneously polarizable material. For example, the active layer 11 may include an insulating material and a ferroelectric material. That is, the active layer 11 may comprise a material having a spontaneous electric polarization (electric dipole) that can be reversed in the presence of an electric field.

As an optional embodiment, the active layer 11 may include a perovskite-based material, for example, BaTiO3, SrTiO3, BiFe3, PbTiO3, PbZrO3, SrBi2Ta2O9.

In addition, as another example, the active layer 11 has an ABX3 structure, where A is an alkyl group of CnH2n+1, and at least one material selected from inorganic materials such as Cs and Ru capable of forming a perovskite solar cell structure, B may include at least one material selected from the group consisting of Pb, Sn, Ti, Nb, Zr, and Ce, and X may include a halogen material. As a specific example, the active layer 11 may include CH3NH3PbI3, CH3NH3PbIxCl3-x, MAPbI3, CH3NH3PbIxBr3-x, CH3NH3PbClxBr3-x, HC(NH2)2PbI3, HC(NH2)2PbIxCl3-x, HC(NH2)2PbI3, HC(NH2)2PbI3 2PbClxBr3-x, (CH3NH3)(HC(NH2)2)1-yPbI3, (CH3NH3)(HC(NH2)2)1-yPbIxCl3-x, (CH3NH3)(HC(NH2)2)1-yPbIxBr3-x, or (CH3NH3)(HC(NH2)2)1-yPbClxBr3-x (0=x, y≤=1).

Since the active layer 11 may be formed using various other ferroelectric materials, a description of all examples thereof will be omitted. In addition, when the active layer 11 is formed, the ferroelectric material may be doped with various other materials to include additional functions or to improve electrical properties.

The active layer 11 has spontaneous polarization and can control the degree and direction of polarization according to the application of an electric field. In addition, the active layer 11 may maintain a polarized state even when the applied electric field is removed.

The application electrode 12 may be formed to apply an electric field to the active layer 11 , for example, to apply a voltage to the active layer 11 .

As an optional embodiment, the application electrode 12 may be formed to be in contact with the upper surface of the active layer 11 .

In addition, the application electrode 12 may be formed to apply voltages of various magnitudes to the active layer 11 and to control the voltage application time.

In an alternative embodiment, the application electrode 12 may be a gate electrode.

For example, the application electrode 12 may be electrically connected to a power source (not shown) or a power control unit.

The application electrode 12 may include various materials, and may include a material having high electrical conductivity. For example, the application electrode 12 may be formed using various metals, and may be formed to contain aluminum, chromium, titanium, tantalum, molybdenum, tungsten, neodymium, scandium, or copper. Alternatively, it may be formed using an alloy of these materials or may be formed using a nitride of these materials.

Also, as an optional embodiment, the applying electrode 12 may include a laminate structure.

Although not shown, as an optional embodiment, one or more insulating layers may be further disposed between the application electrode 12 and the active layer 11 .

The variable low resistance line VL is a region formed in the active layer 11 and is a region through which current can flow, and is formed as a path of current having a linear loop around the application electrode 12 as shown in FIG. 1 . can be

Specifically, the variable low resistance line VL is a region of the active layer 11 in which electrical resistance is lower than that of other regions adjacent to the variable low resistance line VL.

In addition, after forming the fluctuating low-resistance line VL through the application electrode 12 , even if the electric field through the application electrode 12 is removed, for example, even if the voltage is removed, the polarization state of the active layer 11 is Since it is maintained, the variable low resistance line VL is maintained, and a state in which a current path is formed can be maintained.

Through this, various electronic devices can be configured.

The variable low resistance line VL has a height HVL, and this height HVL may correspond to the entire thickness of the active layer 11 .

The height HVL of the variable low resistance line VL may be proportional to the strength of the electric field applied through the application electrode 12 , for example, the magnitude of the voltage. At least the magnitude of this electric field may be greater than the intrinsic coercive field of the active layer 11 .

The variable low resistance line VL is a region formed when a voltage is applied to the active layer 11 through the applying electrode 12 , and can be changed, for example, generated, destroyed, or moved through the control of the applying electrode 12 . .

The active layer 11 may include a first polarization region 11R having a first polarization direction, and the variable low resistance line VL may be formed at a boundary of the first polarization region 11R.

In addition, the active layer 11 may include a second polarization region 11F having a second polarization direction adjacent to the first polarization region 11R, and the variable low resistance line VL is connected to this second polarization region ( 11F). The second direction may be at least a direction different from the first direction, for example a direction opposite to the first direction.

For example, the variable low resistance line VL may be formed at a boundary between the first polarization region 11R and the second polarization region 11F.

The variable low resistance line VL may have a width WVL in one direction, that is, between two opposing variable low resistance lines VL, which may be proportional to the moving distance of the variable low resistance line VL. and this will be described later.

As an optional embodiment, as shown in FIG. 3 , the variable low resistance line VL may have a predetermined thickness TVL in the plane direction, which may be +/-0.2 nm based on 0.3 nm.

4A to 4C are diagrams for explaining a method of controlling a current path range with respect to the electronic device of FIG. 1 .

Referring to FIG. 4A , the active layer 11 may include a first polarization region 11R having a first polarization direction. The first polarization region 11R may be formed by characteristics of the material itself constituting the active layer 11 . As an alternative embodiment, the polarization state of the active layer 11 as shown in FIG. 4A may be formed by applying an initialization electric field through the application electrode 12 .

Then, referring to FIG. 4B , a second polarization region 11F is formed in the active layer 11 . As a specific example, the second polarization region 11F may be formed at least in a region overlapping with the application electrode 12 to correspond to the width of the application electrode 12 .

It is larger than the coercive field of the active layer 11 through the application electrode 12 and has a size large enough that the height HVL of the second polarization region 11F can be formed to correspond to at least the entire thickness of the active layer 11 . An electric field may be applied to the active layer 11 .

Through the application of the electric field through the application electrode 12 , the polarization direction of one region of the first polarization region 11R of the active layer 11 may be changed to change to the second polarization region 11F.

As an optional embodiment, the growth rate in the height (HVL) direction of the second polarization region 11F may be very fast, for example, it may grow at a speed of about 1 km/sec (second).

Then, if the electric field through the application electrode 12 is continuously maintained, that is, as time passes, the second polarization region 11F moves in the horizontal direction H, that is, in a direction orthogonal to the height HVL, and increases in size. can That is, a partial region of the first polarization region 11R of the active layer 11 may be gradually converted into the second polarization region 11F, and according to an embodiment, the converted second polarization region 11F is the active layer. (11) It may be formed over the entire thickness and may be formed extending from the lower portion of the application electrode 12 in the horizontal direction (H).

As an alternative embodiment, the growth rate in the horizontal direction H of the second polarization region 11F may be very fast, for example, it may grow at a rate of 1 m/sec (second).

Through this, the size of the variable low resistance line VL can be controlled, and this size corresponds to, for example, the width WVL in one direction of the second polarization region 11F and the growth distance of the second polarization region 11F. Therefore, it can be proportional to the growth rate and the duration of the electric field. For example, the growth distance may be proportional to the product of the growth rate and the duration of the electric field.

Also, the growth speed of the second polarization region 11F may be proportional to the sum of the growth rate in the height HVL direction and the growth rate in the horizontal direction H.

Therefore, the size of the variable low resistance line VL can be adjusted as desired by controlling the electric field holding time.

Specifically, as shown in FIG. 4C , the second polarization region 11F spreads and becomes large, and accordingly, the variable low resistance line VL may also move in a direction away from the applying electrode 12 .

In this embodiment, an electric field is applied to the active layer through the applying electrode to form a second polarization region having a second polarization direction different from the first polarization direction in the active layer, and at the boundary between the first polarization region and the second polarization region A corresponding fluctuating low-resistance line can be formed. The variable low-resistance line is a region having low resistance, that is, a reduced resistance, and can serve as a path for current, so that an electronic device can be easily formed.

In addition, in the present embodiment, the height of the variable low resistance line can be determined by controlling the magnitude of the electric field through the applied electrode, for example, by controlling the magnitude of the voltage, and specifically, it is controlled to have a height corresponding to the entire thickness of the active layer. can do.

In addition, the size, eg, width, of the fluctuating low-resistance line can be determined by controlling the time the electric field is maintained through the applied electrode. By controlling the size of the variable low resistance line, it is possible to easily control the size of the path of the current flow.

In addition, even if the electric field through the applied electrode is removed, the polarization state of the polarization region is maintained, so the path of the current can be easily maintained. The resistance line may have a low resistance so that no current flows.

Through this, it is possible to control the extinction of the path of the current, and as a result, it is possible to easily control the flow of the current.

5 is a plan view of a variable low resistance line electronic device according to an embodiment of the present invention, and FIG. 6 is a cross-sectional view taken along line II-II of FIG. 5 .

5 and 6 , the variable low resistance line electronic device 100 is a memory device including an active layer 110 , a gate 120 , a first electrode 131 , and a second electrode 132 . can

The active layer 110 may include a spontaneously polarizable material. For example, the active layer 110 may include an insulating material and a ferroelectric material. That is, the active layer 110 may include a material having a spontaneous electrical polarization (electric dipole) that can be reversed in the presence of an electric field.

As an optional embodiment, the active layer 110 may include a perovskite-based material, for example, BaTiO3, SrTiO3, BiFe3, PbTiO3, PbZrO3, SrBi2Ta2O9.

Also, as another example, the active layer 110 has an ABX3 structure, where A is an alkyl group of CnH2n+1, and at least one material selected from inorganic materials such as Cs and Ru capable of forming a perovskite solar cell structure, B may include at least one material selected from the group consisting of Pb, Sn, Ti, Nb, Zr, and Ce, and X may include a halogen material. As a specific example, the active layer 110 may include CH3NH3PbI3, CH3NH3PbIxCl3-x, MAPbI3, CH3NH3PbIxBr3-x, CH3NH3PbClxBr3-x, HC(NH2)2PbI3, HC(NH2)2PbIxCl3-x, HC(NH2)2PbI3, HC(NH2)2PbI3 2PbClxBr3-x, (CH3NH3)(HC(NH2)2)1-yPbI3, (CH3NH3)(HC(NH2)2)1-yPbIxCl3-x, (CH3NH3)(HC(NH2)2)1-yPbIxBr3-x, or (CH3NH3)(HC(NH2)2)1-yPbClxBr3-x(0=x, y≤=1).

Since the active layer 110 may be formed using various other ferroelectric materials, a description of all examples thereof will be omitted. In addition, when the active layer 110 is formed, the ferroelectric material may be doped with various other materials to include additional functions or to improve electrical properties.

The active layer 110 has spontaneous polarization and can control the degree and direction of polarization according to the application of an electric field. In addition, the active layer 110 may maintain a polarized state even when the applied electric field is removed.

The active layer 110 may include a first polarization region 110R and a second polarization region 110F positioned adjacent to each other in the X-Y plane direction. The first polarization region 110R may have polarization in a first direction, and the first direction is the thickness direction of the base 110 , that is, the first polarization region 110R and the second polarization region 110F. It may be a Z-direction perpendicular to the direction in which it is placed.

The second polarization region 110F is positioned adjacent to the first polarization region 110R in a direction perpendicular to the thickness, that is, in the XY plane direction, and the second polarization region 110F is selectively formed in the first direction and in the first direction. It may have a polarization aligned in an opposite second direction.

A gate 120 may be positioned on the second polarization region 110F. Although not shown in the drawing, the gate 120 may be connected to a separate device to receive a gate signal.

The second polarization region 110F may achieve polarization in a direction different from that of the first polarization region 110R, for example, in the opposite direction, by the voltage applied to the gate 120 .

As described above, the variable low resistance line 140 may be formed between the first polarization region 110R and the second polarization region 110F having polarizations in opposite directions. The variable low-resistance line 140 as described above becomes a region having a very small resistance compared to the first polarization region 110R and/or the second polarization region 110F, and a current can flow through this region. .

The variable low resistance line 140 may be formed according to the following exemplary embodiment.

First, the active layer 110 including the spontaneously polarizable material may have polarization in the first direction as a whole. The entire active layer 110 is not necessarily limited to having the polarization in the first direction, and at least a predetermined area of the active layer 110 facing the gate 120 may have the polarization in the first direction. Optionally, the first direction polarization may be formed by applying an initialization electric field to the gate 120 .

In this state, as a first voltage is applied to the gate 120 for a first time and an electric field is applied to the active layer 110 through the gate 120 , a predetermined area facing the gate 120 is polarized in the second direction. will change The electric field applied to the gate 120 to change the direction of polarization may be adjusted by the first voltage, that is, the first voltage so that an electric field greater than the coercive field of the spontaneously polarizable material forming the active layer 110 is applied. can be added

The area of the second polarization region 110F formed in this way may be proportionally determined according to the first time that the first voltage is applied to the gate 120 . Therefore, in order to form the second polarization region 110F of a desired area and/or size, an appropriate gate voltage, time, and thickness of the second polarization region 110F for the corresponding ferroelectric material are determined in advance by experiment and/or calculation. can

When the polarization direction of the second polarization region 110F is changed from the first direction to the second direction, the first polarization region 110R having the polarization in the first direction and the second polarization region 110F having the polarization in the second direction are changed. ), a variable low resistance line 140 of a predetermined width may be formed between. The variable low resistance line 140 may be formed around the gate 120 . The width of the variable low resistance line 140 may be about 0.3 nm, but is not limited thereto, and may have a width of +/- 0.2 nm with respect to 0.3 nm.

FIG. 9 shows a state in which a current changes as the voltage increases in the first polarization region and the variable low resistance line. Since the variable low resistance line 140 has a very small resistance compared to the first polarization region 110R, it can be seen that the current flows smoothly according to the voltage application. Although not shown in the drawings, since the resistance of the variable low resistance line 140 is very small even compared to the second polarization region 110F, the flow of current through it may occur smoothly.

The variable low resistance line 140 formed as described above may not be erased over time.

The first electrode 131 and the second electrode 132 are positioned so as to be in contact with the variable low resistance line 140 formed in this way. In this case, a current may flow from the first electrode 131 to the second electrode 132 through the variable low resistance line 140 . Therefore, data writing is possible at this time, and it can be read, for example, as 1. According to an embodiment, the first electrode 131 may be a source and the second electrode 132 may be a drain, but the source and the drain may be interchanged. This may be directly applied to all embodiments of the present specification.

Optionally, it can be erased by making the polarization direction of the second polarization region 110F equal to the polarization direction of the first polarization region 110R again by the voltage applied to the variable low resistance line 140 and the gate 120 . .

That is, by applying the second voltage to the gate 120 , the polarization direction of the second polarization region 110F may be changed to the first direction again. Thereafter, by maintaining the second voltage for a second time, a region in which the polarization is changed in the first direction may be grown in a planar direction, and the region in which the polarization is changed in the first direction passes through the variable low resistance line 140 to generate the first When extended to the polarization region 110R, the variable low resistance line 140 may disappear. In this case, current cannot flow from the first electrode 131 to the second electrode 132 , and thus, data can be erased at this time, and 0 can be read.

In this case, the second voltage may be a voltage different from the first voltage, and may have the same magnitude and opposite polarity as the first voltage according to an exemplary embodiment. The second time period may be at least equal to or longer than the first time period. That is, by applying the second voltage for a second time period equal to or longer than the first time period, the first polarization region 110R can be sufficiently grown to pass the variable low resistance line 140 , thereby extinguishing the variable low resistance line 140 .

The variable low resistance line electronic device formed as described above can be used as a nonvolatile memory device because the aforementioned variable low resistance line 140 can maintain its state even when the power to the gate 120 is turned off.

Since the variable low-resistance line memory device is capable of writing/erasing more than about 1012 times, it may have a memory lifespan of about 107 times or more than that of a conventional semiconductor device-based memory device.

In terms of memory speed, the variable low-resistance line memory device can be about 10-9 sec, so that the memory speed can be increased by about 106 times compared to the conventional semiconductor device-based memory device.

As such, the variable low-resistance line memory device can be a memory device having very excellent speed and lifespan.

In the case of the conventional ferroelectric memory, there is a limit to reducing the size of the ferroelectric element because it uses the polarization of the ferroelectric, but the variable low-resistance line memory element does not directly use the polarization and uses only the characteristics of the low-resistance line. It has the advantage of being able to increase it further.

In addition, since the position at which the variable low-resistance line 140 is formed can be adjusted according to the gate voltage and/or the application time, various memory devices can be designed and thinner than the conventional ferroelectric memory devices using ferroelectrics. can achieve In addition, there is an advantage in that the degree of integration of the device can be increased because the degree of freedom in designing the memory is increased.

As shown in FIG. 5 , the variable low resistance line 140 formed in this way may be formed in a closed loop shape with the gate 120 as the center, and the first electrode 131 and the second electrode are formed in a part of the closed loop. By disposing 132 , there may be two lines connecting the first electrode 131 and the second electrode 132 . However, the present invention is not necessarily limited thereto, and when the gate is positioned on one side of the base in the planar direction and the first electrode and the second electrode are disposed on the other two adjacent sides, the variable low resistance line is a single unit connecting the first electrode and the second electrode. can be the line of

Although the first electrode 131 and the second electrode 132 as described above may have an electrode structure formed by patterning on the active layer 110, the present invention is not necessarily limited thereto, and although not shown in the drawings, the active layer It may be in contact with the variable low resistance line 140 through a via hole formed in the insulating layer covering 110 .

7 is a schematic plan view showing an electronic device according to another embodiment of the present invention, and FIG. 8 is a cross-sectional view taken along line III-III of FIG. 7 .

7 and 8 , the electronic device 200 of this embodiment includes an active layer 210 , a gate 220 , a variable low resistance line 240 , a first electrode 231 , and a second electrode 232 . can do.

For convenience of description, different points from the above-described embodiment will be mainly described.

The first electrode 231 and the second electrode 232 may be formed on the active layer 210 , for example, on the surface of the active layer 210 on which the gate 220 is formed so as to be spaced apart from the gate 220 . It may be formed on the opposite side.

The gate 220 may be formed on the upper surface of the active layer 210 , and the first electrode 231 and the second electrode 232 may be formed on the lower surface of the active layer 210 .

As an optional embodiment, the first electrode 231 and the second electrode 232 may be formed to contact the active layer 210 .

The first electrode 231 and the second electrode 232 may be formed using various conductive materials.

The description of the material forming the first electrode 231 and the second electrode 232 is the same as that described in the above-described embodiment, or a specific description thereof will be omitted.

Referring to FIG. 8 , when a voltage is applied to the active layer 210 through the gate 220 , at least one region of the base 210 may include the second polarization region 210F.

The variable low resistance line VL may be formed in a region corresponding to the side of the boundary line of the second polarization region 210F. Referring to FIG. 7 , a linear line surrounding the gate 220 centered on the gate 220 . can be formed with

In addition, the variable low resistance line 240 may be formed to correspond to the entire side surface of the boundary line of the second polarization region 210F, and may have a thickness in a direction away from the side surface of the second polarization region 210F, optionally By way of example, this thickness may be +/- 0.2 nm centered on 0.3 nm.

The variable low resistance line 240 formed at the boundary of the second polarization region 210F of the active layer 210 may change to a region having a lower resistance than other regions of the active layer 210 . For example, the variable low resistance line 240 has a lower resistance than the second polarization region 210F of the active layer 210 and the first polarization region 210R of the active layer 210 around the variable low resistance line 240 . can have

Through this, the variable low resistance line 240 may form a current passage.

As an optional embodiment, the variable low resistance line 240 may correspond to one region of a plurality of domain walls provided in the active layer 210 .

Also, the variable low resistance line 240 may be continuously maintained when the polarization state of the second polarization region 210F is maintained. That is, even if the voltage applied to the active layer 210 through the gate 220 is removed, the state of the variable low resistance line 240 , that is, the low resistance state may be maintained.

A passage of current may be formed through the variable low resistance line 240 .

In addition, as a specific example, the first electrode 231 and the second electrode 232 are formed to correspond to the variable low resistance line 240 , and for example, the first electrode 231 and the second electrode 232 are spaced apart from each other. It may be disposed so as to be in contact with the lower surface of the variable low resistance line 240 .

Through this, a current may flow through the first electrode 231 and the second electrode 232 .

In the electronic device 200 of this embodiment, the gate 220 is formed on one surface of the active layer 210 and the first and second electrodes 231 and 232 are formed on the other surface, so that precise patterning and miniaturization can be easily performed. Margins and degrees of freedom can be increased.

10 is a schematic plan view illustrating an electronic device according to another embodiment of the present invention, and FIGS. 11 to 14 are cross-sectional views taken along line IV-IV of FIG. 10 .

Referring to the drawings, the electronic device 300 of this embodiment has a base 310 , a gate 320 , a first electrode 331 , a plurality of second electrodes 332a and 332b , and a plurality of variable low resistance lines 341 . , 342) may be included.

The base 310 may include an active layer 301 and a paraelectric layer 311 stacked on at least one of the upper and lower surfaces of the active layer 301 .

The active layer 301 may include a spontaneously polarizable material, similarly to the above-described embodiments. Accordingly, the degree and direction of polarization can be controlled according to the application of the electric field, and the active layer 301 can maintain the polarization state even when the applied electric field is removed.

The paraelectric layer 311 is a layer including a paraelectric material, and is magnetized when an electric field is applied to the base 310 , but does not maintain a polarization state unlike the active layer 301 when an electric field is not applied to the base 310 . The paraelectric layer 311 is SrTiO3, HfO2, SiO2, Al2O3, (Ba,Sr)TiO3, ZrTiO4, Ba(Zr,Ti)O3, (Pb,La)(Nb,Ti)O3, (Pb,Sr)TiO3 and the like.

The paraelectric layer 311 includes a first paraelectric layer 311a positioned to correspond to the first region 312 of the base 310 and a second paraelectric layer positioned to correspond to the second region 314 of the base 310 . (311b). At this time, the first paraelectric layer 311a and the second paraelectric layer 311b have different dielectric constants, and as a result, the hysteresis curves in the first region 312 and the second region 314 of the base 310 are The coercive field of the first region 312 and the coercive field of the second region 314 may be changed differently from each other.

For example, the permittivity of the second paraelectric layer 311b may be smaller than the permittivity of the first paraelectric layer 311a , and the coercive field of the second region 314 may be greater than that of the first region 312 . For example, the first paraelectric layer 311a may be ZrTiO4, SrTiO3, (Ba,Sr)TiO3, (Pb,Sr)TiO3), ZrTiO4, Ba(Zr,Ti)O3 or (Pb,La)(Nb,Ti) ) O3, and the second paraelectric layer 311b may include SiO2, Al2O3, or the like. However, the present invention is not limited thereto, and the first paraelectric layer 311a and the second paraelectric layer 311b may include various materials having different dielectric constants.

Meanwhile, in FIG. 11 , the first paraelectric layer 311a is formed to correspond to the first region 312 on the upper and lower surfaces of the active layer 301 , and the second paraelectric layer 311b is formed on the upper and lower surfaces of the active layer 301 . Although an example formed in correspondence to the second region 314 is shown in FIG. 1 , the paraelectric layer 311 is not formed on any one of the upper and lower surfaces of the active layer 301 , or any of the upper and lower surfaces of the active layer 301 . A first paraelectric layer 311a or a second paraelectric layer 311b may be formed entirely on one surface. Also, the base 310 may include three or more regions having different coercive fields, and thus the paraelectric layer 311 may include three or more dielectric layers having different dielectric constants.

The gate 320 may be formed to apply an electric field to the base 310 , for example, a voltage may be applied to the base 310 . In addition, the gate 320 may be formed to apply voltages of various magnitudes to the base 310 and to control the voltage application time.

As described above, the base 310 may include a first region 312 and a second region 314 having different coercive fields. The coercive field of the second region 314 may be greater than that of the first region 312 , and the second region 314 may be located outside the first region 312 . For example, the second region 314 may surround the first region 312 in a plan view. Alternatively, the first region 312 and the second region 314 may be arranged in a line, and the second region 314 may be disposed on both sides of the first region 312 . In this case, the gate 320 may be positioned to overlap the first region 312 . That is, the gate 320 may overlap the first paraelectric layer 311a.

On the other hand, since the coercive field of the first region 312 is smaller than the coercive field of the second region 314 , in order to change the polarization direction of the second region 314 , it is higher than when the polarization direction of the first region 312 is changed. A larger electric field is required.

For example, as shown in FIG. 11 , in the first region 312 , the active layer 301 includes a first polarization region 312R having a first polarization direction, and in the second region 314 , the active layer 301 includes the first When the first polarization region 314R having a polarization direction is included, an electric field greater than the coercive field of the first region 312 and smaller than the coercive field of the second region 314 is generated through the gate 320 through the base 310 . When applied to, as shown in FIG. 12 , the polarization direction of the active layer 301 in the second region 314 does not change, and only in the first region 312 is a second polarization region 312F in the active layer 301 . this is formed

Accordingly, the formation position of the first variation low resistance line 341 may be limited within the first region 312 . That is, since a domain region in which a polarization state is changed in proportion to the application time of the electric field may be limited, it is possible to provide an advantage in that it is not necessary to consider a variable such as an electric field application time when controlling the electronic device 300 .

As another example, when an electric field greater than the coercive field of the second region 314 is applied to the base 310 through the gate 320 in the state shown in FIG. 11 , as shown in FIG. 13 , the first region 312 ), the polarization direction of the active layer 301 is changed, so that in the first region 312 , the active layer 301 includes a second polarization region 312F, and in the second region 314 , the second polarization is in the active layer 301 . As the region 314F is formed, a second variable low resistance line 342 may be formed in the second region 314 .

On the other hand, in the state shown in FIG. 13 , when an opposite electric field is applied to the base 310 to return the active layer 301 in the first region 312 to the state of the first polarization region 312R through the gate 320, in FIG. 14 , a first variable low resistance line 341 may be additionally formed in the active layer 301 in the first region 312 . At this time, the voltage applied to the gate 320 is greater than the coercive field of the first region 312 and an electric field smaller than the coercive field of the second region 314 is applied to the base 310 , but within the first region 312 . In order to return the second region 312F of the active layer 301 to the first region 312R, it may have a polarity opposite to that of the voltage applied in FIG. 12 .

That is, according to the present invention, since the base 310 includes the first region 312 and the second region 314 having different coercive fields, the first fluctuation is caused by the magnitude of the voltage applied to the gate 320 . Since the formation positions of the low-resistance line 341 and the second variable low-resistance line 342 may be limited within a specific region, control of the electronic device 300 may be facilitated.

Referring back to FIG. 10 , the first electrode 331 may be formed over the first region 312 and the second region 314 . And the second electrodes 332a and 332b are electrically connected only to the first 2-1 electrode 332a and the second variable low resistance line 342 electrically connected only to the first variable low resistance line 341 and the 2 - 2nd electrode electrically connected only to the second variable low resistance line 342 . (332b) may be included. For example, the second-first electrode 332a and the second-second electrode 332b may contact the active layer 301 through a contact hole formed in the paraelectric layer 311 .

As described above, by adjusting the magnitude of the voltage applied to the gate 320, the first variable low resistance line 341 and the second variable low resistance line 342 may be formed, through which the first electrode ( A current path may be formed between the 331 and the second electrodes 332a and 332b. In this case, by measuring the amount of current flowing through the first variable low resistance line 341 and the second variable low resistance line 342 , it is possible to read a plurality of data.

For example, when only the first variable low resistance line 341 is formed as shown in FIG. 12 , the first data may be read according to the amount of current measured along the first electrode 331 and the second-first electrode 332a. . In addition, when only the second variable low resistance line 342 is formed as shown in FIG. 13 , the second data may be read according to the amount of current measured along the first electrode 331 and the second second electrode 332b, as shown in FIG. When the first variable low resistance line 341 and the second variable low resistance line 342 are formed as shown in 14, the first electrode 331, the 2-1 electrode 332a, and the 2-2 electrode 332b are formed. The third data may be read according to the amount of current measured accordingly.

In addition, by erasing both the first variable low resistance line 341 and the second variable low resistance line 342 , data erasing becomes possible and may be read as 0 . The first variable low resistance line 341 and the second variable low resistance line 342 may be extinguished by applying an initialization voltage to the gate 320 . The initialization voltage is to apply an electric field greater than the coercive field of the second region 314 to the base 310, but to return the polarization direction of the active layer 301 in the first region 312 and the second region 314. , may have a polarity opposite to that of the voltage applied in FIG. 13 .

Meanwhile, in the above embodiment, as the base 310 includes the first region 312 and the second region 314 , the first variable low resistance line 341 and the second variable low resistance line 342 are separated from each other. Although an example in which two fluctuating low-resistance lines are formed is shown, the present invention is not necessarily limited thereto, and the base 310 includes three or more regions having different constant magnetic fields, and the number of second electrodes is adjusted accordingly. can be designed

In the specification of embodiments (especially in the claims), the use of the term “the” and similar referential terms may be used in both the singular and the plural. In addition, when a range is described in the embodiment, it includes the invention to which individual values belonging to the range are applied (unless there is a description to the contrary), and each individual value constituting the range is described in the detailed description. . Finally, the steps constituting the method according to the embodiment may be performed in an appropriate order unless the order is explicitly stated or there is no description to the contrary. Embodiments are not necessarily limited according to the order of description of the above steps. In the embodiment, the use of all examples or exemplary terms (eg, etc.) is merely for describing the embodiment in detail, and unless it is limited by the claims, the scope of the embodiment is limited by the examples or exemplary terms unless it is limited by the claims. it is not In addition, those skilled in the art will recognize that various modifications, combinations, and changes may be made in accordance with design conditions and factors within the scope of the appended claims or their equivalents.

Claims (10)

a base including a first region and a second region having different coercive fields; and
a gate disposed adjacent to the base to apply an electric field to the base;
The base is
an active layer comprising a spontaneously polarizable material; and
a paraelectric layer located on at least one of an upper surface and a lower surface of the active layer;
The paraelectric layer includes a first paraelectric layer positioned to correspond to the first region and a second paraelectric layer positioned to correspond to the second region,
The dielectric constant of the first paraelectric layer is greater than the dielectric constant of the second paraelectric layer,
The coercive field of the second region is greater than the coercive field of the first region,
When the magnitude of the electric field is greater than the coercive field of the first region and smaller than the coercive field of the second region, a first fluctuating low-resistance line that forms a path for a current in the active layer in the first region is formed. Resistive line-based electronic devices. delete According to claim 1,
the second region surrounds the first region;
The gate is a variable low resistance line-based electronic device positioned to overlap the first region. delete According to claim 1,
When the magnitude of the electric field is greater than the coercive field of the second region, a second fluctuation low resistance line is formed in the active layer in the second region. 6. The method of claim 5,
a first electrode positioned in contact with the first variable low resistance line and the second variable low resistance line; and
The variable low resistance line-based electronic device further comprising a; a plurality of second electrodes positioned to contact each of the first variable low resistance line and the second variable low resistance line. A variable low-resistance line-based electronic device comprising a base including an active layer including a spontaneously polarizable material and a paraelectric layer formed on at least one of an upper surface and a lower surface of the active layer, and a gate disposed adjacent to the base about,
applying a voltage to the gate to apply an electric field to the base; and
The polarization direction of the spontaneously polarizable material is changed by the electric field to form a variable low-resistance line through which a current can flow in the active layer;
In a plan view, the base includes a first area and a second area located outside the first area,
The paraelectric layer includes a first paraelectric layer formed to correspond to the first region and a second paraelectric layer formed to correspond to the second region,
The dielectric constant of the first paraelectric layer is formed to be greater than the dielectric constant of the second paraelectric layer, and the coercive field of the second region is greater than the coercive field of the first region,
When the magnitude of the electric field is greater than the coercive field of the first region and smaller than the coercive field of the second region, the variable low resistance line is formed in the active layer in the first region,
When the magnitude of the electric field is greater than the coercive field of the second region, the fluctuating low-resistance line-based electronic device control method in which the variable low-resistance line is formed in the active layer in the second region. 8. The method of claim 7,
and the second region is formed to surround the first region. delete 9. The method of claim 8,
wherein the gate is formed by overlapping the first paraelectric layer.

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