KR102234117B1 - Light emitting device and lighting system - Google Patents

Abstract

The embodiment relates to a light emitting device, a method of manufacturing a light emitting device, a light emitting device package, and a lighting system.
The light emitting device according to the embodiment includes a first conductive type semiconductor layer, a second conductive type semiconductor layer disposed under the first conductive type semiconductor layer, and between the first conductive type semiconductor layer and the second conductive type semiconductor layer. A plurality of holes for exposing a part of the first conductive type semiconductor layer through the disposed active layer and through the second conductive type semiconductor layer and the active layer from the bottom surface of the second conductive type semiconductor layer, and the second conductive type A first contact electrode electrically connected to the first conductive type semiconductor layer through the plurality of holes from a bottom surface of the semiconductor layer, and a first electrode layer electrically connected to the first contact electrode, and The upper surface may include at least one pattern.

Description

Light emitting device and lighting system {LIGHT EMITTING DEVICE AND LIGHTING SYSTEM}

The embodiment relates to a light emitting device, a method of manufacturing a light emitting device, a light emitting device package, and a lighting system.

A light emitting diode is a pn junction diode that converts electrical energy into light energy. It can be created as a compound semiconductor such as Group III and Group V on the periodic table, and realizes various colors by adjusting the composition ratio of the compound semiconductor. This is possible.

When the forward voltage is applied, the electrons in the n-layer and the holes in the p-layer are combined to emit energy equivalent to the energy gap between the conduction band and the valence band, and the energy is emitted as light. Then it becomes a light-emitting device.

Nitride semiconductors are attracting great interest in the development of optical devices and high-power electronic devices due to their high thermal stability and wide bandgap energy. In particular, a blue light emitting device, a green light emitting device, and an ultraviolet (UV) light emitting device using a nitride semiconductor have been commercialized and widely used.

Among the conventional light emitting devices, there is a lateral type light emitting device in which an electrode layer is disposed in one direction of the epi layer, and this horizontal type light emitting device increases the operating voltage of the light emitting device due to a narrow current flow. As a result, current efficiency is lowered, and there is a problem that is vulnerable to electrostatic discharge.

In order to solve this problem, conventionally, a via hole type vertical light emitting device has been developed in which a via hole is formed under an epi layer to place an electrode.

In order to manufacture a via-hole type vertical light emitting device in the prior art, a number of mesa etching holes are created for n-contacts. When the mesa etching hole is large, the operating voltage is lowered, but the light If there is a loss and the mesa etching hole is small, there is a problem in that the light efficiency is increased but the operating voltage is increased.

The embodiment is to provide a light emitting device, a method of manufacturing a light emitting device, a light emitting device package, and a lighting system in which an operating voltage is reduced by adding a pattern to the upper surface of a contact electrode.

In addition, according to the embodiment, to provide a light emitting device, a method of manufacturing a light emitting device, a light emitting device package, and a lighting system in which various patterns are applied to the upper surface of a contact electrode.

The light emitting device according to the embodiment includes a first conductive type semiconductor layer, a second conductive type semiconductor layer disposed under the first conductive type semiconductor layer, and between the first conductive type semiconductor layer and the second conductive type semiconductor layer. A plurality of holes for exposing a part of the first conductive type semiconductor layer through the disposed active layer and through the second conductive type semiconductor layer and the active layer from the bottom surface of the second conductive type semiconductor layer, and the second conductive type A first contact electrode electrically connected to the first conductive type semiconductor layer through the plurality of holes from a bottom surface of the semiconductor layer, and a first electrode layer electrically connected to the first contact electrode, and The upper surface may include at least one pattern.

The lighting system according to the embodiment may include a light emitting unit including the light emitting device.

According to the embodiment, a light-emitting device, a method of manufacturing a light-emitting device, a light-emitting device package, and a lighting system, in which an operating voltage is reduced by adding a pattern to the upper surface of a contact electrode can be provided.

In addition, according to the embodiment, it is possible to provide a light emitting device having high light efficiency, a light emitting device having high light efficiency, a light emitting device package, and a lighting system by applying various patterns to the upper surface of the contact electrode.

1 is a partially enlarged cross-sectional view of a light emitting device according to an embodiment.
2 is a plan view of a first contact electrode of a light emitting device according to an exemplary embodiment.
3A is a cross-sectional view of a first contact electrode of a light emitting device according to an embodiment.
3B and 3F are cross-sectional views of a first contact electrode of a light emitting device according to different embodiments, respectively.
4A is a cross-sectional photographed image of a first contact electrode according to an embodiment.
4B is a graph illustrating an improved driving voltage according to an embodiment.
5 is a partially enlarged cross-sectional view of a light emitting device according to another embodiment.
6 is a partially enlarged cross-sectional view of a light emitting device according to another embodiment.
7 to 18 are cross-sectional views illustrating a method of manufacturing a light emitting device according to the embodiment.

In the description of the embodiment, each layer (film), region, pattern or structure is "on/over" or "under" of the substrate, each layer (film), region, pad, or patterns. In the case of being described as being formed in, "on/over" and "under" include both "directly" or "indirectly" formed do. In addition, the criteria for the top/top or bottom of each layer will be described based on the drawings.

1 is a partially enlarged cross-sectional view of a light emitting device according to an embodiment.

Referring to FIG. 1, a light emitting device 100 according to an embodiment includes a first conductive type semiconductor layer 112 and a second conductive type semiconductor layer 116 disposed under the first conductive type semiconductor layer 112. And, an active layer 114 disposed between the first conductive type semiconductor layer 112 and the second conductive type semiconductor layer 116, and the second conductive type from the bottom of the second conductive type semiconductor layer 116 A plurality of holes H may be included through the semiconductor layer 116 and the active layer 114 to expose a part of the first conductive semiconductor layer 112.

The light emitting device 100 according to the embodiment includes the channel layer 120 on the plurality of holes H, and the first through the plurality of holes H from the bottom of the second conductive semiconductor layer 116. A first contact electrode 160 electrically connected to the one-conductive semiconductor layer 112, an insulating layer 140 disposed between the first contact electrode 160 and the plurality of holes H, and the first contact electrode 160 A first electrode layer 150 electrically connected to the first contact electrode 160 and a second contact electrode 132 electrically connected to the second conductive semiconductor layer 116 may be included.

According to an embodiment, the upper surface of the first contact electrode 160 may include at least one pattern, and the pattern increases the contact area between the first contact electrode 160 and the first conductive semiconductor layer 112 As a result, the operating voltage can be lowered by reducing the contact resistance.

2 is a plan view of a first contact electrode of a light emitting device according to an embodiment, and FIG. 3A is a cross-sectional view of a first contact electrode of a light emitting device according to the embodiment. 3A is a cross-sectional view of the first contact electrode 160a taken along line A-B of FIG. 2.

In an embodiment, the first contact electrode 160a may include at least one pattern P, and the vertical cross-sectional shape of the pattern P may be hemispherical.

The height H and the width W1 of the patterns may be the same, and the horizontal width W1 of the patterns P may be greater than the horizontal width W2 between the patterns. For example, when the height H of the pattern is 2 μm and the horizontal width W1 of the pattern is 2 μm, the horizontal width W2 between the patterns may be 1 μm, but is not limited thereto.

3B is a cross-sectional view of a first contact electrode of a light emitting device according to another exemplary embodiment. In an embodiment, the first contact electrode 160b may include at least one pattern P, and the vertical cross-sectional shape of the pattern P may be hemispherical.

Each height H of the pattern may be the same, and each of the horizontal widths W1, W3, W5, and W7 of the pattern may be different from each other. Also, the horizontal widths W2, W4, and W6 between the patterns may be different from each other.

3C is a cross-sectional view of a first contact electrode of a light emitting device according to another exemplary embodiment. In an embodiment, the first contact electrode 160c may include at least one pattern P, and the vertical cross-sectional shape of the pattern P may be hemispherical.

Each height (H1, H2, H3, H4) of the pattern may be different, and each of the horizontal widths (W1, W3, W5, W7) of the pattern may be the same. In addition, the horizontal widths W2, W4, and W6 between the patterns may be the same.

3D is a cross-sectional view of a first contact electrode of a light emitting device according to another exemplary embodiment. In an embodiment, the first contact electrode 160d may include at least one pattern P, and the vertical cross-sectional shape of the pattern P may be hemispherical.

Each height (H1, H2, H3, H4) of the pattern may be different from each other, and each horizontal width (W1, W3, W5, W7) of the pattern may be different from each other. Also, the horizontal widths W2, W4, and W6 between the patterns may be different from each other.

Depending on the embodiment, the pattern P may have a vertical cross-sectional structure of at least one of a trapezoid, a square, and a triangle.

3E is a cross-sectional view of a first contact electrode of a light emitting device according to another exemplary embodiment.

In an embodiment, the first contact electrode 160e may include at least one pattern, and the vertical cross-sectional shape of the pattern may be a trapezoidal shape. The height H and the width W1 of the patterns may be the same, and the horizontal width W1 of the patterns P may be greater than the horizontal width W2 between the patterns. For example, when the height H of the pattern is 2 μm and the horizontal width W1 of the pattern is 2 μm, the horizontal width W2 between the patterns may be 1 μm, but is not limited thereto.

3F is a cross-sectional view of a first contact electrode of a light emitting device according to another exemplary embodiment.

Referring to FIG. 3F, the first contact electrode 160f according to another embodiment may include at least one pattern, and the pattern may include at least one fine pattern mp. Depending on the embodiment, the pattern may be irregularly arranged.

That is, the first contact electrode 160f may decrease the operating voltage by increasing the contact area with the first conductive semiconductor layer 112 through a pattern including the fine pattern mp.

4A is a cross-sectional photographed image of a first contact electrode according to an exemplary embodiment, and FIG. 4B is a graph illustrating a driving voltage according to the exemplary embodiment of FIG. 4A.

Referring to FIG. 4A, FIG. 4A (a) is an image taken of a cross-section of a first contact electrode on which a pattern is not formed, and FIG. 4A (b) is a pattern formed according to the embodiment shown in FIG. 3A. This is an image of a cross-section of one contact electrode 160a, and FIG. 4A(c) is an image of a cross-section of the first contact electrode 160c on which a fine pattern is formed according to the embodiment shown in FIG. 3C.

Referring to FIGS. 4A to 4C and FIG. 4B, as the contact area between the first contact electrode 160 and the first conductive semiconductor layer 112 increases, the contact resistance can be reduced, and thus electrical characteristics. This can be improved. For example, the operating voltage of the first contact electrode on which the pattern is not formed may be 4.21V, the operating voltage of the first contact electrode 160a may be 3.83V, and the operating voltage of the first contact electrode 160c may be 3.61 Can be V The operating voltage of the first contact electrode on which the pattern is not formed is reduced by 0.6V, so that electrical characteristics may be improved.

5 is a partially enlarged cross-sectional view of a light emitting device according to another exemplary embodiment.

Referring to FIG. 5, it is a modified example of a part of the light emitting device shown in FIG. 1.

In an embodiment, the first contact electrode 160 may include a protrusion 160p extending to the first conductive semiconductor layer 112. The protrusion 160p may be disposed on an upper surface of the first contact electrode 160, and a horizontal width of an upper surface of the protrusion 160p may be greater than a horizontal width of a lower surface of the protrusion 160p.

Both sides of the protrusion 160p may further include reflective portions (not shown), and the reflective portion may prevent light from being blocked from being transmitted upward due to the protrusion 160p.

The upper surface of the protrusion 160p of the first contact electrode 160 may be disposed higher than the upper surface of the insulating layer 140.

Accordingly, since the first contact electrode 160 contacts the first conductive semiconductor layer 112 even at the protrusion 160p, the contact area is widened and contact resistance can be reduced, thereby improving electrical characteristics.

The horizontal width W1 of the protrusion 160p may be larger than the horizontal width W2 of the hole H. For example, when the horizontal width W2 of the hole H is 60 μm, the horizontal width W1 of the protrusion 160p may be 70 μm, and the horizontal width W1 of the protrusion 160p is increased to increase the contact area. With this widening, contact resistance can be reduced, and electrical characteristics can be improved.

6 is a partially enlarged cross-sectional view of a light emitting device according to another exemplary embodiment.

Referring to FIG. 6, it is a modified example of a part of the light emitting device shown in FIG. 5.

In the light emitting device 100 according to the embodiment, an ion implantation region 165 may be formed on the protrusion 160p of the first contact electrode 160. For example, the ion implantation region 165 may be disposed above the protrusion 160p of the first contact electrode 160. In addition, the ion implantation region 165 may be disposed on a side surface of the protrusion 160p of the first contact electrode. Depending on the embodiment, the ion implantation region 165 may be disposed on the upper side and side surfaces of the protrusion 160p of the first contact electrode 160.

According to the embodiment, by forming the ion implantation region 165 on the upper side and/or the side surface of the first contact electrode 160, the diffusion of carriers may be promoted, thereby improving the current implantation efficiency.

The ion implantation region 165 may be implanted with first conductivity type ions. For example, when the first conductive type ions are n-type ions, a group 5 element such as Si is implanted to reduce the resistance with the first contact electrode 160 to reduce the operating voltage, thereby improving electrical characteristics. Can be.

The horizontal width of the ion implantation region 165 may be greater than the horizontal width of the protrusion of the first contact electrode.

According to the embodiment, by forming the ion implantation region 165 on the first contact electrode 160, carrier implantation efficiency can be improved, thereby providing a light emitting device having an improved light flux.

7 to 18 are cross-sectional views illustrating a method of manufacturing a light emitting device according to an embodiment.

Hereinafter, a method of manufacturing a light emitting device according to an exemplary embodiment will be described with reference to FIGS. 7 to 18, and features of the present invention will be described in detail. Meanwhile, the following manufacturing process drawings are described based on the embodiment of FIG. 1, but the embodiment is not limited thereto.

First, as shown in FIG. 7, the light emitting structure layer 110 may be formed on the growth substrate 105. The light emitting structure layer 110 may include a first conductivity type semiconductor layer 112, an active layer 114, and a second conductivity type semiconductor layer 116.

The growth substrate 105 is loaded onto the growth equipment, and may be formed in a layer or pattern form using a compound semiconductor of a group II to VI element thereon.

The growth equipment is an electron beam evaporator, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma laser deposition (PLD), dual-type thermal evaporator sputtering, metal organic chemical vapor (MOCVD). deposition) or the like may be employed, but is not limited to such equipment.

The growth substrate 105 may be a conductive substrate or an insulating substrate. For example, the growth substrate 105 may be selected from the group consisting _{of a sapphire substrate (Al 2} 0 ₃ ), GaN, SiC, ZnO, Si, GaP, InP, Ga ₂ 0 _{3, and GaAs.}

A buffer layer (not shown) may be formed on the growth substrate 105. The buffer layer reduces the difference in lattice constant between the growth substrate 105 and the nitride semiconductor layer, and the materials are GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP. Can be selected from.

An undoped semiconductor layer (not shown) may be formed on the buffer layer, and the undoped semiconductor layer may be formed of an undoped GaN-based semiconductor, and may be formed as a semiconductor layer having a lower conductivity than an n-type semiconductor layer. .

A first conductivity type semiconductor layer 112 may be formed on the buffer layer or the undoped semiconductor layer. Thereafter, an active layer 114 may be formed on the first conductivity type semiconductor layer 112, and a second conductivity type semiconductor layer 116 may be sequentially stacked on the active layer 114.

Another layer may be further disposed above or below each of the semiconductor layers, and may be formed in a superlattice structure using, for example, a group III-V compound semiconductor layer, but the embodiment is not limited thereto.

The first conductivity type semiconductor layer 112 is a compound semiconductor of a group III-V element doped with a first conductivity type dopant, such as GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, It can be selected from GaAsP, AlGaInP, and the like. For example, the first conductivity type semiconductor layer 112 is _{a semiconductor having a composition formula of In x} Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1) It can be formed in layers.

The first conductivity-type semiconductor layer 112 may be an n-type semiconductor layer, and the first conductivity-type dopant may include an n-type dopant such as Si, Ge, Sn, Se, and Te.

The first conductivity type semiconductor layer 112 may be formed as a single layer or multiple layers, and two different layers among GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP are alternately formed. It may include a super-lattice structure arranged as.

The active layer 114 may include a single quantum well structure, a multiple quantum well structure, a quantum wire structure, or a quantum dot structure. The active layer 114 may be formed in a cycle of a well layer and a barrier layer using a compound semiconductor material of a group III-V element. The well layer includes _{a semiconductor layer having a composition formula of In x} Al _y Ga _1-xy N (0≦x≦1, 0≦y≦1, 0≦x+y≦1), and the barrier layer is In _x Al _y Ga _1-xy N (0≦x≦1, 0≦y≦1, 0≦x+y≦1) may be formed as a semiconductor layer having a composition formula. The barrier layer may be formed of a material having a band gap higher than that of the well layer.

The active layer 114 may include, for example, at least one of a period of an InGaN well layer/GaN barrier layer, a period of an InGaN well layer/AlGaN barrier layer, and a period of an InGaN well layer/InGaN barrier layer. .

The second conductivity type semiconductor layer 116 is formed on the active layer 114, and the second conductivity type semiconductor layer 116 is a compound semiconductor of a group III-V element doped with a second conductivity type dopant, for example, It can be selected from GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, and the like. The second conductivity type semiconductor layer 116 _{is formed of a semiconductor layer having a composition formula of In x} Al _y Ga _1-xy N (0≤x≤1, 0≤y≤1, 0≤x+y≤1). I can.

The second conductivity-type semiconductor layer 116 may be a p-type semiconductor layer, and the second conductivity-type dopant includes a p-type dopant such as Mg and Zn. The second conductivity type semiconductor layer 116 may be formed as a single layer or multiple layers, but is not limited thereto.

The second conductivity type semiconductor layer 116 may include a superlattice structure in which two different layers of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP are alternately disposed. I can.

The first conductivity type semiconductor layer 112, the active layer 114, and the second conductivity type semiconductor layer 116 may be defined as a light emitting structure layer 110. In addition, a third conductivity type semiconductor layer (not shown), for example, a semiconductor layer having a polarity opposite to that of the second conductivity type may be formed on the second conductivity type semiconductor layer 116.

Accordingly, the light emitting structure layer 110 may include at least one of an n-p junction, a p-n junction, an n-p-n junction, and a p-n-p junction structure. In the following description, a structure in which the second conductivity type semiconductor layer 116 is disposed on the uppermost layer of the light emitting structure layer 110 will be described as an example.

Next, as shown in FIG. 8, a mesa etching process for removing a part of the light emitting structure may be performed.

For example, a plurality of holes H may be formed through the second conductivity type semiconductor layer 116 and the active layer 114 to expose a part of the first conductivity type semiconductor layer 112.

In the embodiment, the plurality of holes H is at a predetermined angle from the first conductivity type semiconductor layer 112 to the top surface of the second conductivity type semiconductor layer 116, for example, with respect to the top surface of the light emitting structure layer 110. It can be formed at an obtuse angle.

In an embodiment, a pattern may be formed on the first conductive type semiconductor layer 112 in contact with the lower side of the plurality of holes H. The shape of the pattern may be dependent on an etching process condition.

In an embodiment, the horizontal width of the plurality of holes H may decrease toward the lower side. Meanwhile, in FIG. 1, the horizontal width of the plurality of holes H may decrease toward the upper side.

Referring to FIG. 1, according to the embodiment, the area of the active layer 114 and the first conductivity type semiconductor layer 112 that are removed by decreasing the horizontal width of the plurality of holes H decreases upward, thereby reducing the luminous efficiency. Can contribute to

Next, the channel layer 120 may be formed on the plurality of holes H as shown in FIG. 9. The channel layer 120 is not formed in a region where the first contact electrode 160 to be formed will be formed. May not. Through this, a part of the first conductivity type semiconductor layer 112 may be exposed.

The channel layer 120 functions as an electrical insulating layer between the first contact electrode 160 and the active layer 114 and the second conductivity type semiconductor layer 116 to be formed thereafter.

The channel layer 120 may be formed of one or more materials selected _{from SiO x} , SiO _x N _y , Al ₂ O ₃ , and TiO _2.

In addition, in an embodiment, the channel layer 120 may have a reflectance of more than 50%. For example, the channel layer 120 _{may be formed of a material selected from SiO 2} , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , and TiO ₂ , and a reflective material is included in the insulating material. It can be formed in a mixed form.

For example, the channel layer 120 may be formed in a form in which any one or more of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, or Hf is mixed with an insulating material. I can.

According to the embodiment, when the emitted light moves downward, it is reflected in the channel layer 120 as well, thereby minimizing light absorption and increasing light efficiency.

Next, as shown in FIG. 9, a first contact electrode 160 may be formed on the plurality of holes H. The first contact electrode 160 may include a pattern corresponding to the pattern formed on the first conductive type semiconductor layer 112.

Referring to FIG. 9, in an embodiment, the width of the first contact electrode 160 may increase from an upper surface to a lower surface. Meanwhile, with reference to FIG. 1, the width of the first contact electrode 160 may decrease from an upper surface to a lower surface.

Through this, the possibility of a short circuit between the first contact electrode 160 and the material of the second electrode layer 130 to be formed later is reduced, and the area in which the first contact electrode 160 contacts the first conductivity type semiconductor layer 112 is maximized. Meanwhile, the area occupied by the first contact electrode 160 may be reduced to increase light efficiency.

Next, a second contact electrode 132 may be formed on the second conductivity type semiconductor layer 116.

The second contact electrode 132 is in ohmic contact with the second conductivity type semiconductor layer 116, includes at least one conductive material, and may be formed of a single layer or multiple layers.

For example, the second contact electrode 132 may include at least one of a metal, a metal oxide, and a metal nitride material.

The second contact electrode 132 includes a light-transmitting material, for example, indium tin oxide (ITO), indium zinc oxide (IZO), IZO nitride (IZON), indium zinc tin oxide (IZTO), and indium aluminum (IAZO). zinc oxide), IGZO(indium gallium zinc oxide), IGTO(indium gallium tin oxide), AZO(aluminum zinc oxide), ATO(antimony tin oxide), GZO(gallium zinc oxide), IrOx, RuOx, RuOx/ITO, Ni It may include at least one of /IrOx/Au, Ni/IrOx/Au/ITO, Pt, Ni, Au, Rh, or Pd.

Next, as shown in FIG. 10, a reflective layer 134 may be formed on the second contact electrode 132.

The reflective layer 134 is disposed on the second contact electrode 132 and may reflect light incident through the second contact electrode 132.

The reflective layer 134 includes a metal, for example, one layer or a plurality of materials composed of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf, and two or more alloys thereof. It can be formed in layers.

Next, as shown in FIG. 11, a capping layer 136 may be formed on the reflective layer 134.

Including the second contact electrode 132, the reflective layer 134, and the capping layer 136, it may be referred to as a second electrode layer 130, and the second electrode layer 130 includes power supplied from the pad electrode 180. May be supplied to the second conductivity type semiconductor layer 116.

The capping layer 136 is disposed on the reflective layer 134 and may supply power supplied from the pad electrode 180 to the reflective layer 134. The capping layer 136 may function as a current diffusion layer.

The capping layer 136 includes a metal and is a material having high electrical conductivity, such as Sn, Ga, In, Bi, Cu, Ni, Ag, Mo, Al, Au, Nb, W, Ti, Cr, Ta, It may contain at least one of Al, Pd, Pt, Si, and optional alloys thereof.

Next, as shown in FIG. 12, an insulating layer 140 may be formed on the capping layer 136 and the channel layer 120.

The insulating layer 140 may be formed to expose the first contact electrode 160.

The insulating layer 140 electrically insulates the first contact electrode 160 and another semiconductor layer.

In addition, the insulating layer 140 may be disposed between the first electrode layer 150 and the channel layer 120 to be formed thereafter to block electrical contact.

The insulating layer 140 may be formed of a material selected _{from SiO 2} , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , and TiO _2.

As described above, the insulating layer 140 may have a reflectance of more than 50%. For example, the insulating layer 140 may be formed of a material selected _{from SiO 2} , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , and TiO _2. It can be formed in a mixed form.

For example, the insulating layer 140 may be formed in a form in which any one or more of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, or Hf are mixed with an insulating material. I can.

According to the embodiment, the physical properties of the insulating layer 140 formed between the first contact electrode 160 and the plurality of holes H are formed of a reflective layer material, so that light absorption in the insulating layer 140 functioning as a passivation is prevented. By minimizing it, light efficiency can be increased.

In addition, the thickness of the insulating layer 140 may be 1 μm to 2 μm.

According to the exemplary embodiment, a short-circuit prevention function and a decrease in light efficiency may be prevented by optimally controlling the thickness ratio of the insulating layer 140 formed between the first contact electrode 160 and the plurality of holes H.

According to the light emitting device according to the embodiment, it is possible to increase the light efficiency by controlling the thickness ratio or physical properties of the passivation layer.

Next, as shown in FIG. 13, a diffusion barrier layer 154 is formed on the insulating layer 140 and the first contact electrode 160, and a bonding layer 156 is formed on the diffusion barrier layer 154. I can.

The diffusion barrier layer 154 and/or the bonding layer 156 may include at least one of Ti, Au, Sn, Ni, Cr, Ga, In, Bi, Cu, Ag, or Ta.

The diffusion barrier layer 154 and/or the bonding layer 156 may be formed in at least one of a vapor deposition method, a sputtering method, and a plating method, or may be attached as a conductive sheet.

The bonding layer 156 may not be formed, but is not limited thereto.

Next, as shown in FIG. 14, a support member 158 may be formed on the bonding layer 156.

Including the diffusion barrier layer 154, the bonding layer 156, and the support member 158 may be referred to as a first electrode layer 150, and the first electrode layer 150 controls power supplied from the lower electrode 159. It can be supplied to the 1 conductive type semiconductor layer 112.

The support member 158 may be bonded to the bonding layer 156, but is not limited thereto.

The support member 158 may be a conductive support member, and as a base substrate, at least one of copper (Cu), gold (Au), nickel (Ni), molybdenum (Mo), copper-tungsten (Cu-W), etc. It can be one.

In addition, the support member 158 may be implemented as a carrier wafer (eg, Si, Ge, GaAs, ZnO, SiC, SiGe, Ga ₂ 0 ₃ , GaN, etc.), and may be formed on a circuit pattern of a board or a lead frame of a package. Can be bonded with solder.

Next, as shown in FIG. 15, the growth substrate 105 may be removed. In this case, the surface of the first conductivity type semiconductor layer 112 may be exposed by removing the undoped semiconductor layer (not shown) remaining after the growth substrate 105 is removed.

The growth substrate 105 may be removed by physical or/and chemical methods. For example, the method of removing the growth substrate 105 may be removed by a laser lift off (LLO) process. For example, the growth substrate 105 is lifted off by irradiating a laser having a wavelength of a predetermined region onto the growth substrate 105.

Alternatively, the growth substrate 105 may be separated by removing a buffer layer (not shown) disposed between the growth substrate 105 and the first conductivity type semiconductor layer 112 using a wet etching solution.

By removing the growth substrate 105 and removing the buffer layer by etching or polishing, the upper surface of the first conductivity type semiconductor layer 112 may be exposed.

The top surface of the first conductivity type semiconductor layer 112 is an N-face, and may be a surface closer to the growth substrate.

The upper surface of the first conductivity type semiconductor layer 112 may be etched by a method such as ICP/RIE (Inductively Coupled Plasma/Reactive Ion Etching), or polished with a polishing equipment.

Next, as shown in FIG. 16, a part of the light emitting structure layer 110 may be removed to expose a part of the channel layer 120.

For example, a portion of the first conductivity type semiconductor layer 112, the active layer 114, and the second conductivity type semiconductor layer 116 in the region where the pad electrode 180 is to be formed may be removed.

For example, by performing wet etching or dry etching, the circumference of the light emitting structure layer 110, that is, a channel region or an isolation region, which is a boundary region between a chip and a chip, may be removed, and the channel layer 120 is exposed. Can be.

A light extraction structure may be formed on the upper surface of the first conductivity type semiconductor layer 112, and the light extraction structure may be formed in a roughness or pattern. The light extraction structure may be formed by a wet or dry etching method.

Next, as shown in FIG. 17, a passivation layer 170 may be formed on the exposed channel layer 120 and the light emitting structure layer 110.

Thereafter, a portion of the passivation layer 170 and the channel layer 120 in the region where the pad electrode 180 is to be formed may be removed to expose a portion of the capping layer 136.

The passivation layer 170 and the passivation layer 170 may be formed of a material selected from _{SiO x} N _y , Si ₃ N ₄ , Al ₂ O ₃ , and TiO _2.

Next, as shown in FIG. 18, a pad electrode 180 may be formed on the exposed capping layer 136.

The pad electrode 180 may be formed of a material such as Ti/Au, but is not limited thereto.

The pad electrode 180 is a portion to be bonded with a wire, and may be disposed on a predetermined portion of the light emitting structure layer 110, and may be formed in one or a plurality.

In addition, as shown in FIG. 1, a lower electrode 159 may be formed under the first electrode layer 150, and the lower electrode 159 is made of a material having high conductivity, for example, a material such as Ti, Al, or Ni. It may be employed, but is not limited thereto.

According to the embodiment, a light emitting device having improved electrical characteristics, a method of manufacturing a light emitting device, a light emitting device package, and a lighting system can be provided.

In addition, according to the embodiment, it is possible to provide a light emitting device having improved light flux by improving carrier injection efficiency, a method of manufacturing a light emitting device, a light emitting device package, and a lighting system.

The light emitting device according to the embodiment may be installed in the light emitting device package. The light emitting device package according to the embodiment includes a body, a first lead electrode and a second lead electrode disposed on the body, and a light emitting device provided on the body and electrically connected to the first and second lead electrodes. And a molding member surrounding the light emitting device.

A plurality of light emitting devices or light emitting device packages according to the embodiment may be arrayed on a substrate, and an optical member such as a lens, a light guide plate, a prism sheet, and a diffusion sheet may be disposed on an optical path of the light emitting device package. Such a light emitting device package, a substrate, and an optical member may function as a light unit. The light unit may be implemented as a top view or a side view type, and may be provided to display devices such as portable terminals and notebook computers, or may be variously applied to lighting devices and indicating devices.

Another embodiment may be implemented as a display device, an indicator device, or a lighting device including the light emitting device or the light emitting device package described in the above-described embodiments. For example, the display device includes a bottom cover, a reflector disposed on the bottom cover, a light emitting module that emits light, a light guide plate disposed in front of the reflector and guiding light emitted from the light emitting module forward, and An optical sheet including prism sheets disposed in front, a display panel disposed in front of the optical sheet, an image signal output circuit connected to the display panel and supplying an image signal to the display panel, and a color disposed in front of the display panel Filters may be included. Here, the bottom cover, the reflector, the light emitting module, the light guide plate, and the optical sheet may form a backlight unit.

In addition, the lighting device includes a light source module including a substrate and a light emitting device package according to the embodiment, a radiator for dissipating heat from the light source module, and a power supply unit that processes or converts an electrical signal received from the outside and provides it to the light source module. Can include. For example, the lighting device may include a lamp, a head lamp, or a street light.

100; Light-emitting element
112; First conductive type semiconductor layer
114; Active layer
116; Second conductive semiconductor layer
130; Second electrode layer
140; Insulating layer
150; First electrode layer
160; First contact electrode
160p; projection part
165; Ion implantation area

Claims (15)

A first conductive type semiconductor layer;
A second conductive type semiconductor layer disposed under the first conductive type semiconductor layer;
An active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer;
A plurality of holes penetrating through the second conductive semiconductor layer and the active layer from the bottom of the second conductive semiconductor layer to expose a portion of the bottom of the first conductive semiconductor layer;
A first contact electrode electrically connected to the first conductive type semiconductor layer through the plurality of holes from the bottom of the second conductive type semiconductor layer; And
And a first electrode layer in contact with a bottom surface of the first contact electrode and electrically connected to the first contact electrode,
The top surface of the first contact electrode directly contacts the bottom surface of the first conductive type semiconductor layer exposed by the plurality of holes,
The horizontal width of the first contact electrode decreases from the first conductive type semiconductor layer toward the first electrode layer,
A top surface of the first contact electrode facing the first conductive type semiconductor layer includes at least one pattern,
A light emitting device having a horizontal width of the pattern greater than a horizontal width between adjacent patterns. The method of claim 1,
The pattern is a light emitting device having at least one vertical cross-sectional structure of a hemispherical shape, a trapezoid shape, a square shape, and a triangle. The method of claim 1,
The pattern further includes at least one fine pattern disposed on a surface of the pattern. The method of claim 3,
The fine pattern is a light emitting device that is irregularly arranged on the pattern. The method of claim 1,
The pattern is a light emitting device disposed between the first conductive semiconductor layer and the first contact electrode. delete The method of claim 1,
The horizontal width of the pattern is twice the horizontal width between the adjacent patterns. A first conductive type semiconductor layer;
A second conductive type semiconductor layer disposed under the first conductive type semiconductor layer;
An active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer;
A plurality of holes penetrating through the second conductive semiconductor layer and the active layer from the bottom of the second conductive semiconductor layer to expose a portion of the bottom of the first conductive semiconductor layer;
A first contact electrode electrically connected to the first conductive semiconductor layer from a bottom surface of the second conductive semiconductor layer through the plurality of holes, and including protrusions having different upper and lower widths;
A first electrode layer in contact with a bottom surface of the first contact electrode and electrically connected to the first contact electrode; And
And an ion implantation region disposed between the first conductive semiconductor layer and the protrusion,
The horizontal width of the protrusion decreases from the first conductive type semiconductor layer toward the first electrode layer,
The ion implantation region directly contacts a top surface and a side surface of the protrusion facing the first conductive semiconductor layer, and has a horizontal width greater than a horizontal width of the protrusion. The method of claim 8,
A light emitting device further comprising reflective layers on both sides of the protrusion. delete delete The method of claim 8,
A light emitting device having a horizontal width of the protrusion greater than a horizontal width of a hole in the active layer. delete delete An illumination system comprising a light-emitting unit comprising the light-emitting element according to any one of claims 1 to 5, 7 to 9, and 12.

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