KR102044235B1 - 전자부품의 제조 방법 및 성막 장치 - Google Patents

전자부품의 제조 방법 및 성막 장치 Download PDF

Info

Publication number
KR102044235B1
KR102044235B1 KR1020170123194A KR20170123194A KR102044235B1 KR 102044235 B1 KR102044235 B1 KR 102044235B1 KR 1020170123194 A KR1020170123194 A KR 1020170123194A KR 20170123194 A KR20170123194 A KR 20170123194A KR 102044235 B1 KR102044235 B1 KR 102044235B1
Authority
KR
South Korea
Prior art keywords
electronic component
electronic components
electronic
metal film
holder
Prior art date
Application number
KR1020170123194A
Other languages
English (en)
Korean (ko)
Other versions
KR20180035687A (ko
Inventor
테츠야 오다
잇세이 야마모토
토루 코마츠
Original Assignee
가부시키가이샤 무라타 세이사쿠쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시키가이샤 무라타 세이사쿠쇼 filed Critical 가부시키가이샤 무라타 세이사쿠쇼
Publication of KR20180035687A publication Critical patent/KR20180035687A/ko
Application granted granted Critical
Publication of KR102044235B1 publication Critical patent/KR102044235B1/ko

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physical Vapour Deposition (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
KR1020170123194A 2016-09-29 2017-09-25 전자부품의 제조 방법 및 성막 장치 KR102044235B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2016-192042 2016-09-29
JP2016192042A JP2018056393A (ja) 2016-09-29 2016-09-29 電子部品の製造方法および成膜装置

Publications (2)

Publication Number Publication Date
KR20180035687A KR20180035687A (ko) 2018-04-06
KR102044235B1 true KR102044235B1 (ko) 2019-11-13

Family

ID=61836010

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020170123194A KR102044235B1 (ko) 2016-09-29 2017-09-25 전자부품의 제조 방법 및 성막 장치

Country Status (2)

Country Link
JP (1) JP2018056393A (ja)
KR (1) KR102044235B1 (ja)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN118215995A (zh) * 2021-11-10 2024-06-18 株式会社村田制作所 模块

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001244284A (ja) * 2000-02-28 2001-09-07 Nec Corp 半導体装置およびその製造方法
JP2009044123A (ja) * 2007-07-19 2009-02-26 Citizen Finetech Miyota Co Ltd 電子部品の製造方法および電子部品。
JP2016115722A (ja) * 2014-12-11 2016-06-23 アピックヤマダ株式会社 半導体製造装置、半導体装置、及び、半導体装置の製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001244284A (ja) * 2000-02-28 2001-09-07 Nec Corp 半導体装置およびその製造方法
JP2009044123A (ja) * 2007-07-19 2009-02-26 Citizen Finetech Miyota Co Ltd 電子部品の製造方法および電子部品。
JP2016115722A (ja) * 2014-12-11 2016-06-23 アピックヤマダ株式会社 半導体製造装置、半導体装置、及び、半導体装置の製造方法

Also Published As

Publication number Publication date
KR20180035687A (ko) 2018-04-06
JP2018056393A (ja) 2018-04-05

Similar Documents

Publication Publication Date Title
US10455748B2 (en) High-frequency module
CN102695366B (zh) 电子部件内置电路板及其制造方法
KR101250677B1 (ko) 반도체 패키지 및 그의 제조 방법
JP5951863B2 (ja) 電子部品モジュール及びその製造方法
JP2013165180A (ja) 電子部品及び電子部品の製造方法
US10217711B2 (en) Semiconductor package and manufacturing method thereof
US20190043662A1 (en) High frequency component
JPH11251303A (ja) プラズマ処理装置
EP3893610A1 (en) Circuit board
KR102000954B1 (ko) 회로 모듈의 제조 방법 및 성막 장치
KR20050029389A (ko) 전자제품의 보드내 부품들의 이엠아이 및 이에스디 차폐장치 및 그 제조방법
KR102044235B1 (ko) 전자부품의 제조 방법 및 성막 장치
US6861588B2 (en) Laminated ceramic electronic component and method of producing the same
US20070264496A1 (en) Solderable Plastic EMI Shielding
KR102016980B1 (ko) 회로모듈의 제조 방법 및 성막 장치
WO2011118307A1 (ja) コンデンサ内蔵基板の製造方法、及び該製造方法に使用可能な素子シートの製造方法
KR102128294B1 (ko) 전자부품의 제조 방법 및 성막 장치
US20130082366A1 (en) Semiconductor package and method of manufacturing the same
US10861683B2 (en) Vacuum device
KR20110131622A (ko) 반도체 패키지의 제조 방법
JP2013127993A (ja) コンデンサ素子、コンデンサ内蔵基板、素子シート、及びこれらの製造方法
JP2004119604A (ja) シールド型回路基板およびその製造方法
TWI821884B (zh) 電鍍裝置及製造封裝結構之方法
WO2022044515A1 (ja) 高周波電子部品及びモジュール
WO2022044516A1 (ja) 高周波電子部品

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant