KR101757877B1 - Solar cell and manufacturing method thereof - Google Patents

Abstract

The present invention relates to a solar cell and a manufacturing method thereof.
An example of a solar cell according to the present invention is a polycrystalline silicon substrate doped with an impurity of a first conductivity type; An emitter portion which is located on an upper surface of the polycrystalline silicon substrate, which is an upper surface of the polycrystalline silicon substrate, and which is doped with an impurity of a second conductivity type opposite to the first conductivity type to form a pn junction with the polycrystalline silicon substrate; A first highly doped region located above the front surface of the polycrystalline silicon substrate and doped with impurities of a second conductivity type at a higher concentration than the emitter region; A front electrode part disposed on an upper surface of the first highly doped portion; An antireflection film formed on an upper front surface of the emitter section; And a rear electrode portion disposed on a rear upper surface of the polycrystalline silicon substrate, wherein the front surface of the emitter portion includes a plurality of depressions including a curved surface, the distances between the center portions of two depressions adjacent to each other in the plurality of depressions, They are the same within the scope.

Description

SOLAR CELL AND MANUFACTURING METHOD THEREOF

The present invention relates to a solar cell and a manufacturing method thereof.

Recently, as energy resources such as oil and coal are expected to be depleted, interest in alternative energy to replace them is increasing, and solar cells that produce electric energy from solar energy are attracting attention.

Typical solar cells have a semiconductor portion that forms a p-n junction by different conductive types, such as p-type and n-type, and electrodes connected to semiconductor portions of different conductivity types, respectively.

When light is incident on the solar cell, electrons and holes are generated in the semiconductor, and electric charges generated by the pn junction move to the n-type and p-type semiconductors, respectively. Move to the negative side. The transferred electrons and holes are collected by the different electrodes connected to the p-type semiconductor portion and the n-type semiconductor portion, respectively, and the electrodes are connected by a wire to obtain electric power.

An object of the present invention is to provide a solar cell having improved photoelectric conversion efficiency and a method of manufacturing the same.

An example of a solar cell according to the present invention is a polycrystalline silicon substrate doped with an impurity of a first conductivity type; An emitter portion located at an upper portion of a front surface of the polycrystalline silicon substrate, the emitter portion being doped with an impurity of a second conductivity type opposite to the first conductivity type to form a p-n junction with the polycrystalline silicon substrate; A first highly doped region located above the front surface of the polycrystalline silicon substrate and doped with impurities of a second conductivity type at a higher concentration than the emitter region; A front electrode part disposed on an upper surface of the first highly doped portion; An antireflection film formed on an upper front surface of the emitter section; And a rear electrode portion disposed on a rear upper surface of the polycrystalline silicon substrate, wherein the front surface of the emitter portion includes a plurality of depressions including a curved surface, the distances between the center portions of two depressions adjacent to each other in the plurality of depressions, They are the same within the scope.

Here, the surface of the polycrystalline silicon substrate in contact with the emitter portion may have a depressed shape with a curved surface. Further, the emitter portion may not be formed in at least a part of the rear surface of the first highly doped portion.

In addition, the front and rear surfaces of the first highly doped portion may have a flat surface.

The solar cell may further include a second heavily doped portion formed at a portion of the upper portion of the emitter front surface, and the second heavily doped portion may be formed at an upper portion between the plurality of depressions in the upper portion of the front surface of the emitter portion.

Here, the side surface of the second highly doped portion may have a curved surface, and the curved surface formed on the second highly doped portion may be continuous with the curved surface of the depression included in the emitter portion.

The antireflection film may be in contact with the emitter portion and the second highly doped portion, and the front surface of the antireflection film may have a depressed shape corresponding to a depression formed by the emitter portion and the second heavily doped portion.

The plurality of depressed portions formed in the emitter portion may coincide with each other in the column direction and the row direction, or a plurality of depressed portions formed in the emitter portion may not coincide with each other in at least one of the column direction and the row direction.

The arrangement of the plurality of depressions formed in the emitter section may be triangular or rectangular, and the planar shape of the plurality of depressions formed in the emitter section may be triangular, rectangular, polygonal or circular.

In addition, the error range with respect to the distances between the center portions of the two depressions adjacent to each other may be within 10%, and the sheet resistance of the first heavily doped portion is 5Ω / sq. And the sheet resistance of the emitter portion is 80? / Sq. Lt; / RTI > / sq.

An example of a method of manufacturing a solar cell according to the present invention is a method of manufacturing a solar cell including a first doping step of doping a front surface, which is an incident surface of a polycrystalline silicon substrate doped with an impurity of a first type, with an impurity of a second conductivity type, step; After the first doping step, placing a mask having a plurality of holes on the front surface of the polycrystalline silicon substrate doped with the impurity of the second conductivity type; Etching the entire surface of the polycrystalline silicon substrate in a state where the mask is disposed to form a plurality of depressions on the impurity-doped portion of the second conductivity type and on the entire surface of the polycrystalline silicon substrate; And a second doping step of doping the entire surface of the polycrystalline silicon substrate having a plurality of depressions with an impurity of the second conductivity type.

Here, the doping concentration of the impurities of the second type in the first doping step may be higher than the doping concentration of the impurities of the second type in the second doping step.

Further, the plurality of holes formed in the mask may be formed at a portion corresponding to the remaining region except the region where the front electrode portion is to be formed, and the interval between the holes formed in the mask may be smaller than 1.5 to 2.5 times the hole width have.

In addition, the etching step may use isotropic wet etching.

The impurities of the second conductivity type may then be doped further into the interior of the polycrystalline silicon substrate by the second doping step than by the first doping step.

A solar cell and a method of fabricating the same according to the present invention are characterized in that a plurality of patterned depressions are formed on the upper surface of the emitter portion formed on the polycrystalline silicon substrate and a heavily doped region is formed on the rear surface of the front electrode portion to improve photoelectric conversion efficiency It is effective.

1 is a perspective view of a part of a solar cell according to the present invention.
FIG. 2 is a side view of the solar cell according to the present invention, taken along line II-II in FIG.
FIG. 3 is a view for explaining the polycrystalline silicon substrate according to the present invention and the heavily doped portion in more detail by enlarging portion A in a state where the anti-reflection film and the front electrode are removed in FIG.
FIG. 4 is a side view of the polycrystalline silicon substrate taken along line IV-IV in FIG.
5 to 12 are views for explaining an example of a method of manufacturing a solar cell according to the present invention.
13 and 14 are views for explaining an example of a mask applicable to the solar cell manufacturing method according to the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In order to clearly illustrate the present invention, parts not related to the description are omitted, and similar parts are denoted by like reference characters throughout the specification.

In the drawings, the thickness is enlarged to clearly represent the layers and regions. When a layer, film, region, plate, or the like is referred to as being "on" another portion, it includes not only the case directly above another portion but also the case where there is another portion in between. Conversely, when a part is "directly over" another part, it means that there is no other part in the middle. Further, when a certain portion is formed as "whole" on another portion, it means not only that it is formed on the entire surface of the other portion but also that it is not formed on the edge portion.

Hereinafter, a method of a solar cell according to an embodiment of the present invention will be described with reference to the accompanying drawings.

First, a solar cell 1 according to an embodiment of the present invention will be described in detail with reference to FIGS. 1 to 4. FIG.

FIG. 1 is a perspective view of a part of the solar cell 1 according to the present invention, and FIG. 2 is a side view of the solar cell 1 according to the present invention according to the line II-II in FIG.

An example of such a solar cell 1 includes a polycrystalline silicon substrate 110, an emitter section 122 located on the upper surface of the polycrystalline silicon substrate 110, A heavily doped portion 121 including a heavily doped portion 121A and a second heavily doped portion 121B formed on a part of an upper portion of the front surface of the emitter portion 122; The front electrode part 150 positioned on the upper surface of the first high concentration doping part 121A and the front electrode part 150 positioned on the upper surface of the polycrystalline silicon substrate 110 And a rear electrode unit 160 positioned on the rear upper surface of the display unit.

Here, the polycrystalline silicon substrate 110, the emitter section 122, the first high concentration doping section 121A, the second high concentration doping section 121B and the rear electric section 170 are formed in the same semiconductor substrate 10, And the second heavily doped portion 121B and the rear electric field portion 170 may be omitted in some cases.

The polycrystalline silicon substrate 110 may be formed by doping an impurity of the first conductivity type, for example, an impurity of a p-type conductivity type, and is formed of a polycrystalline silicon material.

Impurities of a trivalent element such as boron (B), gallium (Ga), and indium (In) are doped into the polycrystalline silicon substrate 110 when the polycrystalline silicon substrate 110 has a p-type conductivity type . Alternatively, however, the polycrystalline silicon substrate 110 may be of the n-type conductivity type and may be made of a semiconductor material other than silicon. Impurities of pentavalent elements such as phosphorus (P), arsenic (As), and antimony (Sb) are doped into the polycrystalline silicon substrate 110 when the polycrystalline silicon substrate 110 has an n-type conductivity type.

When light is incident on the polycrystalline silicon substrate 110, electrons and holes are generated due to the energy of the incident light.

The surface of the polycrystalline silicon substrate 110 in contact with the emitter portion has a shape recessed into the polycrystalline silicon substrate 110 as shown in FIG. Such a depressed shape has a curved surface as shown in Fig.

The emitter section 122 is located on the front side of the polycrystalline silicon substrate 110 and the emitter section 122 is formed of a second conductive type opposite to the conductive type of the polycrystalline silicon substrate 110, Lt; RTI ID = 0.0 > conductive < / RTI > Thus forming a p-n junction with the first conductive type portion of the polysilicon substrate 110.

Due to the built-in potential difference due to the pn junction, the electrons in the holes and holes generated by the light incident on the polycrystalline silicon substrate 110 move to the n-type and the holes move to the p-type do. Therefore, when the polycrystalline silicon substrate 110 is a p-type and the emitter section 122 is n-type, the holes migrate toward the polycrystalline silicon substrate 110 and electrons migrate toward the emitter section 122.

Since the emitter layer 122 forms a pn junction with the first conductive type of the polysilicon substrate 110, that is, the polysilicon substrate 110, unlike the present embodiment, the polysilicon substrate 110 is an n-type conductive type The emitter section 122 has a p-type conductivity type. In this case, the electrons move toward the polycrystalline silicon substrate 110 and the holes move toward the emitter part 122. [

When the emitter section 122 has an n-type conductivity type, the emitter section 122 may be formed by doping an impurity of a pentavalent element into the polycrystalline silicon substrate 110, and the emitter section 122 may be formed by p- The emitter layer 122 may be formed by doping an impurity of a trivalent element into the polycrystalline substrate 110. [

At this time, the sheet resistance of the emitter section 122 is, for example, 80? / Sq. Lt; / RTI > / sq. Accordingly, the amount of light absorbed by the emitter layer 122 is further reduced, thereby increasing the amount of light incident on the polycrystalline silicon substrate 110 and further reducing the charge loss due to the impurity.

1 and 2, the front surface of the emitter section 122 includes a plurality of depressions including curved surfaces. The plurality of depressions may be formed in a shape having a constant pattern, and thus the distances between the center portions of the two depressions adjacent to each other in the plurality of depressions are equal to each other within the error range. This will be described in more detail in FIG.

The curved surfaces of the depressions formed on the front surface of the emitter layer 122 may have the same shape as the depressed surface formed on the front surface of the polycrystalline silicon substrate 110.

In addition, the emitter layer 122 may not be formed on at least a part of the rear surface of the high-concentration doped region in which the front electrode portion is disposed on the upper portion. However, the present invention is not limited to the above-described FIG. 1 and FIG. 2, and the emitter section 122 may be formed on the entire rear surface of the high concentration doped region in which the front electrode section is disposed on the upper part.

The high concentration doping portion 121 may include a first high concentration doping portion 121A and a second high concentration doping portion 121B as described above and the first high concentration doping portion 121A and the second high concentration doping portion 121B Is a region located above the front surface of the polycrystalline silicon substrate 110 and doped with impurities of the second conductivity type at a higher concentration than the emitter layer 122. Here, the second heavily doped portion 121B may be omitted. Hereinafter, a case where the second heavily doped portion 121B is formed as shown in FIGS. 1 and 2 will be described as an example.

The front electrode part 150 is formed on the front surface of the first heavily doped portion 121A and the front surface and the rear surface of the first heavily doped portion 121A may have a flat surface. By forming the first heavily doped region 121A in this manner, the contact resistance between the first heavily doped region 121A and the front electrode unit 150 can be reduced.

At least a part of the rear surface of the first heavily doped portion 121A may not have the emitter portion 122, as shown in FIG.

Next, the second heavily doped portion 121B may be formed on a portion of the upper surface of the emitter layer 122. For example, the second heavily doped portion 121B may be formed on an upper portion between a plurality of depressions in an upper portion of the front surface of the emitter portion 122. In addition, the side surface of the second highly doped portion 121B may have a curved surface, and the curved surface formed on the second highly doped portion 121B may be continuous with the curved surface of the depression included in the emitter portion 122. [ However, it is also possible that the curved surface formed in the second highly doped portion 121B is not continuous with the curved surface of the depression included in the emitter portion 122, or that the side surface of the second highly doped portion 121B does not have a curved surface.

Here, the heavily doped region 121 including the first heavily doped region 121A and the second heavily doped region 121B is doped with impurities at a relatively higher concentration than the emitter region 122. Therefore, the sheet resistance of the high-concentration doping portion 121 is lower than the sheet resistance of the emitter portion 122 and the sheet resistance of the first high-concentration doping portion 121A and the second high-concentration doping portion 121B is, for example, 5Ω / sq. The conductivity of the first high concentration doping portion 121A and the conductivity of the second high concentration doping portion 121B can be more stably secured and the movement amount of the charge can be further increased.

The first heavily doped portion 121A forms a p-n junction with the polycrystalline silicon substrate 110, like the emitter portion 122.

The emitter 122 and the first heavily doped portion 121A forming the pn junction with the polysilicon substrate 110 are electrically connected to the polysilicon substrate 110 by a built- The electrons in the holes and the electrons in the holes are moved to the n-type and the holes move to the p-type. Therefore, when the polycrystalline silicon substrate 110 is a p-type and the emitter portion 122 and the first heavily doped portion 121A are n-type, the separated holes move to the back surface of the polycrystalline silicon substrate 110, And moves toward the first high concentration doped region 121A.

The emitter portion 122 and the first heavily doped portion 121A form a pn junction with the first conductive portion of the polycrystalline silicon substrate 110. Thus, unlike the present embodiment, the polycrystalline silicon substrate 110 has n-type conductivity Type, the emitter portion 122 and the first high-concentration doped portion 121A have a p-type conductivity type. In this case, the separated electrons move toward the rear surface of the polycrystalline silicon substrate 110, and the separated holes move toward the emitter section 122 and the first heavily doped section 121A.

When the emitter section 122 and the first heavily doped section 121A have an n-type conductivity type, the emitter section 122 and the first heavily doped section 121A are doped with impurities of the pentavalent element on the polycrystalline silicon substrate 110 Alternatively, when a p-type conductive type is used, the impurity may be formed by doping an impurity of a trivalent element into the polycrystalline silicon substrate 110.

As described above, when electrons and holes are moved by the pn junction between the first conductive type portion of the polycrystalline silicon substrate 110 and the emitter portion 122 and the first high concentration doped portion 121A, the sheet resistance value and the impurity doping concentration The amount of charge loss due to the impurity is differentiated by the direction of movement of the charge by the emitter portion 122 and the first high concentration doping portion 121A which are different from each other.

That is, when the emitter layer 122 and the first heavily doped portion 121A move through a portion having a lower sheet resistance value than when the emitter layer 122 and the first heavily doped portion 121A move through a portion having a high sheet resistance value, charge transfer is more easily performed, As the concentration increases, the conductivity of the part increases.

In addition, not only the first high-concentration doping portion 121A but also the second high-concentration doping portion 121B have low sheet resistance values. Therefore, when the corresponding charge (for example, electrons) moves to the emitter section 122, the second high concentration doping section 121B located in a part of the front upper part of the emitter section 122 causes the emitter section 122 122 moves to the second high concentration doping portion 121B having a relatively low sheet resistance value in the emitter portion 122 having a high sheet resistance value. Thus, the charge transferred to the second high-concentration doping portion 121B can move at a high speed to the first high-concentration doping portion 121A while minimizing the loss of charges during transfer due to the relatively low sheet resistance.

The electrons transferred to the emitter section 122 located on the front surface of the polycrystalline silicon substrate 110 are electrically connected to the adjacent second heavily doped region 122 having a lower sheet resistance value than the emitter section 122 121B. Therefore, the second heavily doped portion 121B acts as a semiconductor channel for transferring the charge moving toward the emitter portion 122.

The first heavily doped portion 121A and the second heavily doped portion 121B are formed on the front surface of the polycrystalline silicon substrate 110 such that impurities of the second conductivity type are doped at a higher concentration than the emitter portion 122 And then forming a plurality of depressions on the front surface of the polycrystalline silicon substrate 110 by wet etching using the patterned mask. This will be described more specifically when the method of manufacturing the solar cell 1 according to the present invention is described.

The anti-reflection film 130 prevents the light incident from the outside from being reflected to the outside, and is formed on the front surface of the emitter section 122. More specifically, the antireflection film 130 may be formed on the front surface of the emitter section 122 where the front electrode section 150 is not formed in the upper part of the front surface of the polycrystalline silicon substrate 110.

The antireflection film 130 may be formed in contact with the emitter layer 122 and the second heavily doped layer 121B and the front surface of the antireflection layer 130 may include the emitter layer 122 and the second heavily- And may have a depressed shape corresponding to a recess formed by the recess 121B. That is, the front surface of the antireflection film 130 may have a plurality of recessed shapes.

However, unlike FIGS. 1 and 2, although not shown, the front surface of the antireflection film 130 may not be recessed and may be flat.

The antireflection film 130 may be formed of a transparent material, for example, a hydrogenated silicon nitride film (SiNx), a hydrogenated silicon oxide film (SiOx), or a hydrogenated silicon oxynitride film (SiOxNy).

The antireflection film 130 reduces the reflectivity of the light incident on the solar cell 1 and increases the selectivity of a specific wavelength region to increase the efficiency of the solar cell 1.

The antireflection film 130 may be formed on the surface of the emitter layer 122 or the heavily doped layer 121 and the surface of the dangling bond 122 existing near the emitter layer 122 or the heavily doped layer 121 through the hydrogen (H) injected in forming the antireflection film 130. [ bond to a stable bond to perform a passivation function to reduce the disappearance of charges that have migrated toward the surface of the emitter layer 122 or the heavily doped layer 121 due to defects. Therefore, the efficiency of the solar cell 1 is improved because the amount of charges lost on the surface of the emitter portion 122 or the high concentration doping portion 121 and in the vicinity thereof due to the defect is reduced.

In this embodiment, the antireflection film 130 has a single film structure, but may have a multilayer film structure such as a double film, and may be omitted if necessary.

1, the front electrode unit 150 includes a plurality of finger electrodes 151 and a plurality of front bus bars 152 formed in a direction crossing each other, and the first high concentration doping unit 121A and is electrically connected to the first heavily doped portion 121A.

However, as shown, a plurality of front bus bars 152 may be omitted. However, as shown in FIG. 1, a case where a plurality of front bus bars 152 are included in the front electrode unit 150 will be described below as an example.

Here, the plurality of finger electrodes 151 and the plurality of front bus bars 152 are connected to the first heavily doped portion 121A. A plurality of finger electrodes 151 and a plurality of front bus bars 152 collect electrons, for example, electrons, which have migrated toward the first highly doped portion 121A.

The front bus bar 152 is located on the same layer as the plurality of finger electrodes 151 and is electrically and physically connected to the corresponding finger electrodes 151 at a position intersecting the respective finger electrodes 151.

1, the plurality of finger electrodes 151 has a stripe shape extending in a direction crossing the front bus bar 152, and the front bus bar 152 has a finger electrode 151, And the front electrode unit 150 may be disposed in a lattice form on the entire surface of the polycrystalline silicon substrate 110. In this case,

Since each front bus bar 152 must collect the charges collected by the plurality of finger electrodes 151 that intersect as well as the charge (e.g., electrons) moving from the highly doped portion 121 and move them in a desired direction, The width of the bus bar 152 may be greater than the width of each finger electrode 151.

The front bus bar 152 is connected to an external device, and outputs the collected electric charge to an external device. The front electrode part 150 having the plurality of finger electrodes 151 and the front bus bar 152 is made of at least one conductive material such as silver (Ag).

In FIG. 1, the number of the finger electrodes 151 and the front bus bars 152 located in the polysilicon substrate 110 is merely an example, and may be changed in some cases.

The rear electric field portion 170 is a region in which impurities of the same conductivity type as that of the polycrystalline silicon substrate 110 are doped at a higher concentration than the polycrystalline silicon substrate 110, for example, a P + region.

Due to the difference in impurity concentration between the first conductive region and the back conductive portion 170 of the polycrystalline silicon substrate 110, a potential barrier is formed, thereby causing the electron migration toward the rear conductive portion 170, While the hole transport toward the rear electric section 170 becomes easier. Accordingly, the rear electric field 170 reduces the amount of charges lost due to the recombination of electrons and holes at the back surface and the vicinity of the polysilicon substrate 110, and accelerates the movement of a desired electric charge (e.g., a hole) Thereby increasing the amount of charge transfer to the gate electrode 160.

The rear electrode unit 160 is disposed on the rear surface of the semiconductor substrate 10 and may include a rear electrode 161 and a rear bus bar 162 as shown in FIG. Here, however, the rear bus bar 162 may be omitted in some cases.

The rear electrode 161 is in contact with the rear electric field portion 170 located on the rear surface of the polysilicon substrate 110 and substantially the entire rear surface of the polysilicon substrate 110 except for the portion where the rear bus bar 162 is located. . In an alternative example, the back electrode 161 may not be located at the edge of the back surface of the polycrystalline silicon substrate 110. [ The rear electrode 161 includes a conductive material such as aluminum (Al).

This rear electrode 161 collects charge, for example, holes, moving from the rear electric section 170 side.

Since the rear electrode 161 is in contact with the rear electric part 170 having a higher impurity concentration than the polysilicon substrate 110, the polysilicon substrate 110, that is, the rear electric part 170 and the rear electrode 161 ) Is reduced and the charge transfer efficiency from the polycrystalline silicon substrate 110 to the rear electrode 161 is improved.

The plurality of rear bus bars 162 are located on the rear surface of the polycrystalline silicon substrate 110 where the rear electrodes 161 are not located and are connected to the adjacent rear electrodes 161. At this time, the plurality of rear bus bars 162 and the rear electrodes 161 are located on the same layer on the rear surface of the polysilicon substrate 110.

This plurality of rear bus bars 162 collects charge transferred from the rear electrode 161, similar to a plurality of front bus bars 152.

A plurality of rear bus bars 162 are also connected to the external devices so that the charges (e.g., holes) collected by the plurality of rear bus bars 162 are output to the external device.

The plurality of rear bus bars 162 may be made of a material having a better conductivity than the back electrode 161 and may include at least one conductive material such as silver Ag, .

These rear bus bars 162 are spaced apart from one another in the same direction as the extending direction of the front bus bars 152. At this time, the plurality of rear bus bars 162 correspond to the plurality of front bus bars 152 with the polysilicon substrate 110 as a center. In this example, the number of rear bus bars 162 is the same as the number of front bus bars 152.

Such a rear bus bar 162 may have a stripe shape in parallel with the front bus bar 152, for example.

The operation of the solar cell 1 according to this embodiment having such a structure is as follows.

When light is irradiated to the solar cell 1 and is incident on the high concentration doping portion 121, the emitter portion 122 and the polycrystalline silicon substrate 110 which are the semiconductor portions through the antireflection film 130, A hole is generated. At this time, the reflection loss of the light incident on the polycrystalline silicon substrate 110 is reduced by the anti-reflection film 130, and the amount of light incident on the polycrystalline silicon substrate 110 is increased.

These electrons and holes are electrically connected to each other by the pn junction of the polycrystalline silicon substrate 110 and the emitter section 122 or the pn junction of the first heavily doped section 121A and the polycrystalline silicon substrate 110, The charge having the conductive type is moved toward the high concentration doping portion 121 and the emitter portion 122 and the charge having the p type conductivity type is moved toward the polycrystalline silicon substrate 110 respectively.

The electrons moved toward the emitter section 122 are collected along the first heavily doped portion 121A by the plurality of finger electrodes 151 and the plurality of front bus bars 152 to be supplied to the plurality of front bus bars 152 And the holes moved toward the polycrystalline silicon substrate 110 are collected by the adjacent rear electrode 161 and the plurality of rear bus bars 162 and move along the plurality of rear bus bars 162. Accordingly, when the front bus bar 152 of one solar cell and the rear bus bar 162 of the neighboring solar cell are connected by a lead wire, a current flows and the power is used as an external power source. As a result, the photoelectric conversion efficiency of the solar cell 1 is improved.

3 and 4, the emitter portion and the second high concentration doping portion of the present invention will be described in more detail.

FIG. 3 is a cross-sectional view of the polysilicon substrate 110 and the first high concentration doped region 121A and the second high concentration doped region 121A according to the present invention in a state where the anti-reflection film 130 and the front electrode unit 150 are removed in FIG. FIG. 4 is a side view of the polycrystalline silicon substrate 110 taken along the line IV-IV in FIG. 3, in order to more specifically describe the doping portion 121B.

As shown in FIG. 3, the plurality of depressions formed in the emitter portion 122 according to the present invention may have the same distance between the center portions of two depressions adjacent to each other within an error range. That is, as shown in FIG. 3, the distances CD1, CD2 and CD3 between the centers of the two depressions adjacent to each other may be equal to each other within the error range.

Here, the error range with respect to distances (CD1, CD2, CD3) between the centers of the two depressions adjacent to each other may be within 10%. That is, when CD1 is 20 mu m, CD2 is 18 mu m, and CD3 is 22 mu m, CD2 and CD3 all fall within an error range of 10% based on CD1 having an intermediate (average) value, The distances CD1, CD2, and CD3 of the first and second optical discs can be treated as being equal to each other.

The plurality of depressions formed in the emitter section 122 according to the present invention may not have the center portions coinciding with each other in at least one of the column direction and the row direction. That is, as shown in FIG. 3, in the row direction parallel to the line IV-IV, the centers of the plurality of depressions formed in the emitter section 122 are arranged to be aligned with each other, but in the column direction perpendicular to the line IV- The center of the wealth may not coincide with each other.

In addition, unlike FIG. 3, a plurality of depressions formed in the emitter section 122 may have their center portions coinciding with each other in the column direction and the row direction. Also, as shown in FIG. 3, the arrangement of the plurality of depressions formed in the emitter section 122 may be triangular, but may be a rectangle different from FIG.

In addition, the planar shape of a plurality of depressions formed in the emitter section 122 may be circular, as shown in FIG. 3, but may alternatively have a shape of a triangle, a quadrangle, or a polygon. This may vary depending on the pattern of the mask used to etch the entire surface of the polycrystalline silicon substrate 110. [

The second highly doped portion 121B may be formed on an upper portion between a plurality of depressions in the upper portion of the front surface of the emitter portion 122. The side surface of the second highly doped portion 121B may be a curved surface Lt; / RTI >

As shown in FIG. 3, the second highly doped portion 121B formed on the upper portion between the plurality of depressed portions in the upper portion of the front surface of the emitter portion 122 may include a plurality of holes have.

As shown in FIGS. 3 and 4, each of the holes of the second high-concentration doping portion 121B has a first opening portion WH1 located on the incident surface of the second high-concentration doping portion 121B and a second high- And a second opening (WH2) located on the rear surface of the second opening 121B.

3 and 4, the emitter portion 122 may be exposed through the second opening portion WH2 in each hole of the second highly doped portion 121B. That is, the second opening portion WH2 is formed in the rear portion of the second high-concentration doping portion 121B in contact with the emitter portion 122, so that the depressed portion of the emitter portion 122 is exposed.

The width of the first opening portion WH1 in each hole of the second highly doped portion 121B may be larger than the width of the second opening portion WH2. By forming each hole of the second high-concentration doped portion 121B in this way, the inner side surface of each hole of the second high-concentration doped portion 121B is inclined obliquely to the incident surface, and the incident light is reflected back to the outside The incident surface of the solar cell 1 can be further expanded and the photoelectric conversion efficiency of the solar cell 1 can be further improved.

Here, for example, the width of the second opening portion WH2 may be 0.8 times or more of the width of the first opening portion WH1, or the width of the first opening portion WH1 may be larger than the width of the second opening portion WH2 The width of the first opening portion WH1 may have a value between 1 mu m and 15 mu m and the width of the second opening portion WH2 may have a value between 0.5 mu m and 13 mu m.

In addition, the interval DH between the first openings WH1 in the region where the anti-reflection film 130 is formed in the upper portion of the region of the second highly doped portion 121B has a value of 5 mu m or less . That is, even if there is no gap DH between the first openings WH1 and there is a gap DH between the first openings WH1, it can be made 5 mu m or less. Since the distance between the first openings WH1 is minimized, the amount of light that is incident on the solar cell 1 and is reflected back to the outside by the incident surface between the first openings WH1 can be minimized, The conversion efficiency can be further improved.

The thickness D1 of the second highly doped portion 121B may have a value between approximately 0.3 mu m and 0.6 mu m and the thickness D2 of the emitter portion 122 may be set to a value between 0.2 mu m and 0.4 mu m And the sum (D1 + D2) of the thicknesses of the second heavily doped portion 121B and the emitter portion 122 can be set to a value between 0.5 mu m and 1 mu m.

The shape of each hole of the second high concentration doping portion 121B may be a circular shape as shown in FIG. 3 when viewed from the incident surface of the solar cell 1, but it may be a rectangular shape or a honeycomb shape (hexagonal shape ) Or a polygonal shape.

In addition, the holes of the second high-concentration doping portion 121B may be arranged in the same arrangement as the honeycomb structure as shown in FIG. 3, but may be formed in a lattice-like arrangement.

As described above, the second high-concentration doped region 121B disposed at the uppermost portion of the incident surface of the polycrystalline silicon substrate 110 includes a plurality of holes. As shown in FIGS. 3 to 4, The first high concentration doping portion 121A is formed only on the upper portion of the second high concentration doping portion 121B where the anti-reflection film 130 is formed and the portion A152 where the front electrode is formed on the upper portion. Holes may not be formed. Accordingly, in the portion A152 where the front electrode is formed, the first high concentration doped portion 121A can directly contact the first semiconductor to form a p-n junction.

3 and 4, the region A152 in which the front bus bar 152 is to be formed and the region A151 in which the finger electrode 151 is to be formed are formed on the first high concentration doping portion 121A, A plurality of holes may be formed only in the region A 130 where the anti-reflection film 130 is to be formed on the second high concentration doped region 121 B in the region of the remaining second high concentration doped region 121 B. have.

However, unlike FIGS. 3 to 4, a plurality of holes may also be formed in the first highly doped portion 121A. However, as shown in FIGS. 3 to 4, when a plurality of holes are formed only in the second high-concentration doping portion 121B and a plurality of holes are not formed in the first high-concentration doping portion 121A, The contact surface between the first high concentration doping portion 121A and the front electrode portion 150 can be further reduced because the surface contacting the front electrode portion 150 can be further flattened.

An example of a solar cell manufacturing method for manufacturing the solar cell 1 described with reference to Figs. 1 to 4 will now be described.

FIGS. 5 to 12 are views for explaining an example of a method for manufacturing a solar cell according to the present invention, and FIGS. 13 and 14 are views for explaining an example of a mask applicable to the solar cell manufacturing method according to the present invention.

As shown in FIG. 5, an example of a method of manufacturing a solar cell according to the present invention includes a step of forming a polycrystalline silicon substrate 110 doped with a first type impurity to form a polycrystalline silicon substrate 110, Doped with an impurity 121 'of the second conductivity type opposite to the impurity of the first conductivity type. Here, the depth to which the impurity 121 'of the second conductivity type is doped may be between 0.3 μm and 0.6 μm.

Accordingly, the polycrystalline silicon substrate 110 and the portion doped with the impurity 121 'of the second conductivity type are included in one semiconductor substrate 10.

6, after the first doping step, the impurity 121 'of the second conductivity type is formed on the upper part of the front surface of the doped polycrystalline silicon substrate 110 A mask 200 having a plurality of holes 200h is disposed.

Here, the shape of the plane viewed from above the mask 200 may be the same as that shown in Fig. FIG. 13A shows a plane of the mask 200, and FIG. 13B is a partially enlarged view of FIG. 13A.

13A, the mask 200 according to the present invention has a structure in which a finger electrode 151 is formed in a region where front electrode portions A151 and A152 are to be formed, that is, an incident surface of the polysilicon substrate 110 A plurality of holes 200h are formed in the area A152 corresponding to the area where the front bus bar 152 is to be formed and the area A152 corresponding to the area where the front bus bar 152 is to be formed. ) Can be formed.

By doing so, a plurality of depressed portions can be prevented from being formed in a portion where the first high concentration doped portion 121A is to be formed in the incident surface of the polycrystalline silicon substrate 110.

Here, the array of the plurality of holes 200h may have the same arrangement as the honeycomb structure as shown in FIG. 13, for example, and each of the holes 200h may have a round shape.

13, the width D3 of the hole 200h may have a value between 1 mu m and 10 mu m, and the width D3 between the hole 200h and the hole 200h may have a value between 1 mu m and 10 mu m. The interval D4 may have a value between 2 mu m and 20 mu m.

The distance D4 between each hole 200h and the hole 200h formed in the mask 200 may be between 1.5 and 2.5 times the width D3 of each hole 200h.

Thus, after the incident surface of the semiconductor substrate 10 is etched, the reflectance of the semiconductor substrate 10 is adjusted so that the distance DH between the depressed portion and the depressed portion of the semiconductor substrate 10 becomes approximately 0 mu m The semiconductor substrate 10 can be etched so that the first heavily doped portion 121A and the second heavily doped portion 121B of the semiconductor substrate 10 are appropriately formed.

Unlike the mask 200 described with reference to FIG. 13, the mask 200 shown in FIG. 14 may also be used for manufacturing the solar cell 1 according to the present invention.

14 (a) shows an entire plane of the mask 200, and FIG. 14 (b) shows a part of the mask 200. FIG. In the case of the mask 200 as shown in FIG. 14, a region A151 corresponding to a region where the finger electrode 151 is to be formed on the incident surface of the polysilicon substrate 110, a portion where the front bus bar 152 is to be formed, A plurality of holes 200h are not formed in the corresponding region A152, that is, a region where the first high concentration doped region 121A is to be formed, and only a region where the second high concentration doped region 121B is formed A plurality of holes can be formed as shown in FIG.

Here, the array of the plurality of holes 200h may have the same arrangement as the lattice structure, for example, unlike in FIG. 13, and the shape of each hole 200h may have a rectangular shape.

14, the horizontal and vertical widths W1 and W2 of the hole 200h may have a value between 1 μm and 10 μm, respectively, and the horizontal and vertical widths W1 and W2 between the holes 200h and 200h, The intervals D1 and D2 may have values between 2 mu m and 20 mu m.

Also in this case, the spaces D1 and D2 between the holes 200h and 200h can be set to be not more than twice the widths W1 and W2 of the holes 200h.

14, when the incident surface of the semiconductor substrate 10 is etched using the mask 200 as shown in Fig. 14, the planar shape of the depression formed on the incident surface of the semiconductor substrate 10 is different from that of Figs. It may be a square similar to the shape of the hole 200h of the mask 200 shown in Fig.

7, the incident surface of the semiconductor substrate 10 is etched to form a plurality of depressions on the entire surface of the semiconductor substrate 10 in a state where the mask 200 of FIG. 13 or FIG. 14 is arranged as shown in FIG. 6 An etching step is performed. Here, as a method of etching the incident surface of the semiconductor substrate 10, isotropic wet etching may be used. 7, the directions to be etched at the surface of the incident surface of the semiconductor substrate 10 can be etched at the same distance in the depth direction as well as in the lateral direction of the semiconductor substrate 10. [

When the mask 200 is removed as shown in FIG. 8, the polysilicon substrate 110 and the portion P1 'of the incident surface of the impurity-doped portion 121' of the second conductivity type, May include a plurality of recessed shapes.

Next, as shown in FIG. 9, a second doping step of doping the entire surface of the polycrystalline silicon substrate 110 on which a plurality of depressions are formed is performed to impurity of the second conductivity type.

Accordingly, as shown in FIG. 9, a portion of the impurity-doped portion 121 'of the second conductivity type including a plurality of recessed portions is formed by the second highly doped portion 121B, And the emitter portion 122 includes the lower surface of the depression portion of the polycrystalline silicon substrate 110 so that the portion of the second high concentration doped portion 121B May be formed on the rear surface.

Here, the first doping step shown in FIG. 5 may be the same as the doping concentration of the second doping step shown in FIG. 9, but the doping concentration of the first doping step may be higher than the doping concentration of the second doping step.

When the doping concentrations of the first doping step and the second doping step are the same, the doping of the high-concentration doping part 121 is performed twice through the first doping step and the second doping step, Type impurity may be doped at a higher concentration, so that the heavily doped region 121 may be formed.

Also, when the doping concentration of the first doping step is higher than the doping concentration of the second doping step, the heavily doped portion 121 can be formed by only the first doping step.

As a result, the heavily doped portion 121 and the emitter portion 122 may be formed through the first to the second doping steps, and the sheet resistance of the heavily doped portion 121 may be 5 Ω / sq. It has a value between 40Ω / sq. And 80Ω / sq. Is lower than the sheet resistance of the emitter section 122 having a value between about 120? / Sq., So that the high-concentration doping section 121 can serve as a semiconductor channel.

Through the first doping step, the etching step, and the second doping step, the emitter layer 122 and the heavily doped layer 121 may be formed as described above with reference to FIGS.

After the heavily doped portion 121 and the emitter portion 122 are formed in the semiconductor substrate 10 as shown in FIG. 10, the antireflection film 130 is formed on the upper surface of the semiconductor substrate 10 .

In this case, the antireflection film 130 is also formed in a plurality of recesses at the upper portion of the emitter layer 122 and the second highly doped portion 121B. However, A plurality of depressions are not formed in a part of the barrier film 130.

11, a material for forming the front electrode part 150 (for example, the finger electrode 151)) is formed on the upper part of the antireflection film 130 located above the first heavily doped part 121A. And a material 60 for forming the rear electrode unit 160 is formed on the rear surface of the semiconductor substrate 10.

12, a material 51 for forming the finger electrode 151 formed on the incident surface of the semiconductor substrate 10 through the thermal process penetrates the antireflection film 130 and enters the first heavily doped portion 121A And the material 60 for forming the rear electrode unit 160 formed on the rear surface of the semiconductor substrate 10 is also electrically connected to the rear electrode unit 160 by the same thermal process, And the first type impurity included in the rear electrode unit 160 is diffused into the rear surface of the semiconductor substrate 10 to form the rear electric part 170. [

Accordingly, the solar cell 1 according to the present invention as described with reference to Figs. 1 and 2 can be formed.

As described above, the method of manufacturing a solar cell according to the present invention includes a high-concentration doping portion 121 including a plurality of holes and an emitter portion 122 on the rear surface of the high-concentration doping portion 121, and a plurality of depressions formed on the surface of the incident surface The semiconductor substrate 10 can be manufactured more easily and the process yield can be improved. In addition, the method of manufacturing a solar cell according to the present invention includes forming a heavily doped portion 121 while using a relatively-low-cost multi-silicon wafer as a semiconductor substrate 10, A solar cell with improved photoelectric conversion efficiency can be manufactured.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, It belongs to the scope of right.

Claims (23)

A polycrystalline silicon substrate doped with an impurity of the first conductivity type and having a plurality of depressions including a curved surface in a part of the front surface which is an incident surface;
An emitter portion located in the partial region of the front surface of the polycrystalline silicon substrate and doped with an impurity of a second conductivity type opposite to the first conductivity type to form a pn junction with the polycrystalline silicon substrate;
A heavily doped region located on the front surface of the polycrystalline silicon substrate and doped with impurities of the second conductivity type at a higher concentration than the emitter region;
A front electrode part positioned above the heavily doped part;
An antireflection film disposed on the emitter; And
And a rear electrode part disposed on the rear upper surface of the polycrystalline silicon substrate,
Wherein the plurality of depressions are located in the partial region of the front surface of the polycrystalline silicon substrate except the region in which the front electrode portion is located,
Wherein the heavily doped region includes a first heavily doped region located in a region where the front electrode portion is located and a second heavily doped region located in the region, and the second heavily doped region is located on an inner upper surface of the depressed region,
Wherein the emitter portion is located in the partial region of the front surface of the polycrystalline silicon substrate except the region where the front electrode portion is located,
Between the depressed portion and the depressed portion, the emitter portion is located on the rear surface of the second highly doped portion,
Wherein the second highly doped portion is spaced apart from the polysilicon substrate with the emitter portion interposed therebetween.
delete delete The method according to claim 1,
And a surface of a front surface and a rear surface of the first highly doped portion contacting the front electrode portion has a flat surface.
delete delete The method according to claim 1,
And a side surface of the second highly doped portion has a curved surface. 8. The method of claim 7,
Wherein the curved surface of the second highly doped portion is continuous with the curved surface of the depression included in the emitter portion. The method according to claim 1,
Wherein the antireflection film is in contact with the emitter portion and the second highly doped portion. The method according to claim 1,
Wherein the front surface of the antireflection film has a depressed shape corresponding to a depression formed by the emitter portion and the second highly doped portion. The method according to claim 1,
Wherein a plurality of depressions formed in the emitter section are coincident with each other in a column direction and a row direction. The method according to claim 1,
Wherein the plurality of depressions formed in the emitter section do not coincide with each other in at least one of the column direction and the row direction. The method according to claim 1,
Wherein the arrangement of the plurality of depressions formed in the emitter section is triangular or square. The method according to claim 1,
Wherein the planar shape of the plurality of depressed portions formed in the emitter portion is a triangular, rectangular, polygonal, or circular shape. The method according to claim 1,
And the error range with respect to the distances between the centers of the two depressions adjacent to each other is within 10%. The method according to claim 1,
The sheet resistance of the heavily doped portion was 5 Ω / sq. ~ 40? / Sq. The method according to claim 1,
The sheet resistance of the emitter portion was 80 Ω / sq. ~ 120? / Sq. A first doping step of doping a front surface of the polycrystalline silicon substrate doped with the first type impurity with an impurity of a second conductivity type opposite to the impurity of the first type to form a highly doped portion;
After the first doping step, disposing a mask having a plurality of holes on the front surface of the polycrystalline silicon substrate doped with the impurity of the second conductivity type;
Etching a portion of a front surface of the polycrystalline silicon substrate in a state where the mask is disposed to etch a highly doped portion located in the partial region and forming a plurality of depressions in the partial region;
A second doping step of doping the part of the region in which the plurality of depressions are formed to form the emitter, the impurity of the second conductivity type at a lower doping concentration than the first doping step; And
Forming a front electrode part in an area other than the partial area after the second doping step,
According to the first doping step and the etching step, the heavily doped region includes a first heavily doped region located in a region where the front electrode portion is located and a second heavily doped region located in the partial region, A second highly doped portion formed on the inner upper surface of the depression,
The second doping step may include forming the emitter layer on the surface of the polycrystalline silicon substrate, the partial area of the polycrystalline silicon substrate excluding the area where the front electrode part is located,
Wherein the emitter portion is formed on a rear surface of the second highly doped portion between the depression and the depression, and the second highly doped portion is spaced apart from the semiconductor substrate with the emitter portion interposed therebetween.
delete 19. The method of claim 18,
Wherein the plurality of holes formed in the mask are formed in portions corresponding to the remaining regions except the region in which the front electrode portions are to be formed. 19. The method of claim 18,
Wherein a distance between each of the holes formed in the mask is smaller than 1.5 to 2.5 times the hole width. 19. The method of claim 18,
Wherein the etching step uses isotropic wet etching. 19. The method of claim 18,
Wherein the impurity of the second conductivity type is doped further into the interior of the polysilicon substrate by the second doping step than the first doping step.

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