KR101604929B1 - 공유된 가상 메모리를 지원하는 이종 컴퓨팅 시스템에서의 tlb 슛 다운을 위한 방법 및 장치 - Google Patents

공유된 가상 메모리를 지원하는 이종 컴퓨팅 시스템에서의 tlb 슛 다운을 위한 방법 및 장치 Download PDF

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KR101604929B1
KR101604929B1 KR1020147002511A KR20147002511A KR101604929B1 KR 101604929 B1 KR101604929 B1 KR 101604929B1 KR 1020147002511 A KR1020147002511 A KR 1020147002511A KR 20147002511 A KR20147002511 A KR 20147002511A KR 101604929 B1 KR101604929 B1 KR 101604929B1
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tlb
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KR20140028137A (ko
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라제쉬 엠. 산카란
알터그 코커
필립 란츠
아시트 케이. 밀릭크
제임스 비. 크로쓰랜드
아디트바 네이발
길버트 네이거
앤드류 브이. 앤더슨
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인텔 코포레이션
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1081—Address translation for peripheral access to main memory, e.g. direct memory access [DMA]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1048—Scalability
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/30—Providing cache or TLB in specific location of a processing system
    • G06F2212/303—In peripheral interface, e.g. I/O adapter or channel
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/68—Details of translation look-aside buffer [TLB]
    • G06F2212/682—Multiprocessor TLB consistency
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/68—Details of translation look-aside buffer [TLB]
    • G06F2212/683—Invalidation

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
KR1020147002511A 2011-07-26 2012-07-24 공유된 가상 메모리를 지원하는 이종 컴퓨팅 시스템에서의 tlb 슛 다운을 위한 방법 및 장치 Expired - Fee Related KR101604929B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/191,327 2011-07-26
US13/191,327 US9916257B2 (en) 2011-07-26 2011-07-26 Method and apparatus for TLB shoot-down in a heterogeneous computing system supporting shared virtual memory
PCT/US2012/047991 WO2013016345A2 (en) 2011-07-26 2012-07-24 Method and apparatus for tlb shoot-down in a heterogeneous computing system supporting shared virtual memory

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KR20140028137A KR20140028137A (ko) 2014-03-07
KR101604929B1 true KR101604929B1 (ko) 2016-03-18

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JP (2) JP6032855B2 (enExample)
KR (1) KR101604929B1 (enExample)
CN (2) CN106776379B (enExample)
DE (1) DE202012007252U1 (enExample)
GB (1) GB2506788B (enExample)
IN (1) IN2014CN00386A (enExample)
TW (1) TWI489278B (enExample)
WO (1) WO2013016345A2 (enExample)

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KR102655094B1 (ko) * 2018-11-16 2024-04-08 삼성전자주식회사 메모리를 공유하는 이종의 프로세서들을 포함하는 스토리지 장치 및 그것의 동작 방법
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KR20140028137A (ko) 2014-03-07
CN103827839A (zh) 2014-05-28
JP6032855B2 (ja) 2016-11-30
IN2014CN00386A (enExample) 2015-04-03
GB2506788A (en) 2014-04-09
US20130031333A1 (en) 2013-01-31
WO2013016345A2 (en) 2013-01-31
US9916257B2 (en) 2018-03-13
TWI489278B (zh) 2015-06-21
GB2506788B (en) 2020-05-27
GB201400358D0 (en) 2014-02-26
JP2017037672A (ja) 2017-02-16
CN106776379A (zh) 2017-05-31
WO2013016345A3 (en) 2013-04-11
CN103827839B (zh) 2016-12-21
JP2014526102A (ja) 2014-10-02
DE202012007252U1 (de) 2012-11-29
JP6378733B2 (ja) 2018-08-22
TW201333700A (zh) 2013-08-16
CN106776379B (zh) 2021-09-07

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