GB2506788B - Method and apparatus for TLB shoot-down in a heterogeneous computing system supporting shared virtual memory - Google Patents

Method and apparatus for TLB shoot-down in a heterogeneous computing system supporting shared virtual memory Download PDF

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Publication number
GB2506788B
GB2506788B GB1400358.6A GB201400358A GB2506788B GB 2506788 B GB2506788 B GB 2506788B GB 201400358 A GB201400358 A GB 201400358A GB 2506788 B GB2506788 B GB 2506788B
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GB
United Kingdom
Prior art keywords
computing system
virtual memory
system supporting
shared virtual
heterogeneous computing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB1400358.6A
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English (en)
Other versions
GB2506788A (en
GB201400358D0 (en
Inventor
Koker Atlug
Sankaran Rajesh
Lantz Philip
Mallick Asit
Crossland James
Navale Aditva
Neiger Gilbert
Anderson Andrew
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Intel Corp
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Intel Corp
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Publication of GB201400358D0 publication Critical patent/GB201400358D0/en
Publication of GB2506788A publication Critical patent/GB2506788A/en
Application granted granted Critical
Publication of GB2506788B publication Critical patent/GB2506788B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1081—Address translation for peripheral access to main memory, e.g. direct memory access [DMA]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1048—Scalability
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/30—Providing cache or TLB in specific location of a processing system
    • G06F2212/303—In peripheral interface, e.g. I/O adapter or channel
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/68—Details of translation look-aside buffer [TLB]
    • G06F2212/682—Multiprocessor TLB consistency
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/68—Details of translation look-aside buffer [TLB]
    • G06F2212/683—Invalidation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
GB1400358.6A 2011-07-26 2012-07-24 Method and apparatus for TLB shoot-down in a heterogeneous computing system supporting shared virtual memory Expired - Fee Related GB2506788B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/191,327 US9916257B2 (en) 2011-07-26 2011-07-26 Method and apparatus for TLB shoot-down in a heterogeneous computing system supporting shared virtual memory
PCT/US2012/047991 WO2013016345A2 (en) 2011-07-26 2012-07-24 Method and apparatus for tlb shoot-down in a heterogeneous computing system supporting shared virtual memory

Publications (3)

Publication Number Publication Date
GB201400358D0 GB201400358D0 (en) 2014-02-26
GB2506788A GB2506788A (en) 2014-04-09
GB2506788B true GB2506788B (en) 2020-05-27

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GB1400358.6A Expired - Fee Related GB2506788B (en) 2011-07-26 2012-07-24 Method and apparatus for TLB shoot-down in a heterogeneous computing system supporting shared virtual memory

Country Status (9)

Country Link
US (1) US9916257B2 (enExample)
JP (2) JP6032855B2 (enExample)
KR (1) KR101604929B1 (enExample)
CN (2) CN106776379B (enExample)
DE (1) DE202012007252U1 (enExample)
GB (1) GB2506788B (enExample)
IN (1) IN2014CN00386A (enExample)
TW (1) TWI489278B (enExample)
WO (1) WO2013016345A2 (enExample)

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EP3502906B1 (en) * 2016-06-08 2021-06-16 Google LLC Tlb shootdown for low overhead
US10540292B2 (en) 2016-06-08 2020-01-21 Google Llc TLB shootdowns for low overhead
US10282308B2 (en) * 2016-06-23 2019-05-07 Advanced Micro Devices, Inc. Method and apparatus for reducing TLB shootdown overheads in accelerator-based systems
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CN108932213A (zh) * 2017-10-10 2018-12-04 北京猎户星空科技有限公司 多操作系统间的通讯方法、装置、电子设备和存储介质
US10725932B2 (en) 2017-11-29 2020-07-28 Qualcomm Incorporated Optimizing headless virtual machine memory management with global translation lookaside buffer shootdown
US10990436B2 (en) * 2018-01-24 2021-04-27 Dell Products L.P. System and method to handle I/O page faults in an I/O memory management unit
US11106613B2 (en) 2018-03-29 2021-08-31 Intel Corporation Highly scalable accelerator
US10846235B2 (en) 2018-04-28 2020-11-24 International Business Machines Corporation Integrated circuit and data processing system supporting attachment of a real address-agnostic accelerator
DE102018004086A1 (de) 2018-05-18 2019-11-21 Singulus Technologies Ag Durchlaufanlage und Verfahren zum Beschichten von Substraten
KR102655094B1 (ko) * 2018-11-16 2024-04-08 삼성전자주식회사 메모리를 공유하는 이종의 프로세서들을 포함하는 스토리지 장치 및 그것의 동작 방법
US11036649B2 (en) 2019-04-04 2021-06-15 Cisco Technology, Inc. Network interface card resource partitioning
CN110968530B (zh) * 2019-11-19 2021-12-03 华中科技大学 一种基于非易失性内存的键值存储系统和内存访问方法
US12086082B2 (en) 2020-09-21 2024-09-10 Intel Corporation PASID based routing extension for scalable IOV systems
EP4388407A4 (en) * 2021-08-20 2025-04-30 INTEL Corporation Devices, methods, and systems for pretranslating a device translation lookaside buffer and extensions to input/output memory management unit protocols
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CN116594925B (zh) * 2023-04-24 2024-09-27 上海天数智芯半导体有限公司 一种地址转换系统、处理器、地址转换方法及电子设备

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Also Published As

Publication number Publication date
KR20140028137A (ko) 2014-03-07
CN103827839A (zh) 2014-05-28
JP6032855B2 (ja) 2016-11-30
IN2014CN00386A (enExample) 2015-04-03
GB2506788A (en) 2014-04-09
US20130031333A1 (en) 2013-01-31
WO2013016345A2 (en) 2013-01-31
US9916257B2 (en) 2018-03-13
TWI489278B (zh) 2015-06-21
KR101604929B1 (ko) 2016-03-18
GB201400358D0 (en) 2014-02-26
JP2017037672A (ja) 2017-02-16
CN106776379A (zh) 2017-05-31
WO2013016345A3 (en) 2013-04-11
CN103827839B (zh) 2016-12-21
JP2014526102A (ja) 2014-10-02
DE202012007252U1 (de) 2012-11-29
JP6378733B2 (ja) 2018-08-22
TW201333700A (zh) 2013-08-16
CN106776379B (zh) 2021-09-07

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PCNP Patent ceased through non-payment of renewal fee

Effective date: 20220724