GB201400358D0 - Method and apparatus for TLB shoot-down in a heterogeneous computing system supporting shared virtual memory - Google Patents

Method and apparatus for TLB shoot-down in a heterogeneous computing system supporting shared virtual memory

Info

Publication number
GB201400358D0
GB201400358D0 GBGB1400358.6A GB201400358A GB201400358D0 GB 201400358 D0 GB201400358 D0 GB 201400358D0 GB 201400358 A GB201400358 A GB 201400358A GB 201400358 D0 GB201400358 D0 GB 201400358D0
Authority
GB
United Kingdom
Prior art keywords
computing system
virtual memory
system supporting
shared virtual
heterogeneous computing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GBGB1400358.6A
Other versions
GB2506788B (en
GB2506788A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of GB201400358D0 publication Critical patent/GB201400358D0/en
Publication of GB2506788A publication Critical patent/GB2506788A/en
Application granted granted Critical
Publication of GB2506788B publication Critical patent/GB2506788B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1027Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/80Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1081Address translation for peripheral access to main memory, e.g. direct memory access [DMA]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1016Performance improvement
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1048Scalability
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/30Providing cache or TLB in specific location of a processing system
    • G06F2212/303In peripheral interface, e.g. I/O adapter or channel
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/68Details of translation look-aside buffer [TLB]
    • G06F2212/682Multiprocessor TLB consistency
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/68Details of translation look-aside buffer [TLB]
    • G06F2212/683Invalidation
GB1400358.6A 2011-07-26 2012-07-24 Method and apparatus for TLB shoot-down in a heterogeneous computing system supporting shared virtual memory Expired - Fee Related GB2506788B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/191,327 US9916257B2 (en) 2011-07-26 2011-07-26 Method and apparatus for TLB shoot-down in a heterogeneous computing system supporting shared virtual memory
PCT/US2012/047991 WO2013016345A2 (en) 2011-07-26 2012-07-24 Method and apparatus for tlb shoot-down in a heterogeneous computing system supporting shared virtual memory

Publications (3)

Publication Number Publication Date
GB201400358D0 true GB201400358D0 (en) 2014-02-26
GB2506788A GB2506788A (en) 2014-04-09
GB2506788B GB2506788B (en) 2020-05-27

Family

ID=47425977

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1400358.6A Expired - Fee Related GB2506788B (en) 2011-07-26 2012-07-24 Method and apparatus for TLB shoot-down in a heterogeneous computing system supporting shared virtual memory

Country Status (9)

Country Link
US (1) US9916257B2 (en)
JP (2) JP6032855B2 (en)
KR (1) KR101604929B1 (en)
CN (2) CN103827839B (en)
DE (1) DE202012007252U1 (en)
GB (1) GB2506788B (en)
IN (1) IN2014CN00386A (en)
TW (1) TWI489278B (en)
WO (1) WO2013016345A2 (en)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014016650A1 (en) * 2012-07-27 2014-01-30 Freescale Semiconductor, Inc. Circuitry for a computing system and computing system
EP2962210A4 (en) * 2013-02-28 2016-11-02 Intel Corp Leveraging an enumeration and/or configuration mechanism of one interconnect protocol for a different interconnect protocol
US9411745B2 (en) 2013-10-04 2016-08-09 Qualcomm Incorporated Multi-core heterogeneous system translation lookaside buffer coherency
US9223690B2 (en) * 2013-10-04 2015-12-29 Sybase, Inc. Freeing memory safely with low performance overhead in a concurrent environment
US9384133B2 (en) * 2014-05-30 2016-07-05 International Business Machines Corporation Synchronizing updates of page table status indicators and performing bulk operations
US9785554B2 (en) 2014-05-30 2017-10-10 International Business Machines Corporation Synchronizing updates of page table status indicators in a multiprocessing environment
US20160098203A1 (en) * 2014-12-18 2016-04-07 Mediatek Inc. Heterogeneous Swap Space With Dynamic Thresholds
CN105846859B (en) * 2015-01-12 2019-05-24 芋头科技(杭州)有限公司 A kind of embedded OS realizes the system and method for Bluetooth slave devices function
EP3054384B1 (en) * 2015-02-04 2018-06-27 Huawei Technologies Co., Ltd. System and method for memory synchronization of a multi-core system
CN108027642B (en) * 2015-06-24 2021-11-02 英特尔公司 System and method for isolating input/output computing resources
WO2017049590A1 (en) * 2015-09-25 2017-03-30 Intel Corporation Systems and methods for input/output computing resource control
US9898226B2 (en) * 2015-10-28 2018-02-20 International Business Machines Corporation Reducing page invalidation broadcasts in virtual storage management
US10942683B2 (en) 2015-10-28 2021-03-09 International Business Machines Corporation Reducing page invalidation broadcasts
US10386904B2 (en) 2016-03-31 2019-08-20 Qualcomm Incorporated Hardware managed power collapse and clock wake-up for memory management units and distributed virtual memory networks
US10120814B2 (en) * 2016-04-01 2018-11-06 Intel Corporation Apparatus and method for lazy translation lookaside buffer (TLB) coherence
US10067870B2 (en) 2016-04-01 2018-09-04 Intel Corporation Apparatus and method for low-overhead synchronous page table updates
US10540292B2 (en) 2016-06-08 2020-01-21 Google Llc TLB shootdowns for low overhead
EP3255550B1 (en) * 2016-06-08 2019-04-03 Google LLC Tlb shootdowns for low overhead
US10282308B2 (en) * 2016-06-23 2019-05-07 Advanced Micro Devices, Inc. Method and apparatus for reducing TLB shootdown overheads in accelerator-based systems
US20180276175A1 (en) * 2017-03-22 2018-09-27 National Instruments Corporation Direct Network Access by a Memory Mapped Peripheral Device for Scheduled Data Transfer on the Network
CN108932213A (en) * 2017-10-10 2018-12-04 北京猎户星空科技有限公司 The means of communication, device, electronic equipment and storage medium between multiple operating system
US10725932B2 (en) 2017-11-29 2020-07-28 Qualcomm Incorporated Optimizing headless virtual machine memory management with global translation lookaside buffer shootdown
US10990436B2 (en) * 2018-01-24 2021-04-27 Dell Products L.P. System and method to handle I/O page faults in an I/O memory management unit
US11106613B2 (en) * 2018-03-29 2021-08-31 Intel Corporation Highly scalable accelerator
US10846235B2 (en) 2018-04-28 2020-11-24 International Business Machines Corporation Integrated circuit and data processing system supporting attachment of a real address-agnostic accelerator
DE102018004086A1 (en) 2018-05-18 2019-11-21 Singulus Technologies Ag Continuous flow system and method for coating substrates
KR102655094B1 (en) * 2018-11-16 2024-04-08 삼성전자주식회사 Storage device including heterogeneous processors which shares memory and method of operating the same
US11036649B2 (en) 2019-04-04 2021-06-15 Cisco Technology, Inc. Network interface card resource partitioning
CN110968530B (en) * 2019-11-19 2021-12-03 华中科技大学 Key value storage system based on nonvolatile memory and memory access method
US20210004338A1 (en) * 2020-09-21 2021-01-07 Pratik Marolia Pasid based routing extension for scalable iov systems

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02183849A (en) * 1989-01-11 1990-07-18 Fujitsu Ltd Invalidation processing system for address correspondence table
JPH06139149A (en) * 1992-10-29 1994-05-20 Mitsubishi Electric Corp Multiple virtual space control device
US6175876B1 (en) 1998-07-09 2001-01-16 International Business Machines Corporation Mechanism for routing asynchronous state changes in a 3-tier application
US6779049B2 (en) * 2000-12-14 2004-08-17 International Business Machines Corporation Symmetric multi-processing system with attached processing units being able to access a shared memory without being structurally configured with an address translation mechanism
US7111145B1 (en) 2003-03-25 2006-09-19 Vmware, Inc. TLB miss fault handler and method for accessing multiple page tables
US7073043B2 (en) * 2003-04-28 2006-07-04 International Business Machines Corporation Multiprocessor system supporting multiple outstanding TLBI operations per partition
US7552254B1 (en) * 2003-07-30 2009-06-23 Intel Corporation Associating address space identifiers with active contexts
US7093100B2 (en) * 2003-11-14 2006-08-15 International Business Machines Corporation Translation look aside buffer (TLB) with increased translational capacity for multi-threaded computer processes
US7069389B2 (en) 2003-11-26 2006-06-27 Microsoft Corporation Lazy flushing of translation lookaside buffers
US7562179B2 (en) * 2004-07-30 2009-07-14 Intel Corporation Maintaining processor resources during architectural events
US7376807B2 (en) 2006-02-23 2008-05-20 Freescale Semiconductor, Inc. Data processing system having address translation bypass and method therefor
US7555628B2 (en) * 2006-08-15 2009-06-30 Intel Corporation Synchronizing a translation lookaside buffer to an extended paging table
US7917725B2 (en) 2007-09-11 2011-03-29 QNX Software Systems GmbH & Co., KG Processing system implementing variable page size memory organization using a multiple page per entry translation lookaside buffer
US9535849B2 (en) 2009-07-24 2017-01-03 Advanced Micro Devices, Inc. IOMMU using two-level address translation for I/O and computation offload devices on a peripheral interconnect
US8386745B2 (en) * 2009-07-24 2013-02-26 Advanced Micro Devices, Inc. I/O memory management unit including multilevel address translation for I/O and computation offload
US8364902B2 (en) 2009-08-07 2013-01-29 Via Technologies, Inc. Microprocessor with repeat prefetch indirect instruction
US8719547B2 (en) 2009-09-18 2014-05-06 Intel Corporation Providing hardware support for shared virtual memory between local and remote physical memory
EP2622525A1 (en) 2010-09-30 2013-08-07 Hewlett-Packard Development Company, L.P. Virtual machines for virus scanning
JP5956754B2 (en) 2012-01-06 2016-07-27 株式会社荏原製作所 Vacuum exhaust system

Also Published As

Publication number Publication date
CN106776379B (en) 2021-09-07
DE202012007252U1 (en) 2012-11-29
GB2506788B (en) 2020-05-27
TWI489278B (en) 2015-06-21
KR101604929B1 (en) 2016-03-18
JP6378733B2 (en) 2018-08-22
US9916257B2 (en) 2018-03-13
IN2014CN00386A (en) 2015-04-03
JP6032855B2 (en) 2016-11-30
CN103827839A (en) 2014-05-28
CN103827839B (en) 2016-12-21
WO2013016345A3 (en) 2013-04-11
GB2506788A (en) 2014-04-09
JP2017037672A (en) 2017-02-16
WO2013016345A2 (en) 2013-01-31
JP2014526102A (en) 2014-10-02
TW201333700A (en) 2013-08-16
US20130031333A1 (en) 2013-01-31
KR20140028137A (en) 2014-03-07
CN106776379A (en) 2017-05-31

Similar Documents

Publication Publication Date Title
GB2506788B (en) Method and apparatus for TLB shoot-down in a heterogeneous computing system supporting shared virtual memory
EP2831693A4 (en) Apparatus and method for accelerating operations in a processor which uses shared virtual memory
GB2495820B (en) Method and system for optimizing virtual machines placement in cloud computing environments
EP2812795A4 (en) A method and apparatus for supporting address translation in a multiprocessor virtual machine environment using tracking data to eliminate interprocessor interrupts
EP2887558A4 (en) Method and apparatus for system access in system using beamforming
EP2766847A4 (en) System and method for critical address space protection in a hypervisor environment
EP2745207A4 (en) Apparatus and method for supporting family cloud in cloud computing system
EP2743829A4 (en) Virtualization processing method and relevant device and computer system
EP2766844A4 (en) System and method for kernel rootkit protection in a hypervisor environment
EP2766843A4 (en) System and method for kernel rootkit protection in a hypervisor environment
GB2501204B (en) Method for virtual machine failover management and system supporting the same
GB2490374B (en) Method and apparatus for controlling access to a resource in a computer device
GB201321394D0 (en) A method and apparatus for alignning a clocksignal and a Datstrobe signal in a memory system
EP2707820A4 (en) Method and apparatus for enabling virtual tags
EP2776963A4 (en) Apparatus, system, and method for protecting electronic devices in a virtual perimeter
EP2437167A4 (en) Method and system for virtual storage migration and virtual machine monitor
EP2689339A4 (en) Method and system for usb device virtualization
EP3074866A4 (en) Apparatus and method for scheduling graphics processing unit workloads from virtual machines
GB2523492B (en) System and method for providing for power savings in a processor environment
AP2013007206A0 (en) System and method for utilizing a dynamic virtual keyboard
EP2795242A4 (en) Method and apparatus for motion compensation in interferometric sensing systems
EP2559463A4 (en) Device and method for processing a virtual world
GB2502411B (en) Apparatus and method for using a tablet computer
EP2876917A4 (en) Method and apparatus for cell search in sensor system
HK1198224A1 (en) System and method for provisioning internet access to a computing device

Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20220724