KR101597134B1 - 공장 프로그램 상변화 메모리에 대한 전용 인터페이스 - Google Patents
공장 프로그램 상변화 메모리에 대한 전용 인터페이스 Download PDFInfo
- Publication number
- KR101597134B1 KR101597134B1 KR1020100043045A KR20100043045A KR101597134B1 KR 101597134 B1 KR101597134 B1 KR 101597134B1 KR 1020100043045 A KR1020100043045 A KR 1020100043045A KR 20100043045 A KR20100043045 A KR 20100043045A KR 101597134 B1 KR101597134 B1 KR 101597134B1
- Authority
- KR
- South Korea
- Prior art keywords
- memory device
- volatile memory
- data
- pcm
- programming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 230000015654 memory Effects 0.000 title claims abstract description 44
- 230000005055 memory storage Effects 0.000 claims abstract description 5
- 239000000872 buffer Substances 0.000 claims description 20
- 230000008859 change Effects 0.000 claims description 18
- 238000000034 method Methods 0.000 claims description 8
- 230000005540 biological transmission Effects 0.000 claims description 7
- 238000003491 array Methods 0.000 claims description 6
- 230000006870 function Effects 0.000 claims description 5
- 238000012546 transfer Methods 0.000 claims description 5
- 238000012937 correction Methods 0.000 claims description 4
- 230000011664 signaling Effects 0.000 claims description 4
- 230000006386 memory function Effects 0.000 claims description 3
- 230000008569 process Effects 0.000 claims description 3
- 230000004044 response Effects 0.000 claims description 3
- 230000003750 conditioning effect Effects 0.000 claims description 2
- 230000007246 mechanism Effects 0.000 claims description 2
- 238000005476 soldering Methods 0.000 description 5
- 150000004770 chalcogenides Chemical class 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 230000014759 maintenance of location Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000012782 phase change material Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052798 chalcogen Inorganic materials 0.000 description 1
- 150000001787 chalcogens Chemical class 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 229910021476 group 6 element Inorganic materials 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1063—Control signal output circuits, e.g. status or busy flags, feedback command signals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
- G11C7/1045—Read-write mode select circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
- G11C7/109—Control signal input circuits
Landscapes
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Read Only Memory (AREA)
- Memory System (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/464,036 US8176232B2 (en) | 2009-05-11 | 2009-05-11 | Dedicated interface to factory program phase-change memories |
| US12/464,036 | 2009-05-11 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20100122061A KR20100122061A (ko) | 2010-11-19 |
| KR101597134B1 true KR101597134B1 (ko) | 2016-02-24 |
Family
ID=43063091
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020100043045A Active KR101597134B1 (ko) | 2009-05-11 | 2010-05-07 | 공장 프로그램 상변화 메모리에 대한 전용 인터페이스 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US8176232B2 (enExample) |
| JP (1) | JP5410368B2 (enExample) |
| KR (1) | KR101597134B1 (enExample) |
| CN (1) | CN101887751B (enExample) |
| DE (1) | DE102010018762B4 (enExample) |
| SG (1) | SG166730A1 (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100948384B1 (ko) * | 2006-11-29 | 2010-03-22 | 삼성전자주식회사 | 권리객체의 이동이 가능한 디바이스와 휴대형 저장 장치 및권리객체의 이동 방법 |
| US8804411B1 (en) | 2009-09-11 | 2014-08-12 | Micron Technology, Inc | Dual mode clock and data scheme for memory programming |
| CN102637453B (zh) * | 2012-02-17 | 2015-05-06 | 北京时代全芯科技有限公司 | 一种包括串行输入输出接口的相变存储器 |
| US8954824B2 (en) | 2012-02-28 | 2015-02-10 | Micron Technology, Inc. | Error detection or correction of stored signals after one or more heat events in one or more memory devices |
| US10440644B2 (en) * | 2012-06-29 | 2019-10-08 | Qualcomm Incorporated | Methods and apparatus for turbo decoder throttling |
| US9952879B2 (en) * | 2012-08-30 | 2018-04-24 | Microsoft Technology Licensing, Llc | Application pre-layout in byte-addressable persistent random access memory |
| US9003241B2 (en) * | 2013-02-01 | 2015-04-07 | Telefonaktiebolaget L M Ericsson (Publ) | Reporting errors on serial interfaces to application layers for flexible error handling approach selection |
| US9824004B2 (en) | 2013-10-04 | 2017-11-21 | Micron Technology, Inc. | Methods and apparatuses for requesting ready status information from a memory |
| US10108372B2 (en) | 2014-01-27 | 2018-10-23 | Micron Technology, Inc. | Methods and apparatuses for executing a plurality of queued tasks in a memory |
| US9454310B2 (en) | 2014-02-14 | 2016-09-27 | Micron Technology, Inc. | Command queuing |
| US11496335B2 (en) * | 2020-10-16 | 2022-11-08 | Dominant Technologies (Singapore) Pte Ltd | Dynamically addressable daisy-chained serial communication with configurable physical layer interfaces |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5966723A (en) * | 1997-05-16 | 1999-10-12 | Intel Corporation | Serial programming mode for non-volatile memory |
| US7966429B2 (en) * | 2007-05-28 | 2011-06-21 | Super Talent Electronics, Inc. | Peripheral devices using phase-change memory |
| US6781525B2 (en) * | 2001-10-23 | 2004-08-24 | Lite-On Technology Corporation | Shared interface device |
| US6715041B2 (en) * | 2002-01-28 | 2004-03-30 | M-Systems Flash Disk Pioneers Ltd. | Non-volatile memory device with multiple ports |
| KR100478567B1 (ko) * | 2002-08-22 | 2005-03-22 | 엠디에스테크놀로지 주식회사 | 경계주사열을 이용한 플래시롬 프로그래밍 방법 |
| US7346784B1 (en) * | 2002-08-29 | 2008-03-18 | Xilinx, Inc. | Integrated circuit device programming with partial power |
| US20050093572A1 (en) * | 2003-11-03 | 2005-05-05 | Macronix International Co., Ltd. | In-circuit configuration architecture with configuration on initialization function for embedded configurable logic array |
| JP2006018656A (ja) * | 2004-07-02 | 2006-01-19 | Sharp Corp | マイクロコンピュータシステム、半導体装置、及び、無線タグ |
| CN100432986C (zh) * | 2005-06-17 | 2008-11-12 | 艾默生网络能源系统有限公司 | 快速编程/调试设备 |
| US7761674B2 (en) * | 2005-12-30 | 2010-07-20 | Intel Corporation | Identifier associated with memory locations for managing memory accesses |
| US7640424B2 (en) * | 2005-10-13 | 2009-12-29 | Sandisk Corporation | Initialization of flash storage via an embedded controller |
| US7778069B2 (en) * | 2005-10-17 | 2010-08-17 | Renesas Technology Corp. | Semiconductor device and its fabrication method |
| WO2007141865A1 (ja) * | 2006-06-08 | 2007-12-13 | Renesas Technology Corp. | 半導体装置及びその製造方法 |
| US7619936B2 (en) * | 2006-11-16 | 2009-11-17 | Qimonda North America Corp. | System that prevents reduction in data retention |
| JP4353336B2 (ja) * | 2006-12-26 | 2009-10-28 | エルピーダメモリ株式会社 | 半導体記憶装置及びそのプログラム方法 |
| US7979625B2 (en) * | 2007-11-27 | 2011-07-12 | Spansion Llc | SPI bank addressing scheme for memory densities above 128Mb |
| JP2009176147A (ja) * | 2008-01-25 | 2009-08-06 | Nec Corp | 電子機器および電子機器のメモリアクセス許可判別方法 |
-
2009
- 2009-05-11 US US12/464,036 patent/US8176232B2/en active Active
-
2010
- 2010-04-21 SG SG201002796-9A patent/SG166730A1/en unknown
- 2010-04-29 DE DE102010018762.3A patent/DE102010018762B4/de active Active
- 2010-05-07 KR KR1020100043045A patent/KR101597134B1/ko active Active
- 2010-05-10 JP JP2010120973A patent/JP5410368B2/ja active Active
- 2010-05-11 CN CN201010195158.0A patent/CN101887751B/zh active Active
Also Published As
| Publication number | Publication date |
|---|---|
| SG166730A1 (en) | 2010-12-29 |
| JP2011018431A (ja) | 2011-01-27 |
| CN101887751A (zh) | 2010-11-17 |
| CN101887751B (zh) | 2014-07-09 |
| US20100287435A1 (en) | 2010-11-11 |
| US8176232B2 (en) | 2012-05-08 |
| JP5410368B2 (ja) | 2014-02-05 |
| DE102010018762A1 (de) | 2011-02-03 |
| KR20100122061A (ko) | 2010-11-19 |
| DE102010018762B4 (de) | 2020-11-05 |
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