KR101395175B1 - 반도체 패키징 방법 및 반도체 패키지 구조 - Google Patents

반도체 패키징 방법 및 반도체 패키지 구조 Download PDF

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Publication number
KR101395175B1
KR101395175B1 KR1020120083789A KR20120083789A KR101395175B1 KR 101395175 B1 KR101395175 B1 KR 101395175B1 KR 1020120083789 A KR1020120083789 A KR 1020120083789A KR 20120083789 A KR20120083789 A KR 20120083789A KR 101395175 B1 KR101395175 B1 KR 101395175B1
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KR
South Korea
Prior art keywords
bonding
copper
conductive
ionizers
substrate
Prior art date
Application number
KR1020120083789A
Other languages
English (en)
Korean (ko)
Other versions
KR20130079979A (ko
Inventor
쳉-훙 시
슈-첸 린
쳉-판 린
융-웨이 시에
보-? 지앙
Original Assignee
칩본드 테크놀러지 코포레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 칩본드 테크놀러지 코포레이션 filed Critical 칩본드 테크놀러지 코포레이션
Publication of KR20130079979A publication Critical patent/KR20130079979A/ko
Application granted granted Critical
Publication of KR101395175B1 publication Critical patent/KR101395175B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
KR1020120083789A 2012-01-03 2012-07-31 반도체 패키징 방법 및 반도체 패키지 구조 KR101395175B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW101100131A TWI456674B (zh) 2012-01-03 2012-01-03 半導體封裝方法及其結構
TW101100131 2012-01-03

Publications (2)

Publication Number Publication Date
KR20130079979A KR20130079979A (ko) 2013-07-11
KR101395175B1 true KR101395175B1 (ko) 2014-05-15

Family

ID=48992265

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020120083789A KR101395175B1 (ko) 2012-01-03 2012-07-31 반도체 패키징 방법 및 반도체 패키지 구조

Country Status (4)

Country Link
JP (1) JP2013140937A (zh)
KR (1) KR101395175B1 (zh)
SG (1) SG191464A1 (zh)
TW (1) TWI456674B (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113594151B (zh) * 2021-06-25 2024-05-14 苏州汉天下电子有限公司 半导体封装及其制造方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009111043A (ja) * 2007-10-29 2009-05-21 Sony Chemical & Information Device Corp 電気的接続体及びその製造方法
JP2011119758A (ja) * 2011-02-16 2011-06-16 Sharp Corp 半導体装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3633422B2 (ja) * 2000-02-22 2005-03-30 ソニーケミカル株式会社 接続材料
TW452950B (en) * 2000-09-19 2001-09-01 Siliconware Precision Industries Co Ltd Packaging structure of bonding pad with increased space height
JP4993880B2 (ja) * 2005-07-06 2012-08-08 旭化成イーマテリアルズ株式会社 異方導電性接着シート及び微細接続構造体
TWI269415B (en) * 2005-12-30 2006-12-21 Internat Semiconductor Technol Flip-chip bonding method utilizing non-conductive paste and its product
TW201140777A (en) * 2010-05-04 2011-11-16 Raydium Semiconductor Corp IC chip and an IC chip manufacturing method thereof
JP2012212864A (ja) * 2011-03-18 2012-11-01 Sekisui Chem Co Ltd 接続構造体の製造方法及び接続構造体
TWM428493U (en) * 2012-01-03 2012-05-01 Chipbond Technology Corp Semiconductor packaging structure

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009111043A (ja) * 2007-10-29 2009-05-21 Sony Chemical & Information Device Corp 電気的接続体及びその製造方法
JP2011119758A (ja) * 2011-02-16 2011-06-16 Sharp Corp 半導体装置

Also Published As

Publication number Publication date
JP2013140937A (ja) 2013-07-18
TWI456674B (zh) 2014-10-11
TW201330126A (zh) 2013-07-16
SG191464A1 (en) 2013-07-31
KR20130079979A (ko) 2013-07-11

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