KR101385475B1 - Liquid crystal display device - Google Patents

Abstract

The present invention relates to a liquid crystal display device capable of improving the aperture ratio and the sensitivity of the sensor.

According to an exemplary embodiment of the present invention, a liquid crystal display includes: a liquid crystal panel in which a plurality of pixel regions are defined by opposing the first substrate and the second substrate; A liquid crystal display device comprising driving circuits for driving the liquid crystal panel, the liquid crystal display device comprising: a first switching element formed at an area where a gate line and a data line cross each pixel area; A plurality of common voltage lines formed in parallel with the gate lines; A sensor configured to sense light and receive a common voltage of the common voltage line; A storage capacitor for storing the common voltage flowing through the sensor; And a second switching device for outputting a voltage stored in the storage capacitor.

With this configuration, the present invention can improve the aperture ratio of one pixel area by removing the sensor drive lines that are additionally installed to drive the sensor. In addition, by lowering the Vgs voltage between the gate electrode and the source electrode of the sensor to 0V or less, it is possible to detect the dark current even in the blocking region where the difference between the voltage Vgs and the threshold voltage Vth between the gate electrode and the source electrode is less than 0V. Can improve sensitivity

 Sensor, Common Voltage, Supply Voltage, Threshold Voltage

Description

[0001] LIQUID CRYSTAL DISPLAY DEVICE [0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device capable of improving aperture ratio and sensitivity of a sensor.

In recent years, as the information age has come to a full-fledged information age, a display field for visually expressing electrical information signals has been rapidly developed. In response to this, various flat panel displays (hereinafter referred to as " Flat Display Device) has been developed to replace CRT (Cathode Ray Tube).

Specific examples of such a flat panel display include a liquid crystal display device (LCD), a plasma display panel device (PDP), a field emission display device (FED), and an electroluminescent display device. (Electro luminescence Display device: ELD) and the like, these are commonly used as an essential component of a flat panel display panel that implements an image, a flat panel display panel has a pair of light emitting or polarizing material layer in between It has a configuration in which a transparent insulating substrate is faced and bonded together.

In a liquid crystal display device, an image is displayed by adjusting the light transmittance of a liquid crystal using an electric field. To this end, the image display apparatus includes a display panel having a liquid crystal cell, a backlight unit for irradiating the display panel with light, and a drive circuit for driving the liquid crystal cell.

The display panel is formed such that a plurality of gate lines and a plurality of data lines intersect to define a plurality of unit pixel regions. At this time, each pixel region includes a thin film transistor array substrate and a color filter array substrate facing each other, a spacer positioned to maintain a constant cell gap between the two substrates, and a liquid crystal filled in the cell gap.

The thin film transistor array substrate includes gate lines and data lines, a thin film transistor formed as a switching element for each intersection of the gate lines and the data lines, a pixel electrode formed in a unit of a liquid crystal cell and connected to the thin film transistor, And an applied alignment film. The gate lines and the data lines are supplied with signals from the driving circuits through respective pad portions.

The thin film transistor supplies a pixel voltage signal supplied to the data line in response to a scan signal supplied to the gate line.

The color filter array substrate includes color filters formed in units of liquid crystal cells, a black matrix for distinguishing between color filters and reflecting external light, a common electrode for supplying a reference voltage to the liquid crystal cells in common, and an alignment layer applied thereon. It consists of.

The thin film transistor substrate thus manufactured and the color filter array substrate are aligned by aligning each other, then the liquid crystal is injected and sealed.

In the liquid crystal display device thus formed, a light sensor is formed inside a display panel to control the backlight unit according to the brightness of external light, and the touch panel, which has been increased in volume by being attached to the outside of the display panel, There is an increasing effort to do this.

1 and 2 are diagrams illustrating one pixel area in a conventional liquid crystal display.

1 and 2, a gate line GLn and a data line DLm formed to intersect on a lower substrate with a gate insulating layer interposed therebetween, a first thin film transistor T1 formed at each intersection thereof, and an intersection thereof. The pixel electrode 208 and the pixel electrode 208 formed in the cell region having the structure are formed to be parallel to the read-out line and the gate line GLn formed parallel to the data line DLm. Between the first and second driving voltage supply lines Vdr1 and Vdr2 and the first and second driving voltage supply lines Vdr1 and Vdr2, and from the first and second driving voltage supply lines Vdr1 and Vdr2. A sensor TFT Sen1 to which the first and second driving voltages are supplied, a second thin film transistor T2 formed at an intersection region of the front gate line GLn-1 and the read out line, and the second A story for storing pixel data formed at an overlapping portion of the driving voltage supply line Vdr2 and the pixel electrode 208. And a capacitor (C2) and a second thin film transistor (T2) and the sensor TFT (Sen1) the storage capacitor (C3) for sensing the signal storage which is located between.

As described above, the liquid crystal display including the conventional sensor includes a sensor TFT Sen1, a readout line, a storage capacitor Cst2, first and second driving voltage supply lines Vdr1, for sensing light. Vdr2) is further formed.

The additional wirings and elements cause a problem of rapidly decreasing the aperture ratio of the liquid crystal panel.

In addition, in the case of another liquid crystal panel in which a sensor is embedded, the gate electrode and the source electrode of the sensor TFT are connected so that the Vgs between the gate electrode and the source electrode of the sensor TFT operate at OV.

However, the liquid crystal panel operating in this way has a high leakage current in the dark state as the Vgs voltage operates at 0V, which may cause the sensor to malfunction, and the characteristics of the sensor TFT may be changed by the threshold voltage variation of the sensor TFT.

In addition, as shown in FIG. 3, the sensitivity of the sensor is lowered because the ratio of the dark current in the dark state operating in the blocking region is lower than the photo current in the photo state in which the Vgs voltage is operated by light. Will occur.

In order to solve the above problems, the present invention is to provide a liquid crystal display device for improving the sensitivity of the sensor and the aperture ratio.

According to an exemplary embodiment of the present invention, a liquid crystal display includes: a liquid crystal panel in which a plurality of pixel regions are defined by mutually bonding a first substrate and a second substrate; A liquid crystal display device comprising driving circuits for driving the liquid crystal panel, the liquid crystal display device comprising: a first switching element formed at an area where a gate line and a data line cross each pixel area; A plurality of common voltage lines formed in parallel with the gate lines; A sensor configured to sense light and receive a common voltage of the common voltage line; A storage capacitor for storing the common voltage flowing through the sensor; And a second switching device for outputting a voltage stored in the storage capacitor.

The common voltage of the common voltage line may be a common electrode Vcom or a power supply voltage Vdd.

The first switching device comprises: a first gate electrode connected to the gate line on the first substrate; A first source electrode connected to the data line; A first drain electrode connected to the pixel electrode through the first contact hole; And a first semiconductor layer overlapping the first gate electrode and forming a channel between the first source electrode and the first drain electrode.

The second switching device includes a first gate electrode extending from a previous gate line of the gate line; A second drain electrode extending from the lead out line; A second source electrode facing the second drain electrode; And a second semiconductor layer overlapping the second gate electrode and forming a channel between the second source electrode and the second drain electrode.

The sensor comprises a first sensor gate electrode extending from the gate line; A first sensor semiconductor layer formed to be insulated from the first sensor gate electrode; A first sensor source electrode extending from the second source electrode; And a second drain electrode connected to the common voltage line through a second contact hole.

The first sensor semiconductor layer may be formed of amorphous silicon (a-si) or polysilicon (poly-si).

The storage capacitor is formed of the first gate electrode and the first sensor source electrode.

When the gate voltage is applied to the previous gate line, the voltage stored in the storage capacitor is output to the sensor processor through the readout line.

The voltage of the capacitance capacitor of the sensor is initialized when the gate voltage is applied to the gate line.

The liquid crystal display according to the present invention removes a sensor for detecting a touch on a liquid crystal panel and a sensor driving line that additionally installs a photocurrent flowing through the sensor to drive the sensor using a common voltage Vcom, thereby removing a sensor. The opening ratio of the area can be improved.

In addition, by lowering the Vgs voltage between the gate electrode and the source electrode of the sensor to 0V or less, even in a subregion region where the difference between the voltage Vgs and the threshold voltage Vth between the gate electrode and the source electrode is less than 0V. The sensitivity of the sensor can be improved by enabling the detection of dark current.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings and embodiments.

4 is a diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 5 is an equivalent circuit diagram of one pixel area of the liquid crystal display according to an exemplary embodiment of the present invention.

4 and 5, the liquid crystal display according to the present invention drives the liquid crystal panel 10 and the liquid crystal panel 10 in which a plurality of pixel regions are defined by bonding the first substrate and the second substrate to face each other. In the liquid crystal display device including the driving circuits 12, 14, 16, 18, 20, and 22, first switching is formed in an area where the gate line GLn and the data line DLm cross each pixel area. A device T1, a plurality of common voltage lines 178 formed in parallel with the gate line GLn, a sensor S1 receiving light and receiving a common voltage of the common voltage line 178, and a sensor S1. A storage capacitor Cst2 for storing the common voltage flowing through the C1) and a second switching device T2 for outputting the voltage stored in the storage capacitor Cst2 to the readout line ROi.

In addition, the liquid crystal display of the present invention includes a data driver 12 for supplying data to the plurality of data lines DL0 to DLm, and a gate driver 14 for supplying a gate voltage to the gate lines GL0 to GLn. And a timing controller 16 for generating control signals for controlling the data driver 12 and the gate driver 14, and a sensor processor 20 for processing the output signal of the sensor S1 that detects light. Wow; Driving voltages for driving the backlight 22 and the gate driver 14, the data driver 12, the sensor processor 20, the backlight 22, and the timing controller 16 that irradiate light to the liquid crystal panel 10 may be obtained. It further comprises a power supply unit 18 for generating.

The liquid crystal panel 10 is formed by bonding the first and second substrates to face each other. Here, the liquid crystal panel 10 includes a spacer (not shown) for maintaining a constant cell gap between two substrates, and a liquid crystal layer (not shown) filled in the liquid crystal space provided by the spacer. In this case, in the liquid crystal panel 10, the plurality of data lines DL0 to DLm and the plurality of gate lines GL0 to GLn cross each other to form a plurality of pixel regions. Each pixel area includes first and second switching devices T1 and T2, a sensor S1, a storage capacitor Cst1, and a storage capacitor Cst2.

As illustrated in FIG. 5, the first switching device T1 is formed in each region where the gate line GLn and the data line DLm cross each other. Here, the first switching device T1 supplies the data supplied to the data line DLm to the liquid crystal capacitor Clc in response to the scan signal of the gate line GLn. At this time, the liquid crystal capacitor Clc is composed of the pixel electrode connected to the first switching device T1 and the common electrode Vcom facing the pixel electrode with the liquid crystal therebetween.

The storage capacitor Cst1 is formed by overlapping the pixel electrode with the common voltage line 178 and the insulating layer interposed therebetween. Here, the storage capacitor Cst1 is connected in parallel with the liquid crystal capacitor Clc to maintain the voltage charged in the liquid crystal capacitor Clc until the next data signal is supplied.

The sensor S1 has a gate electrode connected to the gate line GLn at one side of the pixel region, and a source electrode and a drain electrode connected to the node A and the common voltage line 178, respectively. The sensor S1 senses the light reflected from the object when touched and transfers the common voltage of the common voltage line 178 to the node A. In this case, the common voltage line 178 may be connected to the common voltage Vcom or the power supply voltage VDD as shown in FIG. 6.

The storage capacitor Cst2 overlaps the pixel electrode with the drain electrode of the second switching element T2 interposed therebetween. Here, the storage capacitor Cst2 stores a common voltage of the common voltage line 178 by a leakage current flowing to the sensor S1 by the light reflected from the object at the time of touch.

In the second switching element T2, the source electrode and the drain electrode are connected to the node A and the read out line ROi, respectively, and the gate electrode is connected to the gate line GLn-1 at the previous stage. Here, the second switching device T2 resets the sensor S1 by outputting the voltage stored in the storage capacitor Cst2 to the outside when the gate voltage of the gate line GLn-1 of the previous stage is applied to the outside.

In other words, as shown in FIG. 6, the node A of one pixel area A of the liquid crystal panel 10 is normally turned off so that the common voltage S1 is turned off. Keep it. When the liquid crystal panel 10 starts to drive, when the gate voltage is applied to the gate line GLn-1 of the previous stage where the sensor S1 is installed (tn-1), the second switching device T2 is turned off. The voltage turned-on and stored in the storage capacitor Cst2 is output through the readout line 178. In addition, the voltage of the node A is V _ref flowing in the readout line ROi. Reset to voltage.

Subsequently, when the gate voltage is applied to the gate line GLn (tn), the first switching device T1 and the sensor S1 are turned on. At this time, the voltage of the node A is instantaneously increased by the capacitor characteristics. That is, assuming that the first level Vgh of the gate voltage supplied to the gate line GLn is 20V and the second level Vgl is -5V, the voltage of Vgh-Vgl, that is, 25V at the reset V _ref voltage. Will increase the voltage. The storage capacitor Cst2 stores the common voltage of the common voltage line.

Subsequently, while the gate voltage is applied to the gate line GLn, the voltage of the node A gradually decreases as a logarithmic function, rather than decreasing instantaneously, and decreases to a common voltage 5V of the common voltage line. At this time, the reason why the voltage gradually decreases at the node A is that the voltage at the node A gradually decreases because dv becomes infinite at i = C (dv / dt) in order to change the current value instantaneously due to the characteristics of the capacitor.

Subsequently, when the gate voltage of the gate line GLn reaches the second level Vgl, the node A again decreases the voltage due to the capacitor characteristic of the storage capacitor Cst2. In other words, the voltage at node A decreases rapidly to Vcom-(Vgh-Vgl), that is, 5V-(20V-(-5V)) to a voltage of -20V.

Here, the capacitor characteristic of the storage capacitor Cst2 is that the voltage of one end connected to the gate line GLn of the voltage across the capacitor is the gate of the second level Vgl at the gate voltage 20V of the first level Vgh. It is changed instantaneously with the voltage (-5V). At this time, the storage capacitor (Cst2) is the gate voltage of the node A, which is connected to the other end of the storage capacitor (Cst2) connected to the other end of the gate line, that is, Vgh-Vgl (20V-(-5V) to maintain the voltage at both ends. )) = Decreases by 25V. Therefore, the voltage at node A decreases by 25V at the moment when the gate line GLn changes from the common voltage 5V to the second level Vgl during the period of maintaining the first level Vgh on the gate line GLn. It is suddenly changed to -20V.

Subsequently, while the sensor S1 is turned off during the period in which the gate line GLn maintains the second level Vgl, the node A is disposed between the gate electrode and the source electrode of the sensor S1. Due to the voltage difference between the voltage Vgs and the gate electrode and the drain electrode Vgd, the node A is driven by the second level Vgl of the gate line GLn applied to the gate electrode of the sensor S1. (0.7)) =-Maintains a voltage of 5.7V.

Subsequently, the sensor S1 detects the light reflected by the object at the time of _touch (t _touch ) and is turned on. At this time, the sensor (S1) and connected to the common voltage line has a common voltage is caused to flow through the sensor (S1) and the node A storage capacitor (Cst1) V _touch The voltage will be stored.

Subsequently, when the gate voltage is applied to the previous gate line GLn-1 in the next frame, the second switching device T2 is turned on so that the voltage stored in the storage capacitor Cst2 is read out. By outputting through ROi, the sensor processing unit 20 detects the touch on the liquid crystal panel 10.

The data driver 12 converts the digital video data R, G, and B from the timing controller 16 into an analog data voltage corresponding to the gray scale value in accordance with the data control signal DCS supplied from the timing controller 16. Therefore, the analog data voltage is supplied to the data lines DL0 to DLm to the image signal of one horizontal line every one horizontal period in which the scan signal is supplied to the gate line. The data driver 12 is also supplied with a power supply voltage Vdd from the power supply unit 18. Accordingly, the data driver 12 generates an analog gamma voltage using the power supply voltage Vdd.

In this case, the data driver 12 may be mounted on a tape carrier package or a chip on film and connected to the liquid crystal panel 10 or may be a chip on glass method. 10).

The gate driver 14 sequentially generates scan pulses, that is, gate pulses, and supplies them to the plurality of gate lines GL0 to GLn in response to the gate driving control signals GOE, GSP, and GSC supplied from the timing controller 16. do. At this time, a power supply voltage Vdd is supplied from the power supply unit 18 to the gate driver 14. Accordingly, the gate driver 14 generates the gate high voltage VGH and the gate low voltage VGL using the power supply voltage Vdd.

The timing controller 16 aligns the source data R, G, and B supplied from the outside into a data signal Data suitable for driving the liquid crystal panel 10, and aligns the aligned data signal Data with the data driver 14. Supplies). In addition, the timing controller 16 uses the main clock DCLK, the data enable signal DE, and the horizontal and vertical synchronization signals Hsync and Vsync input from the outside, so that the data control signal DCS and the gate control signal ( GCS) is generated to control the driving timing of each of the data driver 12 and the gate driver 14. In this case, the data control signal DSC includes a source start pulse SSP, a source shift clock SSC, a source output enable SOE, and the gate control signal GCS includes a gate start pulse and a phase sequentially. A plurality of gate shift clocks are delayed.

The sensor processor 20 is connected to the lead-out lines RO1 to ROi through which the voltage stored in the storage capacitor Cst2 of each pixel area is output by the sensor S1 when touched. In this case, the sensor processor 20 supplies the timing controller 16 so that the voltage output from the readout lines RO1 to ROi can be processed when the touch is performed.

The backlight 22 generates light having a brightness corresponding to the light source driving power supplied from the inverter and irradiates the rear surface of the liquid crystal panel 10. At this time, the backlight 22 generates light by an edge type method or a direct type method and irradiates the back surface of the liquid crystal panel 10.

In the edge type backlight, at least one light source is disposed on a side surface of the light guide plate that guides the light toward the liquid crystal panel 10 to irradiate light to the liquid crystal panel 10 through the light guide plate.

In the direct type backlight, a plurality of light sources are disposed on the rear surface of the liquid crystal panel 10 to irradiate light directly onto the liquid crystal panel 10.

The power supply unit 18 generates a power supply voltage Vdd and a common voltage Vcom by boosting or reducing the input voltage input from a power source of a system (not shown). At this time, the power supply voltage Vdd and the common voltage Vcom generated by the power supply unit 18 are the gate driver 14, the data driver 12, the timing controller 16, the sensor processing unit 20, and the backlight 22. Supplied to.

In the liquid crystal display, a blocking region in which the difference between the voltage Vgs and the threshold voltage Vth between the gate electrode and the source electrode is less than zero by lowering the Vgs voltage between the gate electrode and the source electrode of the sensor to 0V or less. The sensitivity of the sensor can be improved by enabling the detection of dark currents even in subthreshold regions.

8 is a plan view illustrating one pixel area of a liquid crystal display according to an exemplary embodiment of the present invention.

Referring to FIG. 8, a liquid crystal display including a liquid crystal panel in which a plurality of pixel regions are defined by opposing the first substrate and the second substrate and driving circuits for driving the liquid crystal panel, wherein each pixel region includes a gate. A first switching element T1 formed at an intersection of the line GLn and the data line DLm, a plurality of common voltage lines 178 formed in parallel with the gate line GLn, and a common voltage by sensing light A second sensor outputting a voltage stored in the storage capacitor Cst2 and the storage capacitor Cst2 for storing the common voltage flowing through the sensor S1 and the sensor S1 receiving the common voltage of the line 178. It is comprised including the switching element T2.

The first switching element T1 includes a first gate electrode 110 connected to the gate line GLn on the first substrate 102, a first source electrode 114 connected to the data line DLm, The first drain electrode 116 connected to the pixel electrode 120 through the first contact hole 118, the first source electrode 114, and the first drain electrode 116 overlapping the first gate electrode 110. ) And a first semiconductor layer 112 forming a channel therebetween. Here, the first semiconductor layer 112 is formed to partially overlap the first source electrode 114 and the first drain electrode 116, and a channel between the first source electrode 114 and the first drain electrode 116. Includes more wealth. An ohmic contact layer for ohmic contact with the first source electrode 114 and the first drain electrode 116 may be further formed on the first semiconductor layer 112.

In this case, the first switching device T1 includes a storage capacitor Cst1 for storing the voltage charged in the pixel electrode 120. The storage capacitor Cst1 is a first lower electrode extending from the previous gate line GLn-1 and a first pixel electrode 120 overlapping the first lower electrode with the gate insulating layer 126 therebetween. It consists of an upper electrode.

The sensor S1 includes a first sensor gate electrode 150 extending from the gate line GLn, a first sensor semiconductor layer 150 formed to be insulated from the first sensor gate electrode 150, and a first sensor semiconductor layer ( And first sensor source / drain electrodes 154 and 156 formed on both sides of 152.

The storage capacitor Cst2 includes a first lower electrode formed by the gate line GLn and an upper electrode serving as a first sensor source electrode 154 overlapping the first lower electrode with a gate insulating layer (not shown) therebetween. do.

The second switching element T2 includes a second gate electrode 170 which is a part of the front gate line GLn-1, a second source electrode 174 connected to the upper electrode of the second capacitor Cst2, and a lead out. A second drain electrode 176 extending from the line ROi and facing the second source electrode 174, and overlapping the second gate electrode 170 and overlapping the second source electrode 174 and the second drain electrode ( And a second semiconductor layer 172 forming a channel between the two layers.

 9 through 11 are cross-sectional views of one pixel area according to a manufacturing process of a liquid crystal display according to an exemplary embodiment of the present invention.

9 to 11, the common voltage line 178, the first and second gate electrodes 170, and the first sensor gate electrode 150 are formed on the first substrate 102. The common voltage line 178, the first and second gate electrodes 170, and the first sensor gate electrode 150 may be gated using a deposition method such as sputtering on the first insulating substrate 102. It is formed by depositing a metal over the entire surface and then patterning it by a photo process and an etching process using a mask. In this case, the gate metal is formed of a metal material such as Mo, Ti, Cu, AlNd, Al, Cr, Mo alloy, Cu alloy, Al alloy in a single layer or a multilayer structure.

Subsequently, a first insulating layer is formed on the entire surface of the first substrate 102 including the common voltage line 178, the first and second gate electrodes 170, and the first sensor gate electrode 150 on the first substrate 102. 126 is formed. In this case, the first insulating layer 126 is deposited using a deposition method such as plasma enhanced chemical vapor deposition (PECVD) and sputtering. In this case, the first insulating layer 106 is formed of an inorganic or organic insulating material such as silicon nitride (SiOx), silicon oxide (SiNx), or the like.

Subsequently, the first and second semiconductor layers 112 and 172 and the first and sensor semiconductor layers may be formed on the first insulating layer 126 by using an amorphous silicon (a-si) or poly-si thin film. 152). In this case, the first and second semiconductor layers 112 and 172 and the first sensor semiconductor layer 152 form an amorphous silicon thin film on the first insulating film 126 and then crystallize to form an LTPS thin film. In this case, before the crystallization of the amorphous silicon thin film, a dehydrogenation process may be performed to remove hydrogen atoms present in the amorphous silicon thin film. As a method of crystallizing the amorphous silicon thin film, a sequential horizontal crystallization (SLS) method in which grain size is improved by growing grains in a horizontal direction using an excimer laser annealing is mainly used.

Subsequently, the LTPS thin film is patterned by a photo process and an etching process using a mask to form second contact holes 158, first and second semiconductor layers 112 and 172, and a first sensor semiconductor layer 152. Here, the second contact hole 158 is formed to expose the common voltage line 178 by removing the LTPS thin film and the first insulating layer 126.

Subsequently, a source / drain metal layer is deposited on the entire surface of the first insulating layer 126 including the first and second semiconductor layers 112 and 172 and the first sensor semiconductor layer 152. Here, the source / drain metal layer is deposited through a deposition method such as sputtering.

Subsequently, the first and second drain electrodes formed on one side of the first and second semiconductor layers 112 and 172 and the first sensor semiconductor layers 142 and 152 by patterning the source / drain metal layer through a photo process and an etching process. 110 and 176 and the first sensor drain electrode 156, the first and second source electrodes 114 and 174 and the first sensor source electrode 154 formed on the other side are formed. In this case, the source / drain metal layer may be formed of a metal material such as Mo, Ti, Cu, AlNd, Al, Cr, Mo alloy, Cu alloy, Al alloy, etc. in a single layer or a multilayer structure.

Next, a second insulating film 124 is formed on the entire surface of the first substrate 102. Here, the second insulating film 124 is deposited using a deposition method such as PECVD and sputtering. In this case, the second insulating layer 124 is formed of an inorganic or organic insulating material such as silicon nitride (SiOx), silicon oxide (SiNx), or the like.

Subsequently, the first contact hole 118 penetrating the second insulating layer 124 is formed by a photo process and an etching process using a mask. Here, the first contact hole 118 is formed through the second insulating layer 114 to expose the drain electrode.

Subsequently, the first drain electrode 114 and the pixel electrode 120 are electrically connected to each other through the first contact hole 118. Here, the pixel electrode 120 is formed by a deposition method such as sputtering. In this case, the pixel electrode 120 is formed of indium tin oxide (ITO), tin oxide (TO), indium tin oxide (IZO), or ITZO as a transparent metal material.

Subsequently, the black matrix 134 is formed in the pixel region where the pixel electrode 120 is formed on the second substrate 136 and the remaining region except for the first opening 160 of the first sensor. Here, the black matrix 134 is formed by depositing the black matrix layer on the entire surface of the second substrate 136 and then patterning the photo matrix and the etching process using a mask. In this case, the black matrix 134 may be chromium (Cr), chromium oxide film (CrOx), molybdenum (Mo), molybdenum tungsten (MoW), carbon black, carbon fiber, graphite, acetylene black and resin black matrix. have.

Subsequently, the color filter layer 132 is formed on the second substrate 136 corresponding to the pixel region where the pixel electrode 120 is formed. The color filter layer 132 is formed by patterning the etching process using a photo process and an etching process using a mask.

Subsequently, the overcoat layer 130 is formed on the entire surface of the second substrate 136 including the black matrix 134 and the color filter 132. Here, the overcoat layer 130 is formed by coating an acrylic resin, which is an organic material, so that the second substrate 136 on which the black matrix 134 and the color filter 132 are formed may be planarized.

Subsequently, the common electrode 128 is formed on the overcoat layer 130. In this case, the common electrode 128 is made of indium tin oxide (ITO), tin oxide (TO), indium tin oxide (IZO), or ITZO.

Subsequently, a liquid crystal (not shown) is injected between the first substrate 102 and the second substrate 136 and then bonded to each other by a sealing material (not shown) to form a liquid crystal display device.

Such a liquid crystal display removes a sensor for detecting touch on a liquid crystal panel and sensor driving lines that are additionally installed to drive a sensor using a common voltage Vcom for photocurrent flowing through the sensor. The aperture ratio can be improved.

In addition, by lowering the Vgs voltage between the gate electrode and the source electrode of the sensor to 0V or less, even in a subregion region where the difference between the voltage Vgs and the threshold voltage Vth between the gate electrode and the source electrode is less than 0V. The sensitivity of the sensor can be improved by enabling the detection of dark current.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention as defined in the appended claims. Will be apparent to those of ordinary skill in the art.

1 is an equivalent circuit diagram showing one pixel area of a conventional liquid crystal display.

2 is a plan view showing one pixel area of a conventional liquid crystal display.

3 is a graph showing the sensitivity according to Vgs of the sensor TFT of the conventional liquid crystal display.

4 is a diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention.

5 is an equivalent circuit diagram of one pixel area of a liquid crystal display according to an exemplary embodiment of the present invention.

6 is a waveform diagram supplied to one pixel area of a liquid crystal display according to an exemplary embodiment of the present invention.

7 is an equivalent circuit diagram of one pixel area of a liquid crystal display according to another exemplary embodiment of the present invention.

8 is a plan view illustrating one pixel area of a liquid crystal display according to an exemplary embodiment of the present invention.

9 through 11 are cross-sectional views illustrating one pixel area of a liquid crystal display according to an exemplary embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

10 liquid crystal panel 12 data driver

14 gate driver 16: timing controller

18: power supply unit 20: sensor processing unit

22: backlight 178: common voltage line

T1: first switching element T2: second switching element

S1: sensor

Claims (9)

A liquid crystal panel in which a plurality of pixel regions are defined by mutually bonding the first substrate and the second substrate to each other; A liquid crystal display device comprising driving circuits for driving the liquid crystal panel. A first switching element formed in each pixel area in an area where a gate line and a data line cross each other; A plurality of common voltage lines formed in parallel with the gate lines; A sensor configured to sense light and receive a common voltage of the common voltage line; A storage capacitor for storing the common voltage flowing through the sensor; And And a second switching device for outputting a voltage stored in the storage capacitor, The first switching device, A first gate electrode formed on said first substrate and connected to said gate line; A first source electrode connected to the data line; A first drain electrode connected to the pixel electrode through the first contact hole; And a first semiconductor layer overlapping the first gate electrode and forming a channel between the first source electrode and the first drain electrode. The method of claim 1, And a common voltage of the common voltage line is a common electrode (Vcom) or a power supply voltage (Vdd). delete The method of claim 1, The second switching device, A first gate electrode extending from the previous gate line of the gate line; A second drain electrode extending from the lead out line; A second source electrode facing the second drain electrode; And a second semiconductor layer overlapping the second gate electrode and forming a channel between the second source electrode and the second drain electrode. The method of claim 1, The sensor includes: A first sensor gate electrode extending from the gate line; A first sensor semiconductor layer formed to be insulated from the first sensor gate electrode; A first sensor source electrode extending from the second source electrode; And a second drain electrode connected to the common voltage line through a second contact hole. 6. The method of claim 5, The first sensor semiconductor layer is formed of amorphous silicon (a-si) or poly-silicon (poly-si). The method of claim 1, And the storage capacitor is formed of the first gate electrode and the first sensor source electrode. 5. The method of claim 4, And applying a gate voltage to the previous gate line to output a voltage stored in the storage capacitor to the sensor processor through the readout line. 6. The method of claim 5, The voltage of the capacitance capacitor of the sensor is initialized when the gate voltage is applied to the gate line.

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