KR101157305B1 - 양면 냉각 집적트랜지스터 모듈 및 제조방법 - Google Patents

양면 냉각 집적트랜지스터 모듈 및 제조방법

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Publication number
KR101157305B1
KR101157305B1 KR1020087028221A KR20087028221A KR101157305B1 KR 101157305 B1 KR101157305 B1 KR 101157305B1 KR 1020087028221 A KR1020087028221 A KR 1020087028221A KR 20087028221 A KR20087028221 A KR 20087028221A KR 101157305 B1 KR101157305 B1 KR 101157305B1
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KR
South Korea
Prior art keywords
drain
transistor
transistors
pad
clip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
KR1020087028221A
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English (en)
Korean (ko)
Other versions
KR20090009882A (ko
Inventor
조나단 에이 노퀼
루벤 피 마드리드
Original Assignee
페어차일드 세미컨덕터 코포레이션
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Priority claimed from US11/740,475 external-priority patent/US7777315B2/en
Application filed by 페어차일드 세미컨덕터 코포레이션 filed Critical 페어차일드 세미컨덕터 코포레이션
Publication of KR20090009882A publication Critical patent/KR20090009882A/ko
Application granted granted Critical
Publication of KR101157305B1 publication Critical patent/KR101157305B1/ko
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00Arrangements for thermal protection or thermal control
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/481Leadframes for devices being provided for in groups H10D8/00 - H10D48/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00Arrangements for thermal protection or thermal control
    • H10W40/10Arrangements for heating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/421Shapes or dispositions
    • H10W70/424Cross-sectional shapes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/464Additional interconnections in combination with leadframes
    • H10W70/466Tape carriers or flat leads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10Containers or parts thereof
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/811Multiple chips on leadframes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W95/00Packaging processes not covered by the other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/076Connecting or disconnecting of strap connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/076Connecting or disconnecting of strap connectors
    • H10W72/07631Techniques
    • H10W72/07636Soldering or alloying
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/076Connecting or disconnecting of strap connectors
    • H10W72/07651Connecting or disconnecting of strap connectors characterised by changes in properties of the strap connectors during connecting
    • H10W72/07653Connecting or disconnecting of strap connectors characterised by changes in properties of the strap connectors during connecting changes in shapes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/60Strap connectors, e.g. thick copper clips for grounding of power devices
    • H10W72/631Shapes of strap connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/877Bump connectors and die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/726Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/761Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors
    • H10W90/766Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Dc-Dc Converters (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
KR1020087028221A 2006-05-19 2007-05-21 양면 냉각 집적트랜지스터 모듈 및 제조방법 Active KR101157305B1 (ko)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US80218106P 2006-05-19 2006-05-19
US60/802,181 2006-05-19
US11/740,475 2007-04-26
US11/740,475 US7777315B2 (en) 2006-05-19 2007-04-26 Dual side cooling integrated power device module and methods of manufacture
US91699407P 2007-05-09 2007-05-09
US60/916,994 2007-05-09
PCT/US2007/069362 WO2007137221A2 (en) 2006-05-19 2007-05-21 Dual side cooling integrated transistor module and methods of manufacture

Publications (2)

Publication Number Publication Date
KR20090009882A KR20090009882A (ko) 2009-01-23
KR101157305B1 true KR101157305B1 (ko) 2012-06-15

Family

ID=38724063

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020087028221A Active KR101157305B1 (ko) 2006-05-19 2007-05-21 양면 냉각 집적트랜지스터 모듈 및 제조방법

Country Status (6)

Country Link
JP (1) JP2009545862A (https=)
KR (1) KR101157305B1 (https=)
CN (1) CN101473423B (https=)
DE (1) DE112007001240T5 (https=)
TW (1) TWI452662B (https=)
WO (1) WO2007137221A2 (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5822468B2 (ja) * 2011-01-11 2015-11-24 ローム株式会社 半導体装置
CN102832190B (zh) * 2011-06-14 2015-02-04 万国半导体股份有限公司 一种倒装芯片的半导体器件及制造方法
WO2013157172A1 (ja) * 2012-04-20 2013-10-24 パナソニック株式会社 半導体パッケージ及びその製造方法、半導体モジュール、並びに半導体装置
US9355942B2 (en) * 2014-05-15 2016-05-31 Texas Instruments Incorporated Gang clips having distributed-function tie bars
US10438900B1 (en) * 2018-03-29 2019-10-08 Alpha And Omega Semiconductor (Cayman) Ltd. HV converter with reduced EMI
US11309233B2 (en) * 2019-09-18 2022-04-19 Alpha And Omega Semiconductor (Cayman), Ltd. Power semiconductor package having integrated inductor, resistor and capacitor
US20210082790A1 (en) * 2019-09-18 2021-03-18 Alpha And Omega Semiconductor (Cayman) Ltd. Power semiconductor package having integrated inductor and method of making the same
CN113410185B (zh) * 2021-06-04 2021-12-14 深圳真茂佳半导体有限公司 功率半导体器件封装结构及其制造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060044772A1 (en) 2004-08-31 2006-03-02 Kabushiki Kaisha Toshiba Semiconductor module
US20070040254A1 (en) 2005-08-17 2007-02-22 Lopez Osvaldo J Semiconductor die package
US20070132073A1 (en) 2005-12-09 2007-06-14 Tiong Toong T Device and method for assembling a top and bottom exposed packaged semiconductor

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5877555A (en) * 1996-12-20 1999-03-02 Ericsson, Inc. Direct contact die attach
JP4173751B2 (ja) * 2003-02-28 2008-10-29 株式会社ルネサステクノロジ 半導体装置
TWI265611B (en) * 2003-03-11 2006-11-01 Siliconware Precision Industries Co Ltd Semiconductor package with heatsink
JP2005217072A (ja) * 2004-01-28 2005-08-11 Renesas Technology Corp 半導体装置
WO2005122249A2 (en) * 2004-06-03 2005-12-22 International Rectifier Corporation Semiconductor device module with flip chip devices on a common lead frame
US7476976B2 (en) * 2005-02-23 2009-01-13 Texas Instruments Incorporated Flip chip package with advanced electrical and thermal properties for high current designs

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060044772A1 (en) 2004-08-31 2006-03-02 Kabushiki Kaisha Toshiba Semiconductor module
US20070040254A1 (en) 2005-08-17 2007-02-22 Lopez Osvaldo J Semiconductor die package
US20070132073A1 (en) 2005-12-09 2007-06-14 Tiong Toong T Device and method for assembling a top and bottom exposed packaged semiconductor

Also Published As

Publication number Publication date
WO2007137221A2 (en) 2007-11-29
JP2009545862A (ja) 2009-12-24
WO2007137221A3 (en) 2008-10-02
TWI452662B (zh) 2014-09-11
CN101473423A (zh) 2009-07-01
CN101473423B (zh) 2011-04-13
TW200810069A (en) 2008-02-16
DE112007001240T5 (de) 2009-04-23
KR20090009882A (ko) 2009-01-23

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