KR101148745B1 - 반도체 패키지 기판의 제조방법 - Google Patents

반도체 패키지 기판의 제조방법 Download PDF

Info

Publication number
KR101148745B1
KR101148745B1 KR1020100068115A KR20100068115A KR101148745B1 KR 101148745 B1 KR101148745 B1 KR 101148745B1 KR 1020100068115 A KR1020100068115 A KR 1020100068115A KR 20100068115 A KR20100068115 A KR 20100068115A KR 101148745 B1 KR101148745 B1 KR 101148745B1
Authority
KR
South Korea
Prior art keywords
forming
layer
foamed resin
semiconductor package
resin layer
Prior art date
Application number
KR1020100068115A
Other languages
English (en)
Korean (ko)
Other versions
KR20120007379A (ko
Inventor
김승완
최진원
박준형
Original Assignee
삼성전기주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전기주식회사 filed Critical 삼성전기주식회사
Priority to KR1020100068115A priority Critical patent/KR101148745B1/ko
Priority to JP2011139214A priority patent/JP2012023364A/ja
Publication of KR20120007379A publication Critical patent/KR20120007379A/ko
Application granted granted Critical
Publication of KR101148745B1 publication Critical patent/KR101148745B1/ko

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
KR1020100068115A 2010-07-14 2010-07-14 반도체 패키지 기판의 제조방법 KR101148745B1 (ko)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1020100068115A KR101148745B1 (ko) 2010-07-14 2010-07-14 반도체 패키지 기판의 제조방법
JP2011139214A JP2012023364A (ja) 2010-07-14 2011-06-23 半導体パッケージ基板の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020100068115A KR101148745B1 (ko) 2010-07-14 2010-07-14 반도체 패키지 기판의 제조방법

Publications (2)

Publication Number Publication Date
KR20120007379A KR20120007379A (ko) 2012-01-20
KR101148745B1 true KR101148745B1 (ko) 2012-05-23

Family

ID=45612744

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020100068115A KR101148745B1 (ko) 2010-07-14 2010-07-14 반도체 패키지 기판의 제조방법

Country Status (2)

Country Link
JP (1) JP2012023364A (ja)
KR (1) KR101148745B1 (ja)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20050009035A (ko) * 2003-07-15 2005-01-24 삼성전자주식회사 일회용 마스크를 이용한 솔더 볼 형성 방법
KR20100049844A (ko) * 2008-11-04 2010-05-13 삼성전기주식회사 발포 테이프를 이용한 솔더 범프 형성 방법
KR20100060968A (ko) * 2008-11-28 2010-06-07 삼성전기주식회사 메탈 포스트를 구비한 기판 및 그 제조방법

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006216777A (ja) * 2005-02-03 2006-08-17 Alps Electric Co Ltd 回路基板の製造方法
JP5144141B2 (ja) * 2007-06-28 2013-02-13 新光電気工業株式会社 配線パターン形成方法及び電子部品搭載用パッケージ
KR100951449B1 (ko) * 2008-01-03 2010-04-07 삼성전기주식회사 인쇄회로기판 및 그 제조방법

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20050009035A (ko) * 2003-07-15 2005-01-24 삼성전자주식회사 일회용 마스크를 이용한 솔더 볼 형성 방법
KR20100049844A (ko) * 2008-11-04 2010-05-13 삼성전기주식회사 발포 테이프를 이용한 솔더 범프 형성 방법
KR20100060968A (ko) * 2008-11-28 2010-06-07 삼성전기주식회사 메탈 포스트를 구비한 기판 및 그 제조방법

Also Published As

Publication number Publication date
JP2012023364A (ja) 2012-02-02
KR20120007379A (ko) 2012-01-20

Similar Documents

Publication Publication Date Title
US8671564B2 (en) Substrate for flip chip bonding and method of fabricating the same
JPWO2007126090A1 (ja) 回路基板、電子デバイス装置及び回路基板の製造方法
KR20100060968A (ko) 메탈 포스트를 구비한 기판 및 그 제조방법
CN104321864A (zh) 具有非共面的、包封的微电子器件和无焊内建层的微电子封装
US20160143137A1 (en) Printed circuit board and method of manufacturing the same, and electronic component module
KR20160032985A (ko) 패키지 기판, 패키지 기판의 제조 방법 및 이를 포함하는 적층형 패키지
KR20160144367A (ko) 표면 상호 연결부 및 무전해 충진물을 포함하는 캐비티를 포함하는 패키지 기판
US9466578B2 (en) Substrate comprising improved via pad placement in bump area
KR101847163B1 (ko) 인쇄회로기판 및 그 제조방법
US20160225706A1 (en) Printed circuit board, semiconductor package and method of manufacturing the same
US20090183906A1 (en) Substrate for mounting device and method for producing the same, semiconductor module and method for producing the same, and portable apparatus provided with the same
KR102207272B1 (ko) 인쇄회로기판, 그 제조방법, 및 전자부품 모듈
KR101131230B1 (ko) 범프 지지부를 갖는 인쇄회로기판 및 그 제조방법
JP5599860B2 (ja) 半導体パッケージ基板の製造方法
KR100908986B1 (ko) 코어리스 패키지 기판 및 제조 방법
US20110097856A1 (en) Method of manufacturing wafer level package
KR20120120789A (ko) 인쇄회로기판의 제조방법
KR101148745B1 (ko) 반도체 패키지 기판의 제조방법
KR101428086B1 (ko) 인쇄회로기판 및 그 제조방법 그리고 메모리 카드 제조방법
KR100629887B1 (ko) 금속 칩스케일 반도체패키지 및 그 제조방법
JP2013106029A (ja) プリント回路基板及びプリント回路基板の製造方法
CN104425431A (zh) 基板结构、封装结构及其制造方法
KR20150060037A (ko) 인쇄회로기판 제조 방법
KR100934110B1 (ko) 코어리스 인쇄회로기판 제조 방법
KR101526581B1 (ko) 인쇄회로기판 및 그 제조 방법

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
LAPS Lapse due to unpaid annual fee