KR101100875B1 - Laser beam irradiation device for solidification, method for solidify and method for manufacturing a thin film transistor array panel including the method - Google Patents

Abstract

More specifically, the laser irradiation apparatus for crystallization according to the embodiment of the present invention, at least two or more are arranged side by side, a plurality of masks having a thin film pattern defining a region for locally reflecting or transmitting the laser beam, sequential An optical unit for irradiating a laser beam toward a mask at an arbitrary angle in a side solid-state crystal process, and a plate for supporting a substrate on which an amorphous silicon thin film on which crystallization is formed by irradiating a laser beam reflected through a thin film pattern is formed.

Polycrystalline, Mask, Reflectivity, Transmittance, Laser Beam

Description

LASER BEAM IRRADIATION DEVICE FOR SOLIDIFICATION, METHOD FOR SOLIDIFY AND METHOD FOR MANUFACTURING A THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE METHOD}

1 is a schematic diagram schematically illustrating a sequential lateral solid phase crystallization process of crystallizing amorphous silicon into polycrystalline silicon by passing a laser through a slit of a mask using a crystallization apparatus according to an embodiment of the present invention.

2A to 2C are plan views showing the positions of the transmission regions formed in the respective masks shown in FIG. 1,

3 is a plan view showing a position to be crystallized through the mask of FIGS. 2A to 2C for an arbitrary region,

4 is a layout view illustrating a structure of a thin film transistor array panel for an organic light emitting diode display manufactured using a crystallization apparatus and a method according to an exemplary embodiment of the present invention.

5 and 6 are cross-sectional views of the thin film transistor array panel of FIG. 4 taken along lines V-V 'and VI-VI',

7, 9, 11, 13, 15, 17, and 19 are layout views illustrating intermediate steps in the method of manufacturing the thin film transistor array panel of FIGS. 4 to 6.                 

8A and 8B are cross-sectional views taken along the lines VIIIa-VIIIa 'and VIIIb-VIIIb' of FIG. 7;

10A and 10B are cross-sectional views taken along the lines Xa-Xa 'and Xb-Xb' in FIG. 9,

12A and 12B are cross-sectional views taken along the lines XIIa-XIIa 'and XIIb-XIIb' in FIG. 11,

14A and 14B are cross-sectional views taken along lines XIVa-XIVa 'and XIVb-XIVb' in FIG. 13,

16A and 16B are cross-sectional views taken along the lines XVIa-XVIa 'and XVIb-XVIb' of FIG. 15;

18A and 18B are cross-sectional views taken along the lines XVIIIa-XVIIIa 'and XVIIIb-XVIIIb' in FIG. 17,

20A and 20B are cross-sectional views taken along the lines XXa-XXa 'and XXb-XXb' of FIG. 19.

FIG. 21 is a layout view illustrating a structure of a thin film transistor array panel for a liquid crystal display device manufactured using a crystallization mask according to an exemplary embodiment of the present invention.
FIG. 22 is a cross-sectional view taken along line XXII-XXII 'of FIG. 21.

The present invention relates to a laser beam irradiation apparatus for crystallization, a crystallization method using the same, and a method for manufacturing a thin film transistor array panel including the same.

In general, the thin film transistor array panel is used as a substrate such as a liquid crystal display device or an organic EL display device having pixels having a matrix array. At this time, each pixel is provided with a thin film transistor as a switching element to selectively drive the R, G, B pixels, it is possible to implement a screen of various colors.

A liquid crystal display is an apparatus that displays an image by applying an electric field to a liquid crystal material having an anisotropic dielectric constant injected between two display panels by using an electrode, and controlling the amount of light transmitted through the substrate by adjusting the intensity of the electric field. . In this case, a thin film transistor is used as the switching element to control the image signal transmitted to the electrode.

Organic electro-luminescence is a display device that displays an image by electrically exciting and emitting a fluorescent organic material, and includes a hole injection electrode (anode), an electron injection electrode (cathode), and an organic light emitting layer formed therebetween. When charge is injected into the organic light emitting layer, electrons and holes are paired and extinguished to emit light. Each pixel includes a driving thin film transistor and a switching transistor. In this case, the amount of current of the driving thin film transistor that supplies the current for light emission is controlled by the data voltage applied through the switching transistor, and the gate and source of the switching transistor and the gate signal line (or scan line) are disposed to cross each other. It is connected to the data signal line.

The most common thin film transistor used in such a display device uses amorphous silicon as a semiconductor layer.                         

Since the amorphous silicon thin film transistor has a mobility of about 0.5 to 1 cm 2 / Vsec, it can be used as a switching element of a liquid crystal display, but the mobility is small, so that the liquid crystal panel or an organic EL (electro luminescence) There is an inadequate disadvantage in that a direct driving circuit is formed in a display device such as).

Therefore, in order to overcome such a problem, a liquid crystal display device or an organic EL (electro EL) using a polycrystalline silicon thin film transistor using a polycrystalline silicon as a semiconductor layer having a current mobility of about 20 to 150 cm 2 / Vsec as a switching element or a driving element Since luminescence has been developed, polycrystalline silicon thin film transistors have a relatively high current mobility, and thus can implement chip in glass in which a driving circuit is embedded in a panel for a display device.

Currently, the most widely used method of crystallizing polycrystalline silicon thin film formed on the glass substrate having low melting point is excimer laser annealing, which irradiates an excimer laser in the wavelength band absorbed directly by amorphous silicon. The amorphous silicon is melted to a temperature of about 1400 ° C. to crystallize into polycrystal. At this time, the size of the crystal grains is formed to a relatively uniform particle size of about 3,000-5,000Å, hardening time is only 30-200 ns does not damage the organic substrate. However, due to non-uniform grain boundaries, the uniformity of the electrical characteristics between the thin film transistors may be reduced or the microstructure of the particles may not be controlled.

To solve this problem, a sequential lateral solidification process has been developed that can artificially control the distribution of grain boundaries. This technique takes advantage of the fact that the grains of polycrystalline silicon grow in a direction perpendicular to the interface at the boundary between the liquid region to which the laser is irradiated and the solid region to which the laser is not irradiated. At this time, when the laser beam is passed through the transmission region (slit) of the mask to completely dissolve the amorphous silicon to form a slit-shaped liquid region, the liquid amorphous silicon is cooled and crystallized, and the crystal is a solid region without laser irradiation. From the boundary of, grows in a direction perpendicular to the interface and the growth of grains stops when they meet at the center of the liquid region. This sequential lateral solid crystal has the advantage of growing the grain size by the width of the slit.

However, in this sequential lateral solid crystallization process, it is difficult to crystallize a large area at a time due to the size limitation of the laser beam irradiation area, and the laser beam energy between the unit irradiation areas is nonuniform, so that the characteristics of the thin film transistors vary depending on the irradiation area. In this case, the stitch phenomenon acts as a cause of deterioration of display characteristics.

Disclosure of Invention An object of the present invention is to crystallize a large area at a time, and to crystallize a laser beam irradiation device capable of securing display characteristics even if the laser beam energy is uneven between unit irradiation areas, a crystallization method using the same, and a method of manufacturing a thin film transistor array panel including the same. To provide.

In order to solve the above problems, in the present invention, the amorphous silicon layer is irradiated by irradiating the laser beam through a plurality of masks in which a part of the laser beam from the light source is reflected and part is transmitted, and a thin film pattern defining a transmission area is formed. Crystallize into polycrystalline silicon layer.

More specifically, the laser irradiation apparatus for crystallization according to the embodiment of the present invention, at least two or more are arranged side by side, a plurality of masks, thin films having a thin film pattern defining a region for locally reflecting or transmitting the laser beam And a plate for supporting a substrate on which an amorphous silicon thin film, on which crystallization is made by irradiating a laser beam reflected through the pattern, is formed.

The thin film pattern is preferably made of a semi-transmissive film that reflects a portion of the laser beam and a portion of the laser beam, or a reflecting film that reflects all of the laser beam. It is preferably made of.

The plurality of masks are arranged at regular intervals, and the unit irradiation step of the laser beam is performed while moving the plurality of masks at intervals, and at this time, it is preferable that the edges of the thin film patterns of the plurality of masks are partially overlapped.

It is preferable that the reflectivity of the semi-transmissive film or the reflective film formed on the plurality of thin film patterns is different from each other, and the reflectivity of the thin film pattern formed on each mask increases sequentially as the distance from the optical part is increased.

In the method of manufacturing a thin film transistor array panel according to an embodiment of the present invention, first, an amorphous silicon thin film is formed on an insulating substrate, and the amorphous silicon thin film is crystallized into a polycrystalline silicon thin film using the above-described laser beam irradiation apparatus. The polycrystalline silicon thin film is patterned to form a semiconductor layer. Subsequently, a gate line having a gate electrode overlapping the semiconductor layer is formed, a gate insulating film is formed between the gate electrode and the semiconductor layer, a data line and a drain electrode intersecting the gate line, and having a source electrode are formed. A pixel electrode to be connected is formed.

In this case, the thin film transistor array panel may be used as a substrate of an organic light emitting diode display or a liquid crystal display.

In the crystallization method according to an embodiment of the present invention, first, an amorphous silicon layer is laminated on a substrate, and then a laser beam is formed using a plurality of masks having a thin film pattern defining a region for locally reflecting or transmitting the laser beam. By reflection, the amorphous silicon layer is crystallized into a polycrystalline silicon layer.

The unit irradiation process of the laser beam is performed while moving a plurality of masks at an arranged interval.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a portion of a layer, film, region, plate, etc. is said to be "on top" of another part, this includes not only when the other part is "right on" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

A crystallization apparatus and a method of manufacturing a thin film transistor array panel using the same according to an embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

In the sequential lateral solidification process, a laser beam is passed through the transmission region using a mask defining the transmission region as a slit, thereby locally dissolving the amorphous silicon completely to form a liquid region in the amorphous silicon layer. The grain is grown perpendicular to the interface to crystallize the amorphous silicon into polycrystalline silicon. In this embodiment of the present invention, the amorphous silicon layer is crystallized into the polycrystalline silicon layer through a plurality of masks in which a pattern defining a reflection or semi-transmissive region reflecting part or all of the laser beam or part of the laser beam is formed. .

1 is a block diagram schematically illustrating a crystallization apparatus and a sequential side solid phase crystallization process using the same according to an embodiment of the present invention, Figures 2a to 2c is a structure of the transmission region in the mask used in the crystallization apparatus of the present invention 3 is a plan view illustrating a position to be crystallized through each mask of FIGS. 2A to 2C.

In the sequential lateral solid-state crystallization process according to the embodiment of the present invention, a crystallization laser beam irradiation apparatus as shown in FIG. 1 is used. The crystallization laser beam irradiation apparatus generates a laser beam of a constant frequency and lasers Semi-transmissive area or reflection for locally reflecting or transmitting the optical unit 600 and the laser beam to provide a desired energy to the beam, to remove the afterimage of the laser beam, or to have a uniform frequency A thin film pattern defining a region is formed and includes a plate supporting a substrate (not shown) on which a pattern mask 700 including at least two or more masks and an amorphous silicon layer 150 are formed. In the embodiment of the present invention, the pattern mask 700 includes a plurality of masks, and in this embodiment, the first to third masks 710, 720, and 730 are included, respectively. As shown in FIGS. 2A to 2C, thin film patterns 711, 721, and 731 are defined to define a transflective region or a reflective region for locally reflecting or transmitting the laser beam, and the rest 712, 722, 732. ) Is a transmission portion that transmits the laser beam. In this case, each of the masks 710, 720, and 730 is disposed at a predetermined interval a, and guides the laser beam to the substrate on which the amorphous silicon layer 150 is formed. Therefore, in the crystallization method using the laser beam irradiation apparatus, a wide area corresponding to the thin film patterns 711, 721, and 732 can be crystallized at once by one unit irradiation process. At this time, the laser beam irradiation apparatus for crystallization according to an embodiment of the present invention further includes a support for supporting them to fix the position of the first to third masks (710, 720, 730), the support is first to It may include a gap alignment means for adjusting the interval between the third mask (710, 720, 730). In addition, the laser beam may further include a transmission lens for integrating the laser beam so that the laser beam is irradiated to the correct position of the amorphous silicon thin film 150 on the substrate.

Here, the thin film patterns 711, 721, and 731 disposed on the masks 710, 720, and 730 are alternatively located. After the one unit laser beam irradiation process is finished, each mask 710, 720, and 730 is moved by a distance to perform the next unit laser beam irradiation process, and continuously using the mask in the horizontal direction or the vertical direction. Can be made. 3 illustrates a region crystallized through the masks 710, 720, and 730, where a1 is a region crystallized through the mask 710 of FIG. 2A, and a2 is crystallized through the mask 720 of FIG. 2B. A3 is an area which is crystallized through the mask of FIG. 2C. In this case, in order for the crystallization to be continuously performed in each region during the sequential side solid phase crystallization process, the edge boundaries of the thin film patterns 711, 721, and 731 defining the transflective or reflective regions are preferably disposed to overlap each other.

At this time, the thin film patterns 711, 721, and 731 formed in the first to third masks 710, 720, and 730 are respectively formed in order to uniformize the irradiation amount of the laser beam that reaches the amorphous silicon layer of the substrate and contributes to the crystallization. Should have a different reflectivity, it is preferable to increase the reflectivity sequentially as the distance from the optical unit 600. The thin film patterns 711 and 721 of the first and second masks 710 and 720 reflect a portion of the laser beam to the amorphous silicon thin film 150, and a portion of the thin film patterns 711 and 721 transmits the semi-transmissive layer. In the thin film pattern 731 of the third mask 730, a reflective film is formed to reflect the laser beam to guide the amorphous silicon thin film 150. The thin film pattern 711 of the first mask 710 reflects only one third of the laser beam to guide the amorphous silicon thin film 150, and transmits two thirds of the remaining laser beams to each other. The thin film pattern 721 reflects only one half of the laser beam to the substrate 110 and transmits the other half of the laser beam. The thin film pattern 731 of the third mask 730 is made of a reflective film to transmit the thin film pattern 721. All one laser beam is reflected to guide the substrate 110. Then, the amorphous silicon thin film 150 contributes to the crystallization such that only one third of the laser beams are uniformly reached through the first to third masks 710, 720, and 730 with respect to the laser beams. At this time, in order to sufficiently crystallize, it is preferable to increase the energy of the laser beam, and the irradiation time of the laser beam can be extended.

Therefore, in the laser beam irradiation apparatus and the crystallization method according to the embodiment of the present invention, a large area can be simultaneously crystallized through one irradiation by performing crystallization by reflecting the laser beam using a plurality of masks.

In addition, in the crystallization method according to the embodiment of the present invention, when the unit laser beam irradiation process is performed while moving the mask, the crystallization is performed by dividing the irradiation area into minute regions by the number of masks even if the energy of the laser beam is changed. This makes it possible to prevent the characteristics of the non-uniform thin film transistor from appearing as a stitch phenomenon and to deteriorate the display characteristics.

Next, a method of manufacturing a polysilicon thin film transistor array panel including a crystallization laser beam irradiation apparatus and a crystallization method using the same according to an embodiment of the present invention will be described in detail.

First, the structure of the thin film transistor array panel for an organic light emitting display device will be described with reference to FIGS. 4 to 6.

A blocking layer 111 made of silicon oxide, silicon nitride, or the like is formed on the insulating substrate 110, and first and second polycrystalline silicon layers 150a and 150b are formed on the blocking layer 111, and a second layer is formed on the insulating substrate 110. The polycrystalline silicon layer 157 for capacitors is connected to the polycrystalline silicon layer 150b. The first polycrystalline silicon layer 150a includes first transistor portions 153a, 154a, and 155a, and the second polycrystalline silicon layer 150b includes second transistor portions 153b, 154b, and 155b. The source region (first source region 153a) and the drain region (first drain region, 155a) of the first transistor portions 153a, 154a, and 155a are doped with n-type impurities, and the second transistor portions 153b and 154b. The source region (second source region 153b) and the drain region (second drain region 155b) of 155b are doped with p-type impurities. At this time, depending on the driving conditions, the first source region 153a and the drain region 155a may be doped with p-type impurities, and the second source region 153b and the drain region 155b may be back-doped with n-type impurities. . Here, the first transistor parts 153a, 154a, and 155a are semiconductors of the switching thin film transistor, and the second transistor parts 153b, 154b, and 155b are semiconductors of the driving thin film transistor.

A gate insulating layer 140 made of silicon oxide or silicon nitride is formed on the polycrystalline silicon layers 150a, 150b, and 157. On the gate insulating layer 140, a gate line 121 including a conductive film made of a low resistance conductive material such as aluminum or an aluminum alloy, first and second gate electrodes 124a and 124b, and a storage electrode 133 are formed. have. The first gate electrode 124a is connected to the gate line 121 to have a branch shape, and overlaps the channel portion (first channel portion 154a) of the first transistor, and the second gate electrode 124b is a gate. It is separated from the line 121 and overlaps with the channel portion (second channel portion 154b) of the second transistor. The storage electrode 133 is connected to the second gate electrode 124b and overlaps the storage electrode portion 157 of the polysilicon layer.

A first interlayer insulating layer 801 is formed on the gate line 121, the first and second gate electrodes 124a and 124b, and the storage electrode 133, and transmits a data signal on the first interlayer insulating layer 801. A data line 171, a linear power supply voltage electrode 172 for supplying a power supply voltage, first and second source electrodes 173a and 173b, and first and second drain electrodes 175a and 175b are formed. have. The first source electrode 173a is a part of the data line 171 and has a branch shape, and the first source region is formed through the contact hole 181 penetrating the first interlayer insulating layer 801 and the gate insulating layer 140. The contact hole 153a is connected to the second source electrode 173b and has a branch shape as part of the electrode 172 for the power supply voltage and penetrates the first interlayer insulating film 801 and the gate insulating film 140. It is connected to the second source region 153b through 184. The first drain electrode 175a is connected to the first drain region 155a and the second gate electrode 124b through the contact holes 182 and 183 penetrating the first interlayer insulating layer 801 and the gate insulating layer 140. They are in electrical contact with each other by contact. The second drain electrode 175b is connected to the second drain region 155b through a contact hole 186 penetrating through the first interlayer insulating layer 801 and the gate insulating layer 140, and the data line 171. It is made of the same material.

A second interlayer insulating layer 802 made of silicon nitride, silicon oxide, or an organic insulating material is formed on the data line 171, the power voltage electrode 172, and the first and second drain electrodes 175a and 175b. The second interlayer insulating film 802 has a contact hole 185 exposing the second drain electrode 175b.

The pixel electrode 190 connected to the second drain electrode 175b is formed on the second interlayer insulating layer 802 through the contact hole 185. The pixel electrode 190 is preferably formed of a material having excellent reflectivity such as aluminum or silver alloy. However, if necessary, the pixel electrode 190 may be formed of a transparent insulating material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The pixel electrode 190 made of a transparent conductive material is applied to a bottom emission organic light emitting diode that displays an image in a downward direction of the display panel. The pixel electrode 190 made of an opaque conductive material is applied to top emission organic light emitting diodes that display an image in an upper direction of the display panel.

An upper portion of the second interlayer insulating layer 802 is formed of an organic insulating material, and a partition 803 is formed to separate the organic light emitting cells. The partition 803 surrounds the pixel electrode 190 to define a region in which the organic emission layer 70 is to be filled. The partition wall 803 serves as a light shielding film by exposing and developing a photosensitive agent including a black pigment, and at the same time, the forming process can be simplified. An organic emission layer 70 is formed in an area on the pixel electrode 190 surrounded by the partition 803. The organic light emitting layer 70 is formed of an organic material emitting one of red, green, and blue light, and the red, green, and blue organic light emitting layers 70 are repeatedly arranged in sequence.

The buffer layer 804 is formed on the organic light emitting layer 70 and the partition 803. The buffer layer 804 may be omitted as necessary.

The common electrode 270 is formed on the buffer layer 804. The common electrode 270 is made of a transparent conductive material such as ITO or IZO. If the pixel electrode 190 is made of a transparent conductive material such as ITO or IZO, the common electrode 270 may be made of a metal having good reflectivity such as aluminum.

Although not shown, an auxiliary electrode may be formed of a metal having low resistance to compensate for the conductivity of the common electrode 270. The auxiliary electrode may be formed between the common electrode 270 and the buffer layer 804 or on the common electrode 270. The auxiliary electrode may be formed in a matrix shape along the partition wall 803 so as not to overlap the organic light emitting layer 70. .

The driving of such an organic light emitting panel will be briefly described.

When an on pulse is applied to the gate line 121, the first transistor is turned on, and an image signal voltage or data voltage applied through the data line 171 is transferred to the second gate electrode 124b. When the image signal voltage is applied to the second gate electrode 124b, the second transistor is turned on so that a current caused by the data voltage flows to the pixel electrode 190 and the organic light emitting layer 70, and the organic light emitting layer 70 has a specific wavelength band. Emits light. In this case, the amount of light emitted from the organic light emitting layer 70 varies according to the amount of current flowing through the second thin film transistor, thereby changing the luminance. At this time, the amount of current that the second transistor can flow is determined by the magnitude of the difference between the image signal voltage transmitted through the first transistor and the power supply voltage transmitted through the power supply voltage electrode 172.

Next, a method of manufacturing the thin film transistor array panel for the OLED display will be described with reference to FIGS. 7 to 20B and FIGS. 4 to 6.

First, as shown in FIGS. 7 to 8B, a silicon oxide or the like is deposited on the substrate 110 to form a blocking layer 111, and an amorphous silicon layer is deposited on the blocking layer 111. Deposition of the amorphous silicon layer may be performed by low temperature chemical vapor deposition (LPCVD), plasma enhanced chemical vapor deposition (PECVE), or sputtering. Subsequently, the amorphous silicon layer is irradiated with a laser beam to crystallize into polycrystalline silicon. At this time, as described above, the solid crystal is sequentially performed by the crystallization laser beam irradiation apparatus of FIG. 1 and the crystallization method using the same. Therefore, a large area can be crystallized in one crystallization step, and crystallization by dividing the irradiation area can prevent the display characteristics of the display device from deteriorating even when the energy of the laser beam varies slightly in the unit irradiation step. .

Next, the polycrystalline silicon layer is photo-etched to form the first and second transistor parts 150a and 150b and the storage electrode part 157.

Next, as shown in FIGS. 9 to 10B, the gate insulating layer 140 is deposited on the polycrystalline silicon layers 150a, 150b, and 157. Subsequently, the gate metal layer 120 is deposited, the photosensitive film is coated, exposed, and developed to form the first photoresist film pattern PR1. By etching the gate metal layer 120 using the first photoresist pattern PR1 as a mask, the second gate electrode 124b and the sustain electrode 133 are formed, and the second transistor portion 150b is exposed to the polycrystalline silicon layer. The p-type impurity ions are implanted to define the channel region 154b and form the second source region 153b and the second drain region 155b. In this case, the polycrystalline silicon layer of the second transistor unit 150a is covered and protected by the first photoresist pattern PR1 and the gate metal layer 120.

Next, as shown in FIGS. 11 to 12B, the first photoresist pattern PR1 is removed, the photoresist is newly applied, exposed and developed to form a second photoresist pattern PR2. The gate metal layer 120 is etched using the second photoresist pattern PR2 as a mask to form the first gate electrode 124a and the gate line 121, and to the exposed first polycrystalline silicon layer 150a. The n-type impurity ions are implanted to define the channel region 154a and form the first source region 153a and the first drain region 155a. At this time, the second transistor unit 150a and the storage electrode unit 157 are covered and protected by the second photosensitive film pattern PR2.

Next, as shown in FIGS. 13 to 14B, a first interlayer insulating film 801 is stacked on the gate lines 121 and 124b, the second gate electrode 124b, and the storage electrode 133, and the gate insulating film 140 is formed. Photo-etched together, the contact holes 181, 182, 184, and 186 exposing the first source region 173a, the first drain region 175a, the second source region 173b, and the second drain region 175b, respectively. And a contact hole 183 exposing one end of the second gate electrode 124b.

Next, as shown in FIGS. 15 to 16B, the data metal layer is stacked and photo-etched to form the data line 171, the power voltage electrode 172, and the first and second drain electrodes 175a and 175b. In this case, the pixel electrode 190 to be formed later may be formed together. When the pixel electrode 190 is formed of a transparent conductive material such as ITO or IZO, the pixel electrode 190 is formed through a separate photolithography process.

Next, as shown in FIGS. 17 to 18B, the second interlayer insulating layer 802 is stacked and patterned by a photolithography process using a mask to form a contact hole 185 exposing the second drain electrode 175b.

Next, as shown in FIGS. 19 to 20B, the pixel electrode 190 is formed by stacking and patterning a transparent conductive material or a conductive material having low resistance.

Next, as shown in FIGS. 4 to 6, an organic film including a black pigment is coated on the second interlayer insulating film 802 on which the pixel electrode 190 is formed, exposed, and developed to form a partition 803. The organic emission layer 70 is formed in each pixel area. At this time, the organic light emitting layer 70 usually has a multilayer structure. The organic light emitting layer 70 is formed by masking, deposition, and inkjet printing.

Next, a conductive organic material is coated on the organic emission layer 70 to form a buffer layer 804, and ITO or IZO is deposited on the buffer layer 804 to form a common electrode 270.

At this time, although not shown, the auxiliary electrode may be formed of a low resistance material such as aluminum before or after the common electrode 270 is formed. When the pixel electrode 190 is formed of a transparent conductive material, the common electrode 270 is formed of a metal having excellent reflectivity.

In the organic light emitting diode display panel according to the exemplary embodiment of the present invention and a method of manufacturing the same, the pixel electrode 190 is formed of an opaque conductive film, and the common electrode 270 is formed of a transparent conductive material to form an image. The top emission method of displaying in the upper direction of the display panel has been described.

On the other hand, in the crystallization method according to the embodiment of the present invention, when the pixel electrode 190 is formed of a transparent conductive material and the common electrode 270 is formed of an opaque conductive material, the bottom emission of displaying an image below the display is shown. The same may be applied to the thin film transistor array panel and the method of manufacturing the same. The same may be applied to the thin film transistor array panel and the manufacturing method of the liquid crystal display, and one embodiment will be described with reference to the drawings.

FIG. 21 is a layout view illustrating a structure of a thin film transistor array panel for a liquid crystal display including a polysilicon layer through a crystallization method according to an exemplary embodiment of the present invention, and FIG. 22 is a line XXII-XXII 'of the thin film transistor array panel of FIG. 21. A cross-sectional view taken along the line.

21 and 22, a blocking layer 111 made of silicon oxide or silicon nitride is formed on the transparent insulating substrate 110, and a high concentration of n-type impurities is doped on the blocking layer 111. The polysilicon layer 150 of the thin film transistor including the source region 153 and the drain region 155 and a channel region 154 disposed between them and having no impurities doped therein is formed.

Gate gates 121 elongated in one direction are formed on the gate insulation 140, and a portion of the gate lines 121 extend to overlap the channel region 154 of the polysilicon layer 150. A portion of the gate line 121 to be used is used as the gate electrode 124 of the thin film transistor. A low concentration doped region 152 is formed between the source region 153 and the channel region 154 and between the drain region 155 and the channel region 154 in which n-type impurities are lightly doped.

In addition, a storage electrode line 131 for increasing the storage capacitance of the pixel is parallel to the gate line 121 and formed on the same layer on the gate insulating layer 140. A portion of the storage electrode line 131 overlapping the polycrystalline silicon layer 150 becomes the storage electrode 133, and the polycrystalline silicon layer 150 overlapping the storage electrode 133 becomes the storage electrode region 157. Low concentration doped regions 152 are formed on both sides of the sustain electrode region 157, and a high concentration doped region 158 is positioned on one side of the sustain electrode region 157. One end portion of the gate line 121 may be formed wider than the width of the gate line 121 to be connected to an external circuit, and may be directly connected to an output terminal of the gate driving circuit.

The first interlayer insulating layer 801 is formed on the gate insulating layer 140 and the semiconductor layer 150 on which the gate line 121 and the storage electrode line 131 are formed. The first interlayer insulating layer 801 includes first and second contact holes 141 and 142 exposing the source region 153 and the drain region 155, respectively.

A data line 171 is formed to intersect the gate line 121 on the first interlayer insulating layer 801 to define a pixel region. A portion or the branched portion of the data line 171 is connected to the source region 153 through the first contact hole 141 and the portion connected to the source region 153 is the source electrode 173d of the thin film transistor. Used. One end of the data line 171 may be formed wider than the width of the data line 171 to be connected to an external circuit (not shown), and may be directly connected to an output terminal of the data driving circuit.

A drain electrode 175 is formed on the same layer as the data line 171 and is separated from the source electrode 173 and connected to the drain region 155 through the second contact hole 142.

The second interlayer insulating layer 802 is formed on the first interlayer insulating layer 801 including the drain electrode 175 and the data line 171. The second interlayer insulating layer 602 has a third contact hole 143 exposing the drain electrode 175.

The pixel electrode 190 connected to the drain electrode 175d through the third contact hole 143 is formed in each pixel area on the second interlayer insulating layer 802.

 In the method of manufacturing the thin film transistor array panel according to the embodiment of the present invention, as described above, the polysilicon layer 150 is formed, the semiconductor layer 150 is formed by the laser beam irradiation apparatus and the crystallization method using the same according to the embodiment of the present invention. do.                     

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

As described above, in the present invention, a large area can be crystallized at once by dividing the regions using a plurality of masks having a thin film pattern defining regions that reflect or transmit the laser beam, thereby degrading characteristics of the display device. Can be prevented.

Claims (14)

An optical unit for irradiating a laser beam, A plurality of masks having at least two arranged side by side and having a thin film pattern defining a reflection area for locally reflecting the laser beam and a transmission area for transmitting; A plate supporting a substrate on which an amorphous silicon thin film on which the laser beam reflected through the thin film pattern is irradiated and crystallized is formed Including, When any one of the masks is a selected mask, The sum of the transmission regions of the selected mask is equal to the sum of the reflection regions of the remaining masks except the selected mask or the sum of the reflection regions of the selected mask is the sum of the transmission regions of the remaining masks except the selected mask. Probe device. In claim 1, The thin film pattern is a laser beam irradiation apparatus for crystallization comprising a semi-transmissive film that reflects a portion of the laser beam and a portion of the laser beam or a reflecting film that reflects all of the laser beam. In claim 1, The thin film pattern of the mask which is disposed farthest from the optical part among the plurality of masks is a laser beam irradiation apparatus for crystallization. In claim 1, A plurality of the masks are arranged at regular intervals, the laser beam irradiation apparatus is carried out while the unit irradiation step of the laser beam is performed while moving the plurality of masks at the intervals. delete In claim 1, An edge of the thin film pattern of the plurality of masks, the laser beam irradiation apparatus for crystallization is arranged to partially overlap. In claim 1, The laser beam irradiation apparatus for crystallization, the reflectivity of the transflective film or the reflective film formed on the plurality of thin film patterns are different. 8. The method of claim 7, The laser beam irradiation apparatus for crystallization, the reflectivity of the thin film pattern formed in each of the masks sequentially increases away from the optical portion. Forming an amorphous silicon thin film on the insulating substrate, A method for crystallizing the amorphous silicon thin film into a polycrystalline silicon thin film using the laser beam irradiation apparatus of any one of claims 1, 2, 3, 4, 6, 7, and 8. step, Patterning the polycrystalline silicon thin film to form a semiconductor layer, Forming a gate line having a gate electrode overlapping the semiconductor layer; Forming a gate insulating film between the gate electrode and the semiconductor layer, Forming a data line and a drain electrode crossing the gate line and having a source electrode; Forming a pixel electrode connected to the drain electrode Including, And the crystallizing is performed by moving a plurality of masks at an arrayed interval. The method of claim 9, The thin film transistor array panel is used as a substrate of an organic light emitting display device. The method of claim 9, The thin film transistor array panel is used as a substrate of a liquid crystal display device. Depositing an amorphous silicon layer on top of the substrate, Crystallizing the amorphous silicon layer into a polycrystalline silicon layer by reflecting the laser beam using a plurality of masks having a thin film pattern defining a reflective region for locally reflecting the laser beam and a transmissive region for transmitting the laser beam; Including, And a unit irradiation step of the laser beam is performed while moving the plurality of masks by an arrayed interval. delete delete

Images