KR101035588B1 - 집적화된 박막 인덕터와 실리콘벌크의 격리 구조 및 그의제조 방법 - Google Patents
집적화된 박막 인덕터와 실리콘벌크의 격리 구조 및 그의제조 방법 Download PDFInfo
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- KR101035588B1 KR101035588B1 KR1020040115856A KR20040115856A KR101035588B1 KR 101035588 B1 KR101035588 B1 KR 101035588B1 KR 1020040115856 A KR1020040115856 A KR 1020040115856A KR 20040115856 A KR20040115856 A KR 20040115856A KR 101035588 B1 KR101035588 B1 KR 101035588B1
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 80
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 80
- 239000010703 silicon Substances 0.000 title claims abstract description 80
- 239000010409 thin film Substances 0.000 title claims abstract description 46
- 238000000034 method Methods 0.000 title claims description 18
- 238000004519 manufacturing process Methods 0.000 title abstract description 5
- 239000010408 film Substances 0.000 claims abstract description 126
- 238000002955 isolation Methods 0.000 claims abstract description 56
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 27
- 229920005591 polysilicon Polymers 0.000 claims abstract description 27
- 150000004767 nitrides Chemical group 0.000 claims description 16
- 125000006850 spacer group Chemical group 0.000 claims description 14
- 238000000151 deposition Methods 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 2
- 238000000059 patterning Methods 0.000 claims description 2
- 230000002265 prevention Effects 0.000 claims 3
- 239000012528 membrane Substances 0.000 claims 1
- 230000005684 electric field Effects 0.000 abstract description 5
- 239000010410 layer Substances 0.000 description 63
- 229910052751 metal Inorganic materials 0.000 description 43
- 239000002184 metal Substances 0.000 description 43
- 230000000149 penetrating effect Effects 0.000 description 7
- 239000011229 interlayer Substances 0.000 description 6
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 5
- 230000000903 blocking effect Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/10—Inductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
- H01L29/407—Recessed field plates, e.g. trench field plates, buried field plates
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Element Separation (AREA)
Abstract
Description
Claims (14)
- 셀지역과 인덕터지역이 정의된 실리콘벌크;상기 인덕터지역의 실리콘벌크에 형성된 트렌치;상기 트렌치의 바닥 및 측벽 상에 형성된 격리막;상기 트렌치 내부의 격리막 상에 형성되며 상기 격리막에 의해 상기 실리콘벌크와 전기적으로 격리되는 자기장쉴드막; 및상기 자기장쉴드막 상부에 형성된 박막인덕터를 포함하는 집적화된 박막인덕터와 실리콘벌크의 격리구조.
- 제1항에 있어서,상기 자기장쉴드막은,폴리실리콘막과 살리사이드막의 적층구조인 것을 특징으로 하는 집적화된 박막인덕터와 실리콘벌크의 격리구조.
- 제1항에 있어서,상기 격리막은,질화막인 것을 특징으로 하는 집적화된 박막인덕터와 실리콘벌크의 격리구 조.
- 제3항에 있어서,상기 질화막은,1000Å∼2000Å 두께인 것을 특징으로 하는 집적화된 박막인덕터와 실리콘벌크의 격리구조.
- 제1항에 있어서,상기 셀지역의 실리콘벌크에 형성된 소자분리용 트렌치;상기 소자분리용 트렌치의 바닥 및 측벽 상에 형성된 탑모트방지용 격리막;상기 탑모트방지용 격리막 상에서 상기 트렌치 내부를 매립하는 트렌치매립산화막을 더 포함하는 것을 특징으로 하는 집적화된 박막인덕터와 실리콘벌크의 격리구조.
- 제5항에 있어서,상기 탑모트방지용 격리막은,질화막인 것을 특징으로 하는 집적화된 박막인덕터와 실리콘벌크의 격리구조.
- 제6항에 있어서,상기 질화막은,1000Å∼2000Å 두께인 것을 특징으로 하는 집적화된 박막인덕터와 실리콘벌크의 격리구조.
- 셀지역과 인덕터지역이 정의된 실리콘벌크를 준비하는 단계;상기 인덕터지역과 상기 셀지역의 실리콘벌크를 소정 깊이로 식각하여 트렌치를 형성하는 단계;상기 인덕터지역의 트렌치의 바닥 및 측벽 상에 격리막을 형성하는 단계;상기 인덕터지역의 트렌치 내부의 격리막 상에 상기 격리막에 의해 상기 실리콘벌크와 전기적으로 격리되는 자기장쉴드막을 형성하는 단계;상기 자기장쉴드막 상부에 절연막을 형성하는 단계; 및상기 절연막 상에 박막인덕터를 형성하는 단계를 포함하는 집적화된 박막인덕터와 실리콘벌크의 격리 방법.
- 제8항에 있어서,상기 격리막은,질화막으로 형성하는 것을 특징으로 하는 집적화된 박막인덕터와 실리콘벌크의 격리 방법.
- 제9항에 있어서,상기 질화막은,1000Å∼2000Å 두께로 형성하는 것을 특징으로 하는 집적화된 박막인덕터와 실리콘벌크의 격리 방법.
- 제8항에 있어서,상기 자기장쉴드막을 형성하는 단계는,상기 격리막을 포함한 전면에 폴리실리콘막을 증착하는 단계;상기 폴리실리콘막을 선택적으로 패터닝하여 상기 트렌치 내부의 격리막 상에 자기장쉴드폴리실리콘막을 형성하는 단계;상기 자기장쉴드폴리실리콘막의 양측벽에 쉴드스페이서를 형성하는 단계; 및상기 자기장쉴드폴리실리콘막의 상면에 자기장쉴드살리사이드막을 형성하는 단계를 포함하는 것을 특징으로 하는 집적화된 박막인덕터와 실리콘벌크의 격리 방법.
- 제11항에 있어서,상기 쉴드스페이서는, 질화막을 증착한 후 에치백하여 형성하는 것을 특징으로 하는 집적화된 박막인덕터와 실리콘벌크의 격리 방법.
- 제8항에 있어서,상기 셀지역의 트렌치의 바닥 및 측벽 상에 탑모트방지용 격리막이 형성되고, 상기 탑모트방지용 격리막 상에 상기 셀지역의 트렌치를 매립하는 트렌치매립산화막을 형성하는 것을 특징으로 하는 집적화된 박막인덕터와 실리콘벌크의 격리 방법.
- 제13항에 있어서,상기 탑모트방지용 격리막은, 질화막으로 형성하는 것을 특징으로 하는 집적화된 박막인덕터와 실리콘벌크의 격리 방법.
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KR101035588B1 true KR101035588B1 (ko) | 2011-05-19 |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000022085A (ja) | 1998-06-29 | 2000-01-21 | Toshiba Corp | 半導体装置及びその製造方法 |
JP3488164B2 (ja) | 2000-02-14 | 2004-01-19 | Necエレクトロニクス株式会社 | 半導体装置 |
JP2004031922A (ja) | 2002-05-10 | 2004-01-29 | Mitsubishi Electric Corp | 半導体装置 |
KR20050011091A (ko) * | 2003-07-21 | 2005-01-29 | 매그나칩 반도체 유한회사 | 차폐층을 구비하는 인덕터 제조방법 |
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000022085A (ja) | 1998-06-29 | 2000-01-21 | Toshiba Corp | 半導体装置及びその製造方法 |
JP3488164B2 (ja) | 2000-02-14 | 2004-01-19 | Necエレクトロニクス株式会社 | 半導体装置 |
JP2004031922A (ja) | 2002-05-10 | 2004-01-29 | Mitsubishi Electric Corp | 半導体装置 |
KR20050011091A (ko) * | 2003-07-21 | 2005-01-29 | 매그나칩 반도체 유한회사 | 차폐층을 구비하는 인덕터 제조방법 |
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