KR100967245B1 - Manufacturing method of light emitting device and light emitting device - Google Patents

Abstract

An object of the present invention is to provide a method of manufacturing a light emitting device that simplifies the manufacturing process of the light emitting device.

The manufacturing method of the light emitting device 1 which concerns on this invention has a 1st conductive type 1st semiconductor layer, and a 2nd conductive type 2nd semiconductor layer different from a 1st conductivity type, A 1st semiconductor layer and a 2nd semiconductor A method of manufacturing a light emitting device 1 that emits light by applying a forward voltage to a layer, the electrode forming step of forming a first electrode, a second electrode spaced apart from the first electrode, and an electrode on a first semiconductor layer; In the forming step, a voltage is applied to each of the first electrode and the second electrode formed so that the second electrode and the second semiconductor layer can be electrically connected in both directions.

Light emitting device, electrode, light emitting layer, semiconductor layer, sapphire substrate

Description

Manufacturing method and light emitting device of the light emitting device {MANUFACTURING METHOD OF LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE}

The present invention relates to a method of manufacturing a light emitting device having a partial conducting portion and a light emitting device.

Conventionally, as a method for manufacturing a light emitting diode (LED) formed of a nitride compound semiconductor, a compound semiconductor layer is formed by growing an n-type GaN layer, a light emitting layer, and a p-type GaN layer in this order on a sapphire substrate. After forming, the p-type GaN layer is etched to a part of the n-type GaN layer to expose the n-type GaN layer, and a p-type electrode is formed on the p-type GaN layer, while the n-type GaN layer is exposed on the exposed n-type GaN layer. A manufacturing method is known in which an electrode is formed separately from a p-type electrode.

In the light emitting device described in Patent Document 1, after forming a buffer layer, an n layer, and a semi-insulating layer (I layer) on the sapphire substrate in this order, an n-side electrode is formed on the surface of the I layer. The light-emitting element constituted by forming a low resistance region immediately under the n-side electrode by performing heat treatment and then forming an I-side electrode is described.

According to the light emitting element of patent document 1, since a low resistance area | region can be formed in the area | region of the I layer directly under n-side electrode, a current can flow between an I-side electrode and an n-side electrode, without making a contact hole.

[Patent Document 1] Japanese Patent Application Laid-open No. Hei 4-273175

However, in the conventional manufacturing method of manufacturing LED from a nitride compound semiconductor, when forming an n type electrode, the process of removing a compound semiconductor layer using a photolithography technique and an etching technique is required. In addition, since the p-type electrode is in contact with the p-type GaN layer and the n-type electrode is in contact with the n-type GaN layer, the p-type electrode and the n-type electrode are formed of the same material from the viewpoint of requiring resistance bonding between the electrode and the semiconductor. Since it is difficult to do this, it is necessary to form the p type electrode and the n type electrode in separate processes, respectively. Therefore, it is difficult to simplify the manufacturing process of LED by the conventional manufacturing method of LED of a nitride type compound semiconductor.

Moreover, in manufacture of the light emitting element of patent document 1, after forming an n-side electrode, a heat treatment process is required, and it is necessary to form an I side electrode after a heat treatment process. That is, in the light emitting element of patent document 1, an n side electrode and an I side electrode cannot be formed simultaneously. Therefore, it is difficult to simplify the manufacturing process of a light emitting element by the manufacturing method of the light emitting element of patent document 1. As shown in FIG.

Accordingly, the present invention has been made in view of the above circumstances, and an object thereof is to simplify the manufacturing process of the light emitting device.

In order to achieve the above object, the present invention has a first conductive type first semiconductor layer and a second conductive type second semiconductor layer different from the first conductive type, and are forward in the first semiconductor layer and the second semiconductor layer. A method of manufacturing a light emitting device that emits light by applying a voltage of. The electrode forming step of forming a first electrode, a second electrode spaced apart from the first electrode, and an electrode forming step are respectively formed on the first semiconductor layer. A method of manufacturing a light emitting device is provided having a voltage application step of applying a voltage between a first electrode and a second electrode to make the second electrode and the second semiconductor layer electrically conductive in both directions.

In the method of manufacturing the light emitting device, the first conductivity type is p-type, the second conductivity type is n-type, and the voltage application step applies a voltage between the first electrode and the second electrode, By breaking a part of the pn junction between the semiconductor layer and the second semiconductor layer, the second electrode and the second semiconductor layer may be electrically connected in both directions.

Moreover, in the manufacturing method of the said light-emitting device, in an electrode formation process, you may form a 1st electrode and a 2nd electrode so that the area of a 2nd electrode may become smaller than the area of a 1st electrode. In the electrode forming step, the first electrode and the second electrode may be simultaneously formed. And in the manufacturing method of the said light-emitting device, in an electrode formation process, you may form a 1st electrode and a 2nd electrode from the same material.

Moreover, in order to achieve the said objective, in this invention, the 1st conductive type 1st semiconductor layer, the 2nd conductive type 2nd semiconductor layer provided in the upper part and different from a 1st conductivity type, A first electrode provided on the first semiconductor layer, a second electrode provided separately from the first electrode on the first semiconductor layer, and formed below the second electrode to electrically connect the second electrode and the second semiconductor layer. There is provided a light emitting device having a partial conduction portion for conducting in both directions.

In the above light emitting device, the partial conducting portion may be formed by applying a predetermined voltage between the first electrode and the second electrode. In the light emitting device, the area of the second electrode may be smaller than that of the first electrode. In the above light emitting device, the material for forming the first electrode and the material for forming the second electrode may be the same.

According to the present invention, the manufacturing process of the light emitting device can be simplified.

[First Embodiment]

1 is a schematic perspective view of a light emitting device according to a first embodiment of the present invention. 2 shows a schematic longitudinal cross-sectional view of the light emitting device according to the first embodiment.

(Configuration of Light Emitting Device 1)

As shown in FIG. 1, the light emitting device 1 according to the first embodiment includes a sapphire substrate 10 having a (0001) plane and a second conductive second semiconductor layer provided on the sapphire substrate 10. The first conductivity type first semiconductor layer is different from the n-type GaN layer 20, the light emitting layer 22 provided on the n-type GaN layer 20, and the second conductivity type provided on the light emitting layer 22. It has a semiconductor laminated structure which has the p-type GaN layer 24 as it.

The light emitting device 1 further includes a p-type electrode 40 as a first electrode formed in a predetermined region on the p-type GaN layer 24 and a p-type electrode 40 on the p-type GaN layer 24. And an n-type electrode 42 as a second electrode formed to be spaced apart from each other. In addition, as shown in FIG. 2, the light emitting device 1 penetrates the p-type GaN layer 24 and the light emitting layer 22 below the n-type electrode 42, and is part of the n-type GaN layer 20. In a predetermined region reaching up to the region, the partial conductive portion 26 capable of electrically conducting the n-type electrode 42 and the n-type GaN layer 20 in both directions is provided.

Here, the n-type GaN layer 20, the light emitting layer 22, and the p-type GaN layer 24 are each III, which is formed by, for example, a metal organic chemical vapor deposition (MOCVD) method. It is a layer which consists of a group nitride compound semiconductor.

For example, the n-type GaN layer 20 is formed of n-GaN doped with a predetermined amount of Si as an n-type dopant. In addition, the light emitting layer 22 has a quantum well structure formed of In _x Ga _{1 - x} N / GaN. The p-type GaN layer 24 is formed of p-GaN doped with a predetermined amount of Mg as a p-type dopant.

Further, the n-type electrode 42 formed on the p-type GaN layer 24 according to the present embodiment is formed by being cut away from each other, that is, electrically separated from the p-type electrode 40. For example, the n-type electrode 42 is located in a predetermined region including the vicinity of one corner portion of the upper surface of the p-type GaN layer 24 of the light emitting device 1 having a substantially rectangular shape when viewed from the upper surface. Is formed. The p-type electrode 40 is spaced apart from the n-type electrode 42, that is, the diagonal of one corner portion on the upper surface of the p-type GaN layer 24 apart from the n-type electrode 42. It is formed in a predetermined area including at least.

Here, the p-type electrode 40 and the n-type electrode 42 are each formed of the same material. For example, the p-type electrode 40 and the n-type electrode 42 are each formed of indium tin oxide (ITO). In the present embodiment, the n-type electrode 42 is formed so that the area of the n-type electrode 42 is smaller than that of the p-type electrode 40.

The partial conduction portion 26 is formed below the n-type electrode 42 to electrically conduct the n-type electrode 42 and the n-type GaN layer 20 in both directions. The presence of the partial conduction portion 26 causes the p-type GaN layer 24 and the n-type GaN layer 20 to be electrically connected in both directions. Specifically, the partial conducting portion 26 electrically conducts at least a portion of the p-type GaN layer 24 and the light emitting layer 22 below the n-type electrode 42 to a part of the n-type GaN layer 20. Area. In other words, in the partial conduction portion 26, rectification characteristics are not generated between the p-type GaN layer 24 and the n-type GaN layer 20.

For example, the partial conductive portion 26 is configured such that the p-type junction 40 and the n-type GaN layer 20 break the voltage at the pn junction when the p-type junction is connected to the p-type electrode 40. pn between the p-type GaN layer 24 and the n-type GaN layer 20 below the n-type electrode 42 that is applied between the n-type electrodes 42 and immediately below the n-type electrode 42. The n-type electrode 42 and the n-type GaN layer 20 are electrically conductive in both directions, which are formed by breaking a portion of the junction.

In addition, before forming the n-type GaN layer 20, a buffer layer formed of AlN or GaN on the sapphire substrate 10 may be formed by MOCVD. In addition, the quantum well structure of the light emitting layer 22 may form any of a single quantum well structure or a multi quantum well structure, or may be a light emitting layer having no quantum well structure. Further, on the p-type GaN layer 24, a p-type contact layer (p ⁺ GaN layer) doped with Mg at a doping concentration higher than the amount of Mg doped with respect to the p-type GaN layer 24 is formed by MOCVD. It may be.

In addition, the buffer layer, the n-type GaN layer 20, the light emitting layer 22, the p-type GaN layer 24, the p-type GaN layer 24 and the p-type contact layer provided on the sapphire substrate 10 are molecular beam epitaxy. The compound semiconductor layer may be formed by a Molecular Beam Epitaxy (MBE), a Halide Vapor Phase Epitaxy (HVPE), or the like.

The p-type electrode 40 and the n-type electrode 42 may be formed of zinc oxide (ZnO). Alternatively, the p-type electrode 40 and the n-type electrode 42 may be formed of a metal material mainly composed of Ag, Al, Ni, Au, Pd, Cr, or the like. In addition, a pad electrode may be formed in a part of the region on the p-type electrode 40. Similarly, the pad electrode may be formed in a predetermined region on the n-type electrode 42. In this case, the pad electrode formed on the p-type electrode 40 and the material forming the pad electrode formed on the n-type electrode 42 can be formed of the same material. For example, the pad electrode can be mainly formed of metal materials such as Ti, Ni, and Au.

The light emitting device 1 of this embodiment which consists of the above structure is an LED which emits light of the wavelength of a blue region. For example, the light emitting device 1 is a face up type blue LED that emits light having a peak wavelength of 470 nm when the forward voltage is 3.5 V and the forward current is 20 mA. In addition, the planar dimension of the light emitting device 1 has a longitudinal dimension and a transverse dimension of approximately 350 mu m, respectively.

The light emitting device 1 may be an LED that emits light having a peak wavelength in an ultraviolet region, a near ultraviolet region, or a green region, but the region of the peak wavelength of light emitted by the LED is not limited to these wavelengths. In addition, in another modification, the plane dimension of the light emitting device 1 is not limited to this. For example, the planar dimension of the light emitting device 1 may be designed such that the longitudinal dimension and the transverse dimension are each approximately 1 mm.

(Manufacturing method of light emitting device 1)

Figure 3 (a) shows a longitudinal cross-sectional view of the epitaxial growth substrate. 3B shows a longitudinal cross-sectional view after forming an electrode on the epitaxial growth substrate. 3C shows a longitudinal cross-sectional view after the p-type electrode and the n-type electrode are formed. 3 (d) shows a longitudinal cross-sectional view after forming the partial conducting portion.

First, the group III nitride compound semiconductor is epitaxially grown on the surface of the sapphire substrate 10 by using MOCVD to form the epitaxial growth substrate 2. That is, on the sapphire substrate 10, the n-type GaN layer 20, the light emitting layer 22, and the p-type GaN layer 24 are epitaxially grown in this order to form the epitaxial growth substrate 2. It forms (Fig. 3 (a)).

Next, the electrode 46 is formed on the p-type GaN layer 24 by vacuum deposition, and the p-type GaN layer 24 is covered with the electrode 46 (Fig. 3 (b)). In this embodiment, ITO of a transparent electrode is used as the electrode 46. In addition, the electrode 46 may be formed of a metal material such as Ag, Al, Ni, Au, Pd, or Cr by using a sputtering method.

Then, using a photolithography technique, a mask by photoresist is formed in a predetermined region on the electrode 46. Here, the mask is formed so that the area of the n-type electrode 42 is smaller than the area of the p-type electrode 40. Next, the p-type electrode 40 and the n-type electrode 42 are formed by removing the electrodes 46 other than the region covered with the mask using an etching technique. Therefore, the p-type electrode 40 and the n-type electrode 42 are simultaneously formed of the same material. As a result, the substrate 3 with electrodes on which the p-type electrode 40 and the n-type electrode 42 are provided is formed on the epitaxial growth substrate 2 (Fig. 3 (c)).

In addition, before forming the electrode 46 shown in Fig. 3B, a predetermined mask pattern is formed using photolithography technique, and after forming the electrode 46 from the formed mask pattern, the lift is carried out. The p-type electrode 40 and the n-type electrode 42 may be formed by the off method.

Subsequently, for the purpose of applying a predetermined voltage between the p-type electrode 40 and the n-type electrode 42, the voltage application probe 50 is brought into contact with the p-type electrode 40 and the n-type electrode is used. The voltage application probe 52 is brought into contact with the electrode 42. Then, a predetermined voltage is applied between the p-type electrode 40 and the n-type electrode 42 through the probe 50 and the probe 52. In addition, the probe 50 and the probe 52 are formed with a metal or an electrically conductive material, such as tungsten, for example.

That is, first, the p-type electrode 40 is set to the positive side, and the n-type electrode 42 is set to the negative side. An excessive voltage is applied between the p-type electrode 40 and the n-type electrode 42 to make the n-type electrode 42 and the n-type GaN layer 20 electrically conductive in both directions. Through this process, the n-type electrode 42 and the n-type GaN layer 20 are made electrically conductive in both directions. That is, by applying an excessive voltage between the p-type electrode 40 and the n-type electrode 42, the p-type GaN layer 24 and the n-type GaN layer 20 below the n-type electrode 42 At least some of the electrical is conducted in both directions.

Specifically, both the semiconductor junction of the p-type GaN layer 24 and the light emitting layer 22 positioned below the n-type electrode 42 and the semiconductor junction formed of the light emitting layer 22 and the n-type GaN layer 20 are both. And a reverse voltage sufficient for the p-type GaN layer 24 to electrically conduct in both directions with the n-type GaN layer 20 through the light-emitting layer 22. It is applied between (42).

As a result, a portion of the n-type GaN layer 20 is formed from the p-type GaN layer 24 below the n-type electrode 42, that is, the light emitting layer 22 penetrates from the p-type GaN layer 24 to n-type. It is a region reaching up to a part of the GaN layer 20, and a partial conductive portion 26 is formed to electrically connect the p-type GaN layer 24 and the n-type GaN layer 20 to each other (Fig. 3 (d). )]. As a result, the light emitting device 1 is formed.

In addition, the magnitude of the reverse voltage is such that the semiconductor junction formed between the p-type GaN layer 24 and the n-type GaN layer 20 is broken so that the p-type GaN layer 24 and the n-type GaN layer 20 are electrically connected. This is the size of conduction in both directions. For example, when the p-type GaN layer 24 and the n-type GaN layer 20 form a pn junction, a voltage for breaking the pn junction is applied to the p-type electrode 40 and the n-type electrode 42. The partial conduction portion 26 is formed by applying between the lines.

In addition, when the light emitting layer 22 is formed between the p-type GaN layer 24 and the n-type GaN layer 20, the junction and the light emitting layer formed between the p-type GaN layer 24 and the light emitting layer 22 ( The partial conduction portion 26 is formed by applying a voltage having a magnitude that breaks the junction formed between the 22) and the n-type GaN layer 20 between the p-type electrode 40 and the n-type electrode 42.

When the light emitting layer 22 has a quantum well structure, a junction formed between the p-type GaN layer 24 and the quantum well structure and a plurality of well layers and a plurality of barrier layers included in the quantum well structure are formed. The partial conduction portion 26 is applied by applying a voltage having a magnitude that breaks the junction formed between the plurality of junctions and the quantum well structure and the n-type GaN layer 20 between the p-type electrode 40 and the n-type electrode 42. ) Is formed.

(Operation of the light emitting device 1)

First, when predetermined power is supplied to the p-type electrode 40 and the n-type electrode 42, electrons pass through the partial conductive portion 26 from the n-type electrode 42, and n from the partial conductive portion 26. It is supplied to the light emitting layer 22 through the type GaN layer 20. The light emitting layer 22 emits light in a predetermined wavelength range according to the supplied current. Light emitted from the light emitting layer 22 propagates through the sapphire substrate 10 and is radiated to the outside of the light emitting device 1.

The partial conduction portion 26 formed below the n-type electrode 42 conducts a current supplied to the n-type electrode 42 to supply the n-type GaN layer 20. Therefore, in the region where the partial conductive portion 26 is formed, the light emitting layer 22 existing in the region before the partial conductive portion 26 is formed is destroyed and loses its function as the light emitting layer 22. The light emitting layer 22 does not emit light below the n-type electrode 42.

(Effect of 1st Embodiment)

In the light emitting device 1 according to the present embodiment, the p-type electrode 40 and the n-type electrode 42 are simultaneously formed on the p-type GaN layer 24, and the p-type electrode 40 and the n-type electrode ( By applying a predetermined voltage between the p-type GaN layer 24 below the n-type electrode 42, the pn junction included in a part of the n-type GaN layer 20 can be broken. Thereby, it is possible to electrically conduct from the p-type GaN layer 24 below the n-type electrode 42 to a part of the region of the n-type GaN layer 20 in both directions. Therefore, the step of etching from the p-type GaN layer 24 to a part of the n-type GaN layer 20, which is essential in the conventional manufacturing method of the light emitting device, and the step of forming the p-type electrode and the n-type electrode separately It can omit and can greatly simplify the manufacturing process of the light emitting device 1. Therefore, the manufacturing cost of the light emitting device 1 can be lowered and the throughput can be improved.

In addition, in this embodiment, the junction of the p-type GaN layer 24 and the n-type GaN layer 20 which exist below the p-type electrode 40 is forward, while it exists below the n-type electrode 42. The junction between the p-type GaN layer 24 and the n-type GaN layer 20 is reversed. Therefore, an excessive voltage is applied to the junction below the n-type electrode 42 to break the junction below the n-type electrode 42. Here, when the area of the n-type electrode 42 is smaller than the area of the p-type electrode 40, the amount of current required to break the junction below the n-type electrode 42 is equal to that of the n-type electrode 42. The area and the area of the p-type electrode 40 are smaller than the case where they are the same. Therefore, in this embodiment, by making the area of the n-type electrode 42 smaller than the area of the p-type electrode 40, the amount of current is rapidly increased to prevent the junction below the p-type electrode 40 from being broken. can do.

Second Embodiment

4 shows a top view of a part of the substrate with electrodes in the middle of the manufacturing process of the light emitting device according to the second embodiment of the present invention.

The board | substrate 3 with electrodes which concerns on this embodiment has the point which further includes the outer periphery electrode 44, and the point in which the some p-type electrode 40 and the some n-type electrode 42 are formed, FIG. Since it is substantially the same as the board | substrate with electrode 3 demonstrated in (c), detailed description is abbreviate | omitted except a difference with the board | substrate with electrode 3 demonstrated in FIG.3 (c).

(Configuration of Substrate 3 with Electrodes)

The substrate 3 with electrodes according to the present embodiment includes an outer circumferential electrode 44 on the p-type GaN surface 25, and a p-type electrode 40 and an n-type electrode 42 inside the outer circumferential electrode 44. A plurality of unit electrodes 48 having one set are provided. The plurality of unit electrodes 48 are formed at predetermined intervals along the shape of the outer edge inner edge 402, for example, the inner edge of the outer electrode 44. For example, the plurality of unit electrodes 48 are formed in a matrix on the p-type GaN surface 25.

(Manufacturing method of the board | substrate 3 with an electrode)

The outer circumferential electrode 44 is formed of the same material as the p-type electrode 40 and the n-type electrode 42 included in the unit electrode 48. That is, the plurality of unit electrodes 48 and the outer electrode 44 are simultaneously formed on the entire surface of the epitaxial growth substrate 2 by using a photolithography technique, a vacuum deposition technique, or a sputtering technique (electrode formation process). .

For example, except for a region where the plurality of unit electrodes 48 and the outer electrode 44 are to be formed, a mask such as a photoresist is placed on the epitaxial growth substrate 2, that is, the p-type GaN layer 24. It is formed on the p-type GaN surface 25 which is the upper surface of the. And 300 nm-thick Ni is formed into a film by the sputtering method on the whole surface of the p-type GaN surface 25 after forming a mask. The plurality of unit electrodes 48 and the outer circumferential electrodes 44 are formed by the lift-off method. Subsequently, the epitaxial growth substrate 2 after the formation of the plurality of unit electrodes 48 and the outer circumferential electrode 44 is subjected to a heat treatment for 5 minutes at 400 ° C. under an N ₂ atmosphere (alloy step). By passing through this alloy process, the board | substrate 3 with an electrode is obtained.

In another example, ITO may be formed on the entire surface of the p-type GaN surface 25 of the epitaxially grown substrate 2. Then, a mask is formed with a photoresist or the like in the region where the plurality of unit electrodes 48 and the outer circumferential electrode 44 are to be formed. Subsequently, the ITO except for the portion covered with the mask is removed by etching. Thereby, the some unit electrode 48 and the outer peripheral electrode 44 can be provided on the epitaxial growth board | substrate 2, and the board | substrate 3 with an electrode can also be formed.

Subsequently, the outer electrode 44 is set to the positive side, and the n-type electrode 42 included in one unit electrode 48 is set to the negative side, and a predetermined voltage is set to the outer electrode 44 and the n-type electrode ( 42). For example, in this embodiment, by applying a voltage of about 100 V between the outer circumferential electrode 44 and the n-type electrode 42, the p-type GaN layer 24 present below the n-type electrode 42. And the semiconductor junction of the light emitting layer 22 and both of the semiconductor junctions formed of the light emitting layer 22 and the n-type GaN layer 20 are destroyed (voltage application step). Such a voltage application process is performed to each of the plurality of n-type electrodes 42. As a result, a plurality of partial conductive portions 26 are formed below each of the plurality of n-type electrodes 42.

After the voltage application step, the p-type electrode 40 is set to the positive side of each of the plurality of unit electrodes 48, and the n-type electrode 42 is set to the negative side to thereby set the p-type electrode 40 and n. The electric current is passed between the mold electrodes 42, and the electrical and optical characteristics of the substrate 3 with the electrode under the unit electrode 48 are respectively measured (characteristic evaluation step).

In addition, after performing a voltage application process and a characteristic evaluation process with respect to one of the some unit electrode 48, you may transfer another unit electrode 48 to a voltage application process and a characteristic evaluation process in order. Or after performing the voltage application process with respect to all the some unit electrode 48 and forming the partial conduction part 26 with respect to each of the some unit electrode 48, all of the some unit electrode 48 You may implement a characteristic evaluation process about.

Subsequently, the sapphire substrate 10 is polished to a predetermined thickness, for example, about 100 μm (polishing step). And in the area | region in which the unit electrode 48 on the electrode attachment board 3 is not provided, the some unit electrode 48 is scribed so that it may be contained in a substantially rectangular area | region respectively separately when viewed from an upper surface. That is, it is scribed to have a predetermined chip shape (eg, approximately square) and chip dimensions (eg, approximately 350 μm square). Subsequently, a plurality of light emitting devices 1 are formed along the scribed shape by cleaving (chip forming step).

In addition, in this embodiment, although the outer periphery electrode 44 is substantially square in an upper surface, the shape of the outer periphery electrode 44 is not limited to this. The shape of the outer circumferential electrode 44 may be formed in a shape along the substrate outer edge 300 of the epitaxial growth substrate 2, for example, in a substantially circular shape when viewed from the top. In order to maximize the number of light emitting devices 1 that can be obtained from one epitaxially grown substrate 2, the plurality of unit electrodes 48 may be arranged in a substantially circular outer electrode 44. It may be arranged at predetermined intervals along the inner edge of the outer electrode.

(Effect of 2nd Embodiment)

According to the manufacturing method of the light-emitting device 1 which concerns on this embodiment, the several unit electrode and the outer peripheral electrode 44 can be simultaneously formed in the epitaxial growth board | substrate 2 in the same process. Then, by applying a predetermined voltage between each of the plurality of n-type electrodes 42 and the outer circumferential electrode 44, the p-type GaN layer 24 located below each of the plurality of n-type electrodes 42 is removed. Up to a portion of the n-type GaN layer 20 can be electrically conducted in both directions. Thereby, the process of etching from the p-type GaN layer 24 to a part of the n-type GaN layer 20 which was essential in the conventional manufacturing method of the light-emitting device, and the process of forming ap-type electrode and an n-type electrode separately are performed. It can omit and can greatly simplify the manufacturing process of the light emitting device 1. Thereby, compared with the conventional manufacturing method of the light emitting device, the improvement of a yield and the drastic reduction of manufacturing time and manufacturing cost can be implement | achieved.

<Examples>

5 is an enlarged perspective view of a part of the substrate with electrodes according to the embodiment of the present invention.

(Structure of Electrode Substrate 4)

The substrate 4 with electrodes includes a sapphire substrate 10, a buffer layer provided on the sapphire substrate 10, an n-type GaN layer 20 provided on the buffer layer, and a light emitting layer provided on the n-type GaN layer 20. (22), the p-type GaN layer 24 provided on the light emitting layer 22, the contact layer provided on the p-type GaN layer 24, and the electrode provided on the contact layer were obtained by forming in this order.

Specifically, a plurality of compound semiconductor layers were grown on the sapphire substrate 10 by MOCVD to obtain an epitaxial growth substrate 2. That is, AlN as a buffer layer was first grown by 15 nm on the sapphire substrate 10. Subsequently, about 3000-4000 nm was grown the n-type GaN layer 20 formed mainly from GaN which doped Si in the range of 1-4 * 10 <^18> (cm <^-3> ) on a buffer layer. On the n-type GaN layer 20, as a light emitting layer 22, six pairs of quantum wells composed of In _0.2 Ga _0.8 N / GaN (In _0.2 Ga _0.8 N: 3 nm, GaN: 10-12 nm) are grown. I was.

Subsequently, the light emitting layer 22 on, p-type 1 × 10 ²⁰ Mg is a GaN layer (24) (㎝ ^-3) doped with a _{p-In 0 .08 Ga 0 .92} N / p-Al 0 .3 Ga _{0 .7 N (p-in 0} .08 Ga 0 .92 N: 1.7 ㎚, p-Al 0 .3 Ga 0 .7 N: 4 ㎚) after configuration layer 5 grown into a pair, the Mg 5 A p-GaN layer doped with 10 × 10 ¹⁹ (cm ⁻³ ) was grown to 80 to 100 nm. On the p-type GaN layer 24, 25 nm of the p ⁺ -GaN layer doped with Mg-doped 1x10 <^20> (cm <^-3> ) was grown as a contact layer. As a result, an epitaxial growth substrate 2 was obtained.

Next, the source electrode 43, the ring electrode 41, and the outer circumferential electrode 45 were formed on the contact layer using photolithography and etching techniques, respectively. Specifically, first, 300 nm of ITO was formed in the whole surface on a contact layer by the vacuum vapor deposition method. Subsequently, the epitaxial growth substrate 2 after the deposition of ITO was subjected to a heat treatment for 5 minutes at 700 ° C. under an N ₂ atmosphere.

Next, a mask using a photoresist was formed in a region where the original electrode 43, the ring electrode 41, and the outer circumferential electrode 45 are to be formed. Subsequently, ITO was removed except for the region covered with the mask by etching with the ITO etching solution. This obtained the board | substrate 4 with an electrode.

In addition, the inner edges of the original electrode 43, the ring electrode 41, and the outer circumferential electrode 45 are provided in a concentric shape, the diameter of the original electrode 43 is 200 μm, and from the outer edge of the original electrode 43. The distance to the inner edge of the ring electrode 41 is 5 μm. In addition, the distance from the outer edge of the ring electrode 41 to the inner edge of the outer circumferential electrode 45 is 20 탆.

(Voltage application process to the substrate 4 with electrodes)

Fig. 6 shows IV curves when a voltage of 0 to 10 V is applied between the raw electrode and the outer electrode.

First, the original electrode 43 is set to the negative side, and the outer electrode 45 is set to the plus side, and the voltage value is sequentially increased from 0 V to about 10 V, between the original electrode 43 and the outer electrode 45. Voltage was applied. When the voltage applied between the source electrode 43 and the outer electrode 45 was 4.0 (V), the current flowing between the source electrode 43 and the outer electrode 45 was about 2.0E-4 (A). When the voltage applied between the source electrode 43 and the outer electrode 45 is gradually increased from 4.0 (V), the current flowing between the source electrode 43 and the outer electrode 45 is also gradually increased in accordance with the increase of the voltage. Increased.

Fig. 7 shows IV curves when a voltage of 0 to 80 V is applied between the raw electrode and the outer electrode.

6, the original electrode 43 is set to the negative side, the outer electrode 45 is set to the positive side, and the voltage value is sequentially increased from 0 V to about 80 V, so that the original electrode 43 and the outer electrode 45 Voltage was applied between Until the applied voltage was about 50 V, the current flowing between the original electrode 43 and the outer electrode 45 was about 1.0E-3 (A) or less. Then, the current rapidly increased from about 60 V or more to about 80 (V) between the source electrode 43 and the outer circumferential electrode 45. Since a voltage of about 80 (V) is applied between the original electrode 43 and the outer circumferential electrode 45, the p-type GaN layer 24 and the n-type GaN layer 20 below the original electrode 43 are applied. This is because the pn junction therebetween is broken so that the partial conduction portion 26 is formed.

Fig. 8 shows the IV curve after breaking the semiconductor junction below the original electrode.

Next, a voltage of about 80 (V) is applied between the original electrode 43 and the outer electrode 45, and then a voltage (forward voltage) is applied again between the original electrode 43 and the outer electrode 45. IV characteristics were measured. Before breaking the pn junction between the p-type GaN layer 24 and the n-type GaN layer 20 below the original electrode 43, the source electrode 43 and the outer electrode 45 at an applied voltage of 1.0V. The current flowing in between was about 0.5E-4 (A) (Fig. 6). On the other hand, after breaking the pn junction, as shown in Fig. 8, when the applied voltage was 1.0 V, the current flowing between the original electrode 43 and the outer circumferential electrode 45 was about 1.2E-2 (A). In addition, if the substrate 4 with an electrode including the original electrode 43 and the outer circumferential electrode 45 has a size equivalent to that of a light emitting element having a normal size (for example, a size of about 350 µm square), the original electrode ( Although the rectification property is shown between 43 and the outer electrode 45, the rectifying property is not shown in FIG. 8 because the area of the outer electrode is very large.

(Characteristic evaluation after voltage application process)

Fig. 9 shows IV curves when voltage is applied between the original electrode and the ring electrode after forming the partial conduction portion.

After the partial conduction portion 26 is formed below the original electrode 43, the original electrode 43 is set to the negative side, and the ring electrode 41 is set to the plus side, whereby the original electrode 43 and the ring electrode are set. A voltage was applied in the range of 0.0 (V) to 5.0 (V) between (41). In this case, the commutation characteristic was observed between the original electrode 43 and the ring electrode 41. Further, when a voltage of about 2.8 V or more was applied between the nuclear electrode 43 and the ring electrode 41, blue light emission with a peak wavelength of 460 nm was observed. Moreover, the drive voltage in 20 (kV) of the board | substrate with an electrode 4 was about 3.9 (V).

Fig. 10 shows IV curves when voltage is applied between the original electrode and the ring electrode after forming the partial conduction portion.

10, it turned out that the board | substrate with electrode 4 which concerns on a present Example has obtained the characteristic similar to the IV curve peculiar to LED which has a pn junction. That is, after forming the partial conduction part 26 below the original electrode 43, the original electrode 43 is set to the negative side, the ring electrode 41 is set to the plus side, and the original electrode 43 and When a forward voltage was applied between the ring electrodes 41, the current increased with the increase of the voltage above about 2.8 (V). On the other hand, when a reverse voltage was applied between the original electrode 43 and the ring electrode 41, almost no current flowed to at least -4.0 (V). Thereby, it turns out that the partial conduction part 26 was formed only about at least one part below the original electrode 43. FIG.

The above description is for the case where the partial conduction portion 26 is formed by applying a voltage between the original electrode 43 and the outer circumferential electrode 45, but a voltage is applied between the original electrode 43 and the ring electrode 41. It is also possible to form the partial conduction part 26 by applying. The case where the partial conductive portion 26 is formed by applying a voltage between the original electrode 43 and the ring electrode 41 is described below.

(Voltage application process to the substrate 4 with electrodes)

Fig. 11 shows an IV curve when a voltage of -10 V to 10 V is applied between the raw electrode and the ring electrode.

First, the original electrode 43 is set to the negative side, and the ring electrode 41 is set to the plus side, and the voltage value is sequentially increased from -10 V to about 10 V, so that the original electrode 43 and the ring electrode 41 are in between. Voltage was applied. Under this voltage application condition, the pn junction between the p-type GaN layer 24 and the n-type GaN layer 20 below the original electrode 43 is not broken, and the original electrode 43 and the ring electrode 41 are not broken. It was confirmed that almost no current flowed through the circuit.

Fig. 12 shows IV curves when a voltage of 0 to 47 V is applied between the source electrode and the ring electrode.

Similarly to Fig. 11, the original electrode 43 is set to the negative side, the ring electrode 41 is set to the positive side, and the voltage value is sequentially increased from 0 V to about 47 V so that the original electrode 43 and the ring electrode 41 are increased. Voltage was applied between Until the applied voltage was about 40 V, the current flowing between the original electrode 43 and the ring electrode 41 was about 2.00E-3 (A) or less. Then, the current rapidly increased from about 40 V or more to about 47 (V) between the source electrode 43 and the ring electrode 41. This is because a voltage of about 47 (V) is applied between the original electrode 43 and the ring electrode 41, and thus, between the p-type GaN layer 24 and the n-type GaN layer 20 below the original electrode 43. This is because the pn junction of is broken so that the partial conducting portion 26 is formed.

Fig. 13 shows the IV curve after breaking the semiconductor junction below the original electrode.

Next, between the original electrode 43 and the ring electrode 41, the voltage value is sequentially increased from -10 V to about 10 V as before the breakdown, and a voltage is applied between the original electrode 43 and the ring electrode 41. It was. Under voltage application conditions after breaking the pn junction, it was confirmed that a current flows between the original electrode 43 and the ring electrode 41 at an applied voltage of +2.7 V, and the current value increases as the applied voltage increases. The current flowing between the raw electrode 43 and the ring electrode 41 at an applied voltage of 10 V was about 7.50E-3 (A).

As mentioned above, although embodiment and Example of this invention were described, embodiment and Example mentioned above do not limit invention regarding a claim. In addition, it should be noted that not all combinations of the features described in the embodiments and examples are essential to the means for solving the problems of the invention.

1 is a conceptual perspective view of a light emitting device according to a first embodiment.

Fig. 2 is a longitudinal sectional view of the light emitting device according to the first embodiment.

3 is a diagram showing a manufacturing process of a light emitting device according to the first embodiment;

4 is a top view of a part of the substrate with electrodes according to the second embodiment.

5 is an enlarged perspective view of a part of the substrate with an electrode according to the embodiment;

Fig. 6 is an IV curve when a voltage of 0 to 10 V is applied between the raw electrode and the outer circumferential electrode according to the embodiment.

7 is an IV curve when a voltage of 0 to 80 V is applied between the raw electrode and the outer circumferential electrode according to the embodiment.

8 is an IV curve after breaking a semiconductor junction below the raw electrode according to the embodiment;

Fig. 9 is an IV curve when voltage is applied between the original electrode and the ring electrode after forming the partial conducting portion according to the embodiment.

Fig. 10 is an IV curve when voltage is applied between the original electrode and the ring electrode after forming the partial conduction portion according to the embodiment.

Fig. 11 is an IV curve when a voltage of -10 to 10 V is applied between the raw electrode and the ring electrode according to the embodiment.

Fig. 12 is an IV curve when a voltage of 0 to 47 V is applied between the raw electrode and the ring electrode according to the embodiment.

Fig. 13 is an IV curve after breaking a semiconductor junction below the raw electrode according to the embodiment.

<Explanation of symbols for the main parts of the drawings>

DESCRIPTION OF REFERENCE NUMERALS 1 light emitting device, 2 epitaxial growth substrate, 3, 4 substrate with electrode, 10 sapphire substrate, 20 n-type GaN layer, 22 light emitting layer, 24 p-type GaN layer, 25 p-type GaN surface 26: partial conduction portion, 40: p-type electrode, 41: ring electrode, 42: n-type electrode, 43: circular electrode, 44, 45: outer electrode, 46: electrode, 48: unit electrode, 50, 52: probe , 300: outer edge of substrate, 400: outer edge of outer electrode, 402: inner edge of outer electrode

Claims (12)

Light emission which has a 1st conductivity type 1st semiconductor layer and a 2nd conductivity type 2nd semiconductor layer different from the said 1st conductivity type, and emits light by applying a forward voltage to the said 1st semiconductor layer and the said 2nd semiconductor layer. Method of manufacturing the device, An electrode forming step of forming a first electrode and a second electrode spaced apart from the first electrode on the first semiconductor layer; And a voltage application step of applying a voltage between the first electrode and the second electrode formed in the electrode formation step to electrically connect the second electrode and the second semiconductor layer in both directions. , The first conductivity type is p-type, the second conductivity type is n-type, The first electrode is a p-type electrode, the second electrode is an n-type electrode, In the voltage application step, a forward voltage is applied between the first electrode and the second electrode to generate a reverse voltage at a part of a pn junction between the first semiconductor layer and the second semiconductor layer, thereby forming a pn junction. And a partial conduction portion which electrically conducts the second electrode and the second semiconductor layer in both directions by destroying a portion of the light emitting device. delete The method of manufacturing a light emitting device according to claim 1, wherein the electrode forming step includes forming the first electrode and the second electrode so that the area of the second electrode is smaller than that of the first electrode. The method of claim 1, wherein the forming of the electrode simultaneously forms the first electrode and the second electrode. The method of claim 1, wherein the electrode forming step forms the first electrode and the second electrode with the same material. A first conductivity type first semiconductor layer, A second conductive second semiconductor layer provided on the first semiconductor layer and different from the first conductive type; A first electrode provided on the first semiconductor layer; A second electrode provided separately from the first electrode on the first semiconductor layer; A partial conducting portion formed below the second electrode and electrically conducting the second electrode and the second semiconductor layer in both directions; The first conductivity type is p-type, the second conductivity type is n-type, The first electrode is a p-type electrode, the second electrode is an n-type electrode, And the partial conductive portion is formed by applying a predetermined forward voltage between the first electrode and the second electrode to generate a reverse voltage at a portion of the pn junction. delete The light emitting device according to claim 6, wherein an area of the second electrode is smaller than that of the first electrode. The light emitting device according to claim 6, wherein the material forming the first electrode and the material forming the second electrode are the same. The method of claim 3, wherein the forming of the electrode simultaneously forms the first electrode and the second electrode. The method of claim 3, wherein the electrode forming step forms the first electrode and the second electrode with the same material. The light emitting device of claim 8, wherein a material forming the first electrode and a material forming the second electrode are the same.

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