TWI423468B - Light emitting device and method for manufacturing the same - Google Patents

Light emitting device and method for manufacturing the same Download PDF

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TWI423468B
TWI423468B TW97119673A TW97119673A TWI423468B TW I423468 B TWI423468 B TW I423468B TW 97119673 A TW97119673 A TW 97119673A TW 97119673 A TW97119673 A TW 97119673A TW I423468 B TWI423468 B TW I423468B
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TW200915617A (en
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Miki Moriyama
Koichi Goshonoo
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Toyoda Gosei Kk
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發光裝置之製造方法及發光裝置Light-emitting device manufacturing method and light-emitting device

本發明係關於包含部分導通部的發光裝置之製造方法及發光裝置。The present invention relates to a method of manufacturing a light-emitting device including a partial conductive portion and a light-emitting device.

在以往,氮化物系化合物半導體所形成的發光二極體(LED,Light Emitting Diode)之製造方法而言,如下的方法廣為人知:藉由在藍寶石基板上,將n型GaN層、發光層、p型GaN層依序成長,以形成化合物半導體層。然後,從p型GaN層到一部分n型GaN層加以蝕刻,而使n型GaN層露出,並在p型GaN層上形成p型用電極;另一方面,在露出之n型GaN層上與p型用電極個別地形成n型用電極。In the conventional method for producing a light-emitting diode (LED) formed of a nitride-based compound semiconductor, the following method is widely known: an n-type GaN layer, a light-emitting layer, and p are formed on a sapphire substrate. The GaN layer is sequentially grown to form a compound semiconductor layer. Then, etching is performed from the p-type GaN layer to a part of the n-type GaN layer to expose the n-type GaN layer, and a p-type electrode is formed on the p-type GaN layer; on the other hand, on the exposed n-type GaN layer The p-type electrode individually forms an n-type electrode.

又,專利文獻1記載的發光元件中,有如下所構成者:在藍寶石基板上將緩衝層、n層、半絕緣性層(I層)依序形成後,藉由在I層的表面形成n側電極並施予熱處理,以在n側電極的正下方形成低電阻區域,其後形成I側電極而構成。Further, in the light-emitting element described in Patent Document 1, the buffer layer, the n-layer, and the semi-insulating layer (I layer) are sequentially formed on the sapphire substrate, and then n is formed on the surface of the I layer. The side electrode is subjected to heat treatment to form a low-resistance region directly under the n-side electrode, and thereafter to form an I-side electrode.

依專利文獻1記載之發光元件,由於在n側電極正下方的I層區域可形成低電阻區域,因此無須製造接觸孔洞而能使電流於I側電極與n側電極之間流通。According to the light-emitting element described in Patent Document 1, since the low-resistance region can be formed in the I-layer region directly under the n-side electrode, current can flow between the I-side electrode and the n-side electrode without manufacturing a contact hole.

【專利文獻1】日本特開平4-273175號公報[Patent Document 1] Japanese Patent Laid-Open No. Hei 4-273175

然而,以習知的氮化物系化合物半導體製造LED之製造方法中,形成n型用電極時,需要採用光微影技術及蝕刻技術而去除化合物半導體的步驟。而且,由於p型用電極與p型GaN層;n型用電極與n型GaN層接觸,而就電極與半導體間必須為歐姆接觸的觀點,將p型用電極與n型用電極以相同材料形成係有困難。因此,必須將p型用電極與n型用電極以各別之步驟分別形成。從而,習知的氮化物系化合物半導體之LED製造方法中,將LED的製程單純化係有困難。However, in the method of manufacturing an LED manufactured by a conventional nitride-based compound semiconductor, when an n-type electrode is formed, a step of removing a compound semiconductor by photolithography and etching is required. Further, the p-type electrode and the p-type GaN layer; the n-type electrode is in contact with the n-type GaN layer, and the p-type electrode and the n-type electrode are made of the same material from the viewpoint that the electrode and the semiconductor must be in ohmic contact. There are difficulties in forming the system. Therefore, it is necessary to form the p-type electrode and the n-type electrode separately in separate steps. Therefore, in the conventional method for producing a nitride-based compound semiconductor LED, it is difficult to simplify the process of the LED.

又,專利文獻1記載的發光元件之製造中,於設置n側電極後必須進行熱處理步驟,並且於熱處理步驟後必須形成I側電極。亦即,專利文獻1記載的發光元件中,無法同時形成n側電極與I側電極。因此,專利文獻1記載的發光元件之製造方法中,將發光元件的製程單純化係有困難。Moreover, in the manufacture of the light-emitting element described in Patent Document 1, it is necessary to perform a heat treatment step after providing the n-side electrode, and it is necessary to form an I-side electrode after the heat treatment step. In other words, in the light-emitting element described in Patent Document 1, the n-side electrode and the I-side electrode cannot be simultaneously formed. Therefore, in the method for producing a light-emitting device described in Patent Document 1, it is difficult to simplify the process of the light-emitting device.

因此,本發明係有鑑於上述情況所形成,其目的為:將發光裝置的製程單純化。Accordingly, the present invention has been made in view of the above circumstances, and an object thereof is to simplify the process of a light-emitting device.

為達成上述目的,本發明提供一種發光裝置之製造方法,具有第1導電型之第1半導體層、及不同於第1導電型的第2導電型之第2半導體層;並藉由將順向電壓施加到第1半導體層與第2半導體層以進行發光。其包含:電極形成步驟,在第1半導體層上,形成第1電極、及與第1電極隔開的第2電極;電壓施加步驟,將電壓施加到於電極形成步驟各別形成的第1電極與第2電極之間,而使第2電極與第2半導體層形成可電性雙向導通的狀態。In order to achieve the above object, the present invention provides a method of manufacturing a light-emitting device, comprising: a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type different from the first conductivity type; A voltage is applied to the first semiconductor layer and the second semiconductor layer to emit light. The method includes an electrode forming step of forming a first electrode and a second electrode spaced apart from the first electrode on the first semiconductor layer, and a voltage application step of applying a voltage to the first electrode formed in each of the electrode forming steps Between the second electrode and the second electrode, the second electrode and the second semiconductor layer are electrically double-conductive.

又,上述發光裝置之製造方法中,第1導電型為p型,該第2導電型為n型;電壓施加步驟將電壓施加到第1電極與第2電極之間,藉由破壞第1半導體層與第2半導體層之間的一部分pn接合,以使第2電極與第2半導體層形成可電性雙向導通的狀態。Further, in the method of manufacturing a light-emitting device, the first conductivity type is a p-type, the second conductivity type is an n-type, and the voltage application step applies a voltage between the first electrode and the second electrode to break the first semiconductor. A part of the layer and the second semiconductor layer are pn-bonded so that the second electrode and the second semiconductor layer are electrically double-conductive.

又,於上述發光裝置之製造方法,電極形成步驟中,可於第2電極之面積應該小於第1電極之面積的狀態下,而形成第1電極與第2電極。並且,電極形成步驟可同時形成第1電極與第2電極。另外,於上述發光裝置之製造方法,電極形成步驟可採相同材料形成第1電極與第2電極。Further, in the method of manufacturing the light-emitting device described above, in the electrode forming step, the first electrode and the second electrode may be formed in a state where the area of the second electrode is smaller than the area of the first electrode. Further, the electrode forming step can simultaneously form the first electrode and the second electrode. Further, in the method of manufacturing the light-emitting device described above, the electrode forming step may form the first electrode and the second electrode from the same material.

又,為達成上述目的,本發明提供一種發光裝置,包含:第1導電型之第1半導體層;第1半導體層設置在其上,且不同於第1導電型的第2導電型之第2半導體層;設置在第1半導體層上的第1電極;在第1半導體層上與第1電極個別地設置的第2電極;形成在第2電極的下方,且使第2電極與第2半導體層電性雙向導通的部分導通部。In order to achieve the above object, the present invention provides a light-emitting device comprising: a first semiconductor layer of a first conductivity type; a first semiconductor layer provided thereon, and a second conductivity type different from the first conductivity type a semiconductor layer; a first electrode provided on the first semiconductor layer; a second electrode provided separately from the first electrode on the first semiconductor layer; formed under the second electrode, and the second electrode and the second semiconductor Partial conduction of the layered electrical double-conducting.

又,上述發光裝置中,部分導通部係可藉由將既定之電壓施加到第1電極與第2電極間所形成。又,上述發光裝置中,第2電極之面積可小於第1電極之面積。而且,上述發光裝置中,形成第1電極之材料與形成第2電極之材料二者可相同。Further, in the above-described light-emitting device, a part of the conduction portion can be formed by applying a predetermined voltage between the first electrode and the second electrode. Further, in the above-described light-emitting device, the area of the second electrode may be smaller than the area of the first electrode. Further, in the above-described light-emitting device, the material for forming the first electrode and the material for forming the second electrode may be the same.

依本發明,可將發光裝置的製程單純化。According to the invention, the process of the illuminating device can be simplistic.

實施發明之最佳形態Best form for implementing the invention [第1實施形態][First Embodiment]

圖1顯示依本發明之第1實施形態的發光裝置之示意立體圖。又,圖2顯示依本發明之第1實施形態的發光裝置之示意縱剖面圖。Fig. 1 is a schematic perspective view showing a light-emitting device according to a first embodiment of the present invention. Fig. 2 is a schematic longitudinal cross-sectional view showing a light-emitting device according to a first embodiment of the present invention.

(發光裝置1的結構)(Structure of Light Emitting Device 1)

如圖1所示,依第1實施形態的發光裝置1包含半導體堆疊構造,此構造具備:藍寶石基板10,具有(0001)面;n型GaN層20,設於藍寶石基板10上的第2導電型之第2半導體層;發光層22,設於n型GaN層20上;p型GaN層24,設於發光層22上而與第2導電型不同的第1導電型之第1半導體層。As shown in FIG. 1, the light-emitting device 1 according to the first embodiment includes a semiconductor stacked structure including a sapphire substrate 10 having a (0001) plane, an n-type GaN layer 20, and a second conductive layer provided on the sapphire substrate 10. The second semiconductor layer of the type; the light-emitting layer 22 is provided on the n-type GaN layer 20; and the p-type GaN layer 24 is provided on the light-emitting layer 22, and the first semiconductor layer of the first conductivity type different from the second conductivity type.

又,發光裝置1包含:P型用電極40,設於p型GaN層24上之既定區域的第1電極;n型用電極42,於p型GaN層24上,與P型用電極40隔開而設置的第2電極。而且,發光裝置1如圖2所示,貫通n型用電極42下方的p型GaN層24及發光層22二者,並到達n型GaN層20之部分區域為止的既定區域中,包含將n型用電極42與n型GaN層20可電性雙向導通的部分導通部26。Further, the light-emitting device 1 includes a P-type electrode 40, a first electrode provided in a predetermined region on the p-type GaN layer 24, and an n-type electrode 42 separated from the P-type electrode 40 on the p-type GaN layer 24. The second electrode is provided to be opened. Further, as shown in FIG. 2, the light-emitting device 1 penetrates both the p-type GaN layer 24 and the light-emitting layer 22 under the n-type electrode 42 and reaches a predetermined region up to a partial region of the n-type GaN layer 20, and includes n. The type electrode 42 and the n-type GaN layer 20 are electrically connectable to each other.

在此,n型GaN層20、發光層22、p型GaN層24係各別例如以有機金屬化學氣相沉積法(MOCVD,Metal Organic Chemical Vapor Deposition)形成之III族氮化物化合物半導體所構成的層。Here, the n-type GaN layer 20, the light-emitting layer 22, and the p-type GaN layer 24 are each composed of, for example, a group III nitride compound semiconductor formed by a metal organic chemical vapor deposition (MOCVD). Floor.

例如,n型GaN層20由摻雜有既定量之Si作為n型摻雜物的n-GaN所形成。又,發光層22具有由Inx Ga1 -x N/GaN所形成的量子井構造。而且,p型GaN層24由摻雜有既定量之Mg作為p型摻雜物的p-GaN所形成。For example, the n-type GaN layer 20 is formed of n-GaN doped with a predetermined amount of Si as an n-type dopant. Further, the light-emitting layer 22 has a quantum well structure formed of In x Ga 1 - x N/GaN. Further, the p-type GaN layer 24 is formed of p-GaN doped with a predetermined amount of Mg as a p-type dopant.

又,依本實施形態的設於p型GaN層24上之n型用電極42,設置在與p型用電極40隔開的位置,亦即電性相互切割而設置。例如,在包含俯視觀之具有略四角形的發光裝置1之p型GaN層24頂面的一角附近之既定區域,設置n型用電極42。另外,p型用電極40與n型用電極42隔開,亦即與n型用電極42個別地設置於p型GaN層24頂面的至少包含一角之對角的既定區域。Further, the n-type electrode 42 provided on the p-type GaN layer 24 according to the present embodiment is provided at a position spaced apart from the p-type electrode 40, that is, electrically cut from each other. For example, the n-type electrode 42 is provided in a predetermined region in the vicinity of a corner including the top surface of the p-type GaN layer 24 of the light-emitting device 1 having a slightly square shape in plan view. Further, the p-type electrode 40 is spaced apart from the n-type electrode 42, that is, the n-type electrode 42 is provided separately from the n-type electrode 42 at a predetermined area including at least one corner of the top surface of the p-type GaN layer 24.

在此,p型用電極40與n型用電極42各別由相同材料形成。例如,p型用電極40與n型用電極42各別由氧化銦錫(ITO,Indium Tin Oxide)形成。而且,本實施形態中之n型用電極42,n型用電極42的面積比p型用電極40的面積小而形成。Here, the p-type electrode 40 and the n-type electrode 42 are each formed of the same material. For example, each of the p-type electrode 40 and the n-type electrode 42 is formed of indium tin oxide (ITO). Further, in the n-type electrode 42 of the present embodiment, the area of the n-type electrode 42 is smaller than the area of the p-type electrode 40.

部分導通部26形成於n型用電極42的下方,係使n型用電極42與n型GaN層20電性雙向導通的區域。由於部分導通部26的存在,p型GaN層24與n型GaN層20之間形成電性雙向導通。具體而言,部分導通部26係將n型用電極42下方的至少一部分p型GaN層24及發光層22二者到一部分n型GaN層20為止,加以電性導通的區域。亦即,部分導通部26中,p型GaN層24及n型GaN層20之間不產生整流特性。The partial conductive portion 26 is formed below the n-type electrode 42 and is a region in which the n-type electrode 42 and the n-type GaN layer 20 are electrically bidirectional. Due to the presence of a portion of the via portion 26, an electrical bidirectional conduction is formed between the p-type GaN layer 24 and the n-type GaN layer 20. Specifically, the partial conductive portion 26 is a region in which at least a part of the p-type GaN layer 24 and the light-emitting layer 22 under the n-type electrode 42 are electrically connected to a part of the n-type GaN layer 20 . That is, in the partial conduction portion 26, no rectifying property is generated between the p-type GaN layer 24 and the n-type GaN layer 20.

例如,部分導通部26將p型GaN層24及n型GaN層20二者pn接合時的破壞該pn接合之電壓予以施加到p型用電極40及n型用電極42間;係包含n型用電極42正下方,而藉由破壞n型用電極42下方的p型GaN層24及n型GaN層20間之一部分pn接合所形成,將n型用電極42與n型GaN層20可電性雙向導通的區域。For example, the partial conduction portion 26 applies a voltage for destroying the pn junction when the p-type GaN layer 24 and the n-type GaN layer 20 are pn-bonded to each other between the p-type electrode 40 and the n-type electrode 42; The n-type electrode 42 and the n-type GaN layer 20 are electrically formed by directly under the electrode 42 and by constituting a partial pn junction between the p-type GaN layer 24 and the n-type GaN layer 20 under the n-type electrode 42. Sexually-directed area.

又,形成n型GaN層20前,在藍寶石基板10上可採MOCVD形成AlN或GaN構成的緩衝層。又,發光層22的量子井構造可形成單一量子井構造或多重量子井構造任一種;或者也可採用不具量子井構造的發光層。進而,在p型GaN層24上,也能採用高於對p型GaN層24之Mg摻雜量的摻雜濃度,而以MOCVD形成摻雜有Mg的p型接觸層(p+型GaN層)。Further, before the formation of the n-type GaN layer 20, a buffer layer made of AlN or GaN may be formed on the sapphire substrate 10 by MOCVD. Further, the quantum well structure of the light-emitting layer 22 may form either a single quantum well structure or a multiple quantum well structure; or a light-emitting layer having no quantum well structure may be employed. Further, on the p-type GaN layer 24, a doping concentration higher than the Mg doping amount of the p-type GaN layer 24 can be used, and a Mg-doped p-type contact layer (p+-type GaN layer) can be formed by MOCVD. .

又,設置於藍寶石基板10上的緩衝層、n型GaN層20、發光層22、p型GaN層24、p型接觸層可為採用分子束磊晶法(MBE,Molecular Beam Epitaxy)或氫化物氣相磊晶法(HVPE,Halide Vapor Phase Epitaxy)等所形成的化合物半導體層。Further, the buffer layer, the n-type GaN layer 20, the light-emitting layer 22, the p-type GaN layer 24, and the p-type contact layer provided on the sapphire substrate 10 may be a molecular beam epitaxy (MBE, Molecular Beam Epitaxy) or a hydride. A compound semiconductor layer formed by a vapor phase epitaxy method (HVPE, Halide Vapor Phase Epitaxy) or the like.

又,p型用電極40與n型用電極42也可由氧化鋅(ZnO)形成。或者,p型用電極40與n型用電極42也可採用主要由Ag、Al、Ni、Au、Pd或Cr等構成之金屬材料所形成。而且,可在p型用電極40上的部分區域形成接墊電極(pad electrode)。同樣地,也可在n型用電極42上的既定區域形成接墊電極。此時,形成設於p型用電極40上之接墊電極與設於n型用電極42上之接墊電極二者的材料,可由相同材料形成。例如,接墊電極可主要由Ti、Ni及Au等金屬材料形成。Further, the p-type electrode 40 and the n-type electrode 42 may be formed of zinc oxide (ZnO). Alternatively, the p-type electrode 40 and the n-type electrode 42 may be formed of a metal material mainly composed of Ag, Al, Ni, Au, Pd, Cr, or the like. Further, a pad electrode can be formed in a partial region on the p-type electrode 40. Similarly, the pad electrode may be formed in a predetermined region on the n-type electrode 42. At this time, a material for forming both the pad electrode provided on the p-type electrode 40 and the pad electrode provided on the n-type electrode 42 may be formed of the same material. For example, the pad electrode may be mainly formed of a metal material such as Ti, Ni, or Au.

由以上之結構所構成的本實施形態之發光裝置1,為發出藍色區域之波長之光的LED。例如,發光裝置1為面向上型的藍色LED,發出順電壓3.5(V)、順電流20mA時之峰值波長為470nm的光。至於發光裝置1的平面尺寸,縱尺寸及橫尺寸各別略為350μm。The light-emitting device 1 of the present embodiment constituted by the above configuration is an LED that emits light of a wavelength of a blue region. For example, the light-emitting device 1 is a blue LED that faces upward, and emits light having a peak wavelength of 470 nm when the forward voltage is 3.5 (V) and the forward current is 20 mA. As for the planar size of the light-emitting device 1, the vertical dimension and the lateral dimension are each slightly 350 μm.

又,發光裝置1也可為在紫外線區域、近紫外線區域或綠色區域發出具有峰值波長之光的LED;但LED所發出光的峰值波長之區域並不限於該等區域之波長。又,其他變形例中,發光裝置1的平面尺寸不限於此。例如,也可設計成縱尺寸及橫尺寸各別略為1mm。Further, the light-emitting device 1 may be an LED that emits light having a peak wavelength in an ultraviolet region, a near-ultraviolet region, or a green region; however, the region of the peak wavelength of light emitted from the LED is not limited to the wavelength of the regions. Further, in other modifications, the planar size of the light-emitting device 1 is not limited to this. For example, it can also be designed such that the vertical dimension and the lateral dimension are each slightly 1 mm.

(發光裝置1的製造方法)(Method of Manufacturing Light Emitting Device 1)

圖3(a)顯示磊晶成長基板的縱剖面圖。又,圖3(b)顯示在磊晶成長基板上形成電極後的縱剖面圖。另外,圖3(c)顯示形成p型用電極與n型用電極後的縱剖面圖。進而,圖3(d)顯示形成部分導通部後的縱剖面圖。Fig. 3(a) is a longitudinal sectional view showing an epitaxial growth substrate. 3(b) is a longitudinal cross-sectional view showing an electrode formed on an epitaxial growth substrate. 3(c) is a longitudinal cross-sectional view showing the formation of the p-type electrode and the n-type electrode. Further, Fig. 3(d) is a longitudinal cross-sectional view showing a part of the conduction portion.

首先,藉由在藍寶石基板10之表面,以MOCVD使III族氮化物化合物半導體進行磊晶成長,形成磊晶成長基板2。亦即,在藍寶石基板10上,將n型GaN層20、發光層22、p型GaN層24依序進行磊晶成長,而形成磊晶成長基板2(圖3(a))。First, the group III nitride compound semiconductor is epitaxially grown by MOCVD on the surface of the sapphire substrate 10 to form the epitaxial growth substrate 2. In other words, on the sapphire substrate 10, the n-type GaN layer 20, the light-emitting layer 22, and the p-type GaN layer 24 are sequentially epitaxially grown to form an epitaxial growth substrate 2 (Fig. 3(a)).

其次,在p型GaN層24上以真空蒸鍍法形成電極46,並以電極46覆蓋p型GaN層24(圖3(b))。本實施形態中,使用透明電極之氧化銦錫作為電極46。又,也可使用濺鍍法,從Ag、Al、Ni、Au、Pd或Cr等金屬材料形成電極46。Next, the electrode 46 is formed by vacuum deposition on the p-type GaN layer 24, and the p-type GaN layer 24 is covered with the electrode 46 (Fig. 3(b)). In the present embodiment, indium tin oxide of a transparent electrode is used as the electrode 46. Further, the electrode 46 may be formed of a metal material such as Ag, Al, Ni, Au, Pd or Cr by a sputtering method.

然後,使用光微影技術,在電極46上之既定區域形成光阻所形成的遮罩。在此,形成遮罩,以使n型用電極42之面積成為比p型用電極40之面積小。接著,使用蝕刻技術,藉由將遮罩所覆蓋區域以外的電極46去除,以形成p型用電極40與n型用電極42。因此,p型用電極40與n型用電極42二者由相同材料同時形成。藉此,形成在磊晶成長基板2上設有p型用電極40與n型用電極42的附設電極之基板3(圖3(c))。Then, using a photolithography technique, a mask formed by the photoresist is formed on a predetermined area on the electrode 46. Here, a mask is formed so that the area of the n-type electrode 42 is smaller than the area of the p-type electrode 40. Next, using the etching technique, the electrode 46 other than the region covered by the mask is removed to form the p-type electrode 40 and the n-type electrode 42. Therefore, both the p-type electrode 40 and the n-type electrode 42 are simultaneously formed of the same material. Thereby, the substrate 3 on which the electrodes of the p-type electrode 40 and the n-type electrode 42 are provided is provided on the epitaxial growth substrate 2 (FIG. 3(c)).

又,形成圖3(b)所示之電極46前,使用光微影技術以設置既定之遮罩圖案;由形成的遮罩圖案上形成電極46後,可採剝落法形成p型用電極40與n型用電極42。Further, before the electrode 46 shown in FIG. 3(b) is formed, a predetermined mask pattern is provided by using a photolithography technique; after the electrode 46 is formed on the formed mask pattern, the p-type electrode 40 can be formed by peeling off. And the n-type electrode 42.

接著,以施加既定之電壓到p型用電極40與n型用電極42間為目的,使電壓施加用之探針50接觸到p型用電極40,並使電壓施加用之探針52接觸到n型用電極42。然後,經由探針50與探針52,施加既定之電壓到p型用電極40與n型用電極42間。又,探針50與探針52例如由鎢等金屬或電性導電材料所形成。Next, for the purpose of applying a predetermined voltage between the p-type electrode 40 and the n-type electrode 42, the probe 50 for voltage application is brought into contact with the p-type electrode 40, and the probe 52 for voltage application is brought into contact with The n-type electrode 42. Then, a predetermined voltage is applied between the p-type electrode 40 and the n-type electrode 42 via the probe 50 and the probe 52. Further, the probe 50 and the probe 52 are formed of, for example, a metal such as tungsten or an electrically conductive material.

也就是說,首先將p型用電極40設定在正側,並將n型用電極42設定在負側。然後,施加過大的電壓到p型用電極40與n型用電極42之間,使n型用電極42與n型GaN層20二者形成可電性雙向導通的狀態。亦即,藉由施加過大的電壓到p型用電極40與n型用電極42之間,使n型用電極42下方的p型GaN層24與n型GaN層20間之至少一部分電性雙向導通。That is, first, the p-type electrode 40 is set to the positive side, and the n-type electrode 42 is set to the negative side. Then, an excessive voltage is applied between the p-type electrode 40 and the n-type electrode 42 to form an electrically conductive bi-directional state between the n-type electrode 42 and the n-type GaN layer 20. That is, at least a portion of the p-type GaN layer 24 under the n-type electrode 42 and the n-type GaN layer 20 are electrically bidirectionally applied between the p-type electrode 40 and the n-type electrode 42 by applying an excessive voltage. Turn on.

具體而言,對於位在n型用電極42下方的p型GaN層24與發光層22二者之半導體接合、以及發光層22與n型GaN層20二者所形成之半導體接合,破壞該兩種接合之一部分,而將p型GaN層24隔著發光層22能充分與n型GaN層20電性雙向導通的逆電壓,施加到p型用電極40與n型用電極42間。Specifically, the semiconductor bonding of both the p-type GaN layer 24 and the light-emitting layer 22 under the n-type electrode 42 and the semiconductor junction formed by the light-emitting layer 22 and the n-type GaN layer 20 destroy the two One of the bonding portions is applied between the p-type electrode 40 and the n-type electrode 42 by interposing the p-type GaN layer 24 with the reverse voltage of the light-emitting layer 22 sufficiently electrically conductive with the n-type GaN layer 20.

藉此,n型用電極42下方的從p型GaN層24到一部分n型GaN層20的區域,亦即從p型GaN層24貫通發光層22而到達一部分n型GaN層20的區域,形成將p型GaN層24與n型GaN層20電性雙向導通的部分導通部26(圖3(d))。藉此形成發光裝置1。Thereby, a region from the p-type GaN layer 24 to a part of the n-type GaN layer 20 under the n-type electrode 42 , that is, a region from the p-type GaN layer 24 that penetrates the light-emitting layer 22 and reaches a part of the n-type GaN layer 20 is formed. A portion of the conductive portion 26 that electrically connects the p-type GaN layer 24 and the n-type GaN layer 20 (Fig. 3(d)). Thereby, the light-emitting device 1 is formed.

至於逆電壓的大小,係破壞p型GaN層24與n型GaN層20間所形成之半導體接合,並將p型GaN層24與n型GaN層20間電性雙向導通之程度的大小。例如,p型GaN層24與n型GaN層20二者形成pn接合時,藉由將破壞該pn接合的電壓施加到p型用電極40與n型用電極42間,而形成部分導通部26。The magnitude of the reverse voltage is such a degree that the semiconductor junction formed between the p-type GaN layer 24 and the n-type GaN layer 20 is broken and the p-type GaN layer 24 and the n-type GaN layer 20 are electrically double-conducted. For example, when the p-type GaN layer 24 and the n-type GaN layer 20 are both pn-bonded, a portion of the conductive portion 26 is formed by applying a voltage that breaks the pn junction to between the p-type electrode 40 and the n-type electrode 42. .

又,在p型GaN層24與n型GaN層20間形成發光層22時,對於破壞p型GaN層24與發光層22間所形成接合、以及發光層22與n型GaN層20間所形成接合之大小的電壓,藉由將該電壓施加到p型用電極40與n型用電極42間,而形成部分導通部26。When the light-emitting layer 22 is formed between the p-type GaN layer 24 and the n-type GaN layer 20, the bonding between the p-type GaN layer 24 and the light-emitting layer 22 is broken, and the light-emitting layer 22 and the n-type GaN layer 20 are formed. The voltage of the size of the junction is applied between the p-type electrode 40 and the n-type electrode 42 to form a partial conduction portion 26.

進而,發光層22具有量子井構造時,對於破壞p型GaN層24與量子井構造間所形成接合、含於量子井構造的複數井層與複數障壁層所形成複數之接合、以及量子井構造與n型GaN層20間所形成接合之大小的電壓,藉由將該電壓施加到p型用電極40與n型用電極42間,而形成部分導通部26。Further, when the light-emitting layer 22 has a quantum well structure, bonding between the p-type GaN layer 24 and the quantum well structure, bonding of a plurality of well layers and a plurality of barrier layers included in the quantum well structure, and quantum well structure are performed. A voltage of a size to be bonded to the n-type GaN layer 20 is applied between the p-type electrode 40 and the n-type electrode 42 to form a partial conductive portion 26.

(發光裝置1的動作)(Operation of Light Emitting Device 1)

首先,將既定之電力供應到p型用電極40與n型用電極42時,電流從n型用電極42通過部分導通部26,並從部分導通部26經由n型GaN層20供應到發光層22。然後,發光層22因應該供應之電流而發出既定波長範圍的光。發光層22所發出之光,傳播通過藍寶石基板10而被放射到發光裝置1的外部。First, when a predetermined electric power is supplied to the p-type electrode 40 and the n-type electrode 42, current flows from the n-type electrode 42 through the partial conduction portion 26, and from the partial conduction portion 26 to the light-emitting layer via the n-type GaN layer 20. twenty two. Then, the light-emitting layer 22 emits light of a predetermined wavelength range due to the current to be supplied. The light emitted from the light-emitting layer 22 propagates through the sapphire substrate 10 and is radiated to the outside of the light-emitting device 1.

又,設置在n型用電極42下方的部分導通部26,使n型用電極42所供應之電流導通,以供應到n型GaN層20。因此,於形成有部分導通部26的區域,由於形成部分導通部26前即已存在該區域的發光層22被破壞而喪失作為發光層22的功能,因此於n型用電極42下方發光層22並不發光。Further, a portion of the conduction portion 26 provided under the n-type electrode 42 is turned on to supply the current supplied from the n-type electrode 42 to the n-type GaN layer 20. Therefore, in the region where the partial conductive portion 26 is formed, since the light-emitting layer 22 in which the region has existed before the partial conductive portion 26 is formed is destroyed and the function as the light-emitting layer 22 is lost, the light-emitting layer 22 is disposed under the n-type electrode 42. Does not shine.

(第1實施形態的效果)(Effects of the first embodiment)

依本實施形態的發光裝置1,於p型GaN層24上將p型用電極40與n型用電極42二者同時形成,並藉由施加既定之電壓到p型用電極40與n型用電極42間,可破壞n型用電極42下方的從p型GaN層24到一部分n型GaN層20的區域所包含之pn接合。藉此,可使得n型用電極42下方的從p型GaN層24到一部分n型GaN層20的區域電性雙向導通。因此,可省略習知的發光裝置之製造方法中則為必需的從p型GaN層24到一部分n型GaN層20進行蝕刻的步驟、以及將p型用電極與n型用電極個別地形成的步驟,可將發光裝置1的製程大幅簡單化。從而,可達到發光裝置1的製造成本之降低與生產量之提高。According to the light-emitting device 1 of the present embodiment, both the p-type electrode 40 and the n-type electrode 42 are simultaneously formed on the p-type GaN layer 24, and a predetermined voltage is applied to the p-type electrode 40 and the n-type. Between the electrodes 42, the pn junction included in the region from the p-type GaN layer 24 to the portion of the n-type GaN layer 20 under the n-type electrode 42 can be broken. Thereby, the region from the p-type GaN layer 24 to a part of the n-type GaN layer 20 under the n-type electrode 42 can be electrically double-conducted. Therefore, the step of etching from the p-type GaN layer 24 to a part of the n-type GaN layer 20 necessary for the manufacturing method of the conventional light-emitting device, and the step of separately forming the p-type electrode and the n-type electrode can be omitted. In the step, the process of the light-emitting device 1 can be greatly simplified. Thereby, the reduction in the manufacturing cost of the light-emitting device 1 and the increase in the throughput can be achieved.

又,本實施形態中,存在p型用電極40下方的p型GaN層24與n型GaN層20二者之接合為順向;另一方面,存在n型用電極42下方的p型GaN層24與n型GaN層20二者之接合為逆向。因此,由於過大之電極作用在n型用電極42下方的接合,n型用電極42下方的接合被破壞。在此,當n型用電極42之面積比p型用電極40之面積小時,相較於n型用電極42之面積與p型用電極40之面積相同的情況,破壞n型用電極42下方之接合所需的電流量變少。因此,本實施形態中,藉由將n型用電極42之面積比p型用電極40之面積縮小,可防止電流量急遽增加而p型用電極40下方之接合被破壞。Further, in the present embodiment, the p-type GaN layer 24 under the p-type electrode 40 and the n-type GaN layer 20 are joined in the forward direction; on the other hand, the p-type GaN layer under the n-type electrode 42 exists. The bonding of both the 24 and n-type GaN layers 20 is reversed. Therefore, the bonding under the n-type electrode 42 is broken due to the engagement of the excessively large electrode under the n-type electrode 42. Here, when the area of the n-type electrode 42 is smaller than the area of the p-type electrode 40, and the area of the n-type electrode 42 is the same as the area of the p-type electrode 40, the n-type electrode 42 is broken. The amount of current required for the engagement is reduced. Therefore, in the present embodiment, by reducing the area of the n-type electrode 42 to the area of the p-type electrode 40, it is possible to prevent the current amount from increasing rapidly and the bonding under the p-type electrode 40 to be broken.

[第2實施形態][Second Embodiment]

圖4係顯示依本發明之第2實施形態的發光裝置之製程進行至一半的部分附設電極之基板的俯視圖。Fig. 4 is a plan view showing a substrate on which a part of the electrode is attached to half of the process of the light-emitting device according to the second embodiment of the present invention.

依本實施形態的附設電極之基板3,除更包含外周電極44,並形成有複數之p型用電極40與複數之n型用電極42以外,由於與圖3(c)所說明的附設電極之基板3約略相同,因此除了與圖3(c)所說明的附設電極之基板3的不同點以外,省略詳細之說明。The substrate 3 to which the electrode is attached according to the present embodiment includes the peripheral electrode 44 and a plurality of p-type electrodes 40 and a plurality of n-type electrodes 42 as shown in FIG. 3(c). Since the substrate 3 is approximately the same, detailed description is omitted except for the difference from the substrate 3 to which the electrode is attached as illustrated in FIG. 3(c).

(附設電極之基板3的結構)(Structure of substrate 3 with electrodes attached)

依本實施形態的附設電極之基板3在p型GaN面25上包含外周電極44,在外周電極44內側則包含以p型用電極40與n型用電極42為一組的複數之單元電極48。複數之單元電極48例如沿靠外周電極44之內緣的外周電極內緣402之形狀,距離既定之間隔而形成。例如,複數之單元電極48在p型GaN面25上形成矩陣狀。The substrate 3 to which the electrode is attached according to the present embodiment includes the outer peripheral electrode 44 on the p-type GaN surface 25, and the unit electrode 48 including the p-type electrode 40 and the n-type electrode 42 as a group inside the outer peripheral electrode 44. . The plurality of unit electrodes 48 are formed, for example, along the shape of the outer peripheral electrode inner edge 402 of the inner edge of the outer peripheral electrode 44 at a predetermined interval. For example, a plurality of unit electrodes 48 are formed in a matrix on the p-type GaN surface 25.

(附設電極之基板3的製造方法)(Method of Manufacturing Substrate 3 with Electrodes)

外周電極44以與單元電極48包含之p型用電極40與n型用電極42相同的材料所形成。亦即,複數之單元電極48與外周電極44係使用光微影技術及真空蒸鍍技術或濺鍍法,而在磊晶成長基板2整面上同時形成(電極形成處理)。The outer peripheral electrode 44 is formed of the same material as the p-type electrode 40 and the n-type electrode 42 included in the unit electrode 48. In other words, the plurality of unit electrodes 48 and the outer peripheral electrodes 44 are simultaneously formed on the entire surface of the epitaxial growth substrate 2 by using an optical lithography technique, a vacuum vapor deposition technique, or a sputtering method (electrode forming treatment).

例如,除了應形成複數之單元電極48與外周電極44的區域以外,將光阻等遮罩形成在磊晶成長基板2上,亦即形成在為p型GaN層24上面的p型GaN面25。然後,在形成遮罩後之p型GaN面25整面,將300nm厚的Ni以濺鍍法成膜。然後,以剝落法形成複數之單元電極48與外周電極44。接著,在形成複數之單元電極48與外周電極44後之磊晶成長基板2,於N2 環境氣氛下以400℃施加5分鐘的熱處理(合金處理)。藉由經過該合金處理,可得到附設電極之基板3。For example, a mask such as a photoresist is formed on the epitaxial growth substrate 2, that is, a p-type GaN surface 25 formed on the p-type GaN layer 24, except for a region where the plurality of unit electrodes 48 and the outer peripheral electrode 44 are to be formed. . Then, on the entire surface of the p-type GaN surface 25 after the mask was formed, 300 nm thick Ni was formed by sputtering. Then, a plurality of unit electrodes 48 and outer peripheral electrodes 44 are formed by a peeling method. Subsequently, a heat treatment was applied for 5 minutes (alloying treatment) at 400 2 deg.] C, in N 2 atmosphere is formed a plurality of unit electrodes 48 and 44 of the outer periphery of the epitaxial growth substrate electrode. The substrate 3 to which the electrode is attached can be obtained by the treatment of the alloy.

又,於其他例中,在磊晶成長基板2的p型GaN面25整面,也可形成ITO。然後,在應形成複數之單元電極48與外周電極44的區域以光阻等形成遮罩。接著,除了遮罩所覆蓋之部分以外,以蝕刻去除ITO。藉此,在磊晶成長基板2上設置複數之單元電極48與外周電極44,也可形成附設電極之基板3。Further, in another example, ITO may be formed on the entire surface of the p-type GaN surface 25 of the epitaxial growth substrate 2. Then, a mask is formed with a photoresist or the like in a region where the plurality of unit electrodes 48 and the peripheral electrodes 44 are to be formed. Next, the ITO is removed by etching in addition to the portion covered by the mask. Thereby, a plurality of unit electrodes 48 and outer peripheral electrodes 44 are provided on the epitaxial growth substrate 2, and the substrate 3 to which the electrodes are attached may be formed.

接著,將外周電極44設定在正側,並將一個單元電極48具有之n型用電極42設定在負側,而將既定之電壓施加到外周電極44與n型用電極42間。例如,本實施形態中,藉由將100(V)左右之電壓施加到外周電極44與n型用電極42間,以破壞存在n型用電極42下方的p型GaN層24與發光層22之半導體接合、以及發光層22與n型GaN層20所形成之半導體接合(電壓施加處理)。此種電壓施加處理施加到複數之各n型用電極42。因此,在複數之各n型用電極42的下方各別形成複數之部分導通部26。Next, the outer peripheral electrode 44 is set on the positive side, and the n-type electrode 42 provided in one unit electrode 48 is set on the negative side, and a predetermined voltage is applied between the outer peripheral electrode 44 and the n-type electrode 42. For example, in the present embodiment, a voltage of about 100 (V) is applied between the outer peripheral electrode 44 and the n-type electrode 42 to break the p-type GaN layer 24 and the light-emitting layer 22 under the n-type electrode 42. The semiconductor bonding and the semiconductor layer formed by the light-emitting layer 22 and the n-type GaN layer 20 (voltage application processing). This voltage application process is applied to a plurality of n-type electrodes 42. Therefore, a plurality of partial conductive portions 26 are formed below each of the plurality of n-type electrodes 42.

然後,進行電壓施加處理後,針對複數之各單元電極48,將p型用電極40設定在正側,並將n型用電極42設定在負側,而於p型用電極40與n型用電極42間通電,將單元電極48下方的附設電極之基板3的電性特性與光學特性各別測定(特性評價處理)。Then, after the voltage application process is performed, the p-type electrode 40 is set on the positive side for each of the plurality of unit electrodes 48, and the n-type electrode 42 is set on the negative side, and the p-type electrode 40 and the n-type are used. The electrodes 42 are energized, and the electrical characteristics and optical characteristics of the substrate 3 with the electrodes below the unit electrodes 48 are measured separately (characteristic evaluation processing).

又,針對複數之單元電極48中的一個,進行電壓施加處理與特性評價處理以後,可將其他單元電極48依序進行電壓施加處理與特性評價處理。或者,也可針對複數之單元電極48的全部進行電壓施加處理,而針對複數之各單元電極48形成部分導通部26後,再針對複數之單元電極48的全部進行特性評價處理。Further, after voltage application processing and characteristic evaluation processing are performed on one of the plurality of unit electrodes 48, the other unit electrodes 48 can be sequentially subjected to voltage application processing and characteristic evaluation processing. Alternatively, the voltage application processing may be performed for all of the plurality of unit electrodes 48, and after the partial conduction portion 26 is formed for each of the plurality of unit electrodes 48, the characteristic evaluation processing may be performed for all of the plurality of unit electrodes 48.

接著,將藍寶石基板10研磨至既定之厚度,例如100μm左右(研磨處理)。然後,於附設電極之基板3上的未設有單元電極48之區域,複數之單元電極48俯視而觀係切割成各自個別地包含於略四角形區域。亦即,切刻成既定之晶片形狀(例如略四角形)與晶片尺寸(例如略350μm角)。接著,藉由切斷,沿靠切刻後的形狀而形成複數之發光裝置1(晶片化處理)。Next, the sapphire substrate 10 is polished to a predetermined thickness, for example, about 100 μm (polishing treatment). Then, in the region of the substrate 3 on which the electrodes are attached, in which the unit electrodes 48 are not provided, the plurality of unit electrodes 48 are cut down in plan view and individually included in the substantially rectangular regions. That is, it is cut into a predetermined wafer shape (for example, a slightly square shape) and a wafer size (for example, an angle of 350 μm). Next, by cutting, a plurality of light-emitting devices 1 are formed along the etched shape (wafer processing).

又,本實施形態中,外周電極44俯視而觀略呈四角形;但外周電極44的形狀並不限於此。外周電極44的形狀也可係俯視而觀沿靠磊晶成長基板2之基板外緣300的形狀,例如也可形成略圓形。另外,為達到從一片磊晶成長基板2可取得的發光裝置1之數量最大化,亦可將複數之單元電極48沿靠略圓形之外周電極44的外周電極內緣而以既定間隔配置。Further, in the present embodiment, the outer peripheral electrode 44 is substantially quadrangular in plan view, but the shape of the outer peripheral electrode 44 is not limited thereto. The shape of the outer peripheral electrode 44 may be formed in a plan view and depending on the shape of the outer edge 300 of the substrate on which the substrate 2 is epitaxially grown, for example, may be formed in a substantially circular shape. Further, in order to maximize the number of the light-emitting devices 1 that can be obtained from one epitaxial growth substrate 2, a plurality of unit electrodes 48 may be disposed at a predetermined interval along the inner peripheral edge of the outer peripheral electrode of the substantially circular outer peripheral electrode 44.

(第2實施形態的效果)(Effect of the second embodiment)

按照依本實施形態的發光裝置1之製造方法,在磊晶成長基板2可將複數之單元電極與外周電極44以同一步驟同時形成。另外,藉由施加既定之電壓到複數之各n型用電極42與外周電極44間,可使得位於複數之各n型用電極42下方的從p型GaN層24到一部分n型GaN層20的區域電性雙向導通。因此,可省略習知的發光裝置之製造方法中則為必需的從p型GaN層24到一部分n型GaN層20進行蝕刻的步驟、以及將p型用電極與n型用電極個別地形成的步驟,可將發光裝置1的製程大幅簡單化。從而,相較於習知的發光裝置之製造方法,可實現生產量的提高、製造時間與製造成本的大幅降低。According to the method of manufacturing the light-emitting device 1 of the present embodiment, the plurality of unit electrodes and the outer peripheral electrode 44 can be simultaneously formed in the epitaxial growth substrate 2 in the same step. Further, by applying a predetermined voltage to the respective n-type electrode 42 and the outer peripheral electrode 44, the p-type GaN layer 24 and the part of the n-type GaN layer 20 under the respective n-type electrodes 42 can be made. Regional electrical double-conducting. Therefore, the step of etching from the p-type GaN layer 24 to a part of the n-type GaN layer 20 necessary for the manufacturing method of the conventional light-emitting device, and the step of separately forming the p-type electrode and the n-type electrode can be omitted. In the step, the process of the light-emitting device 1 can be greatly simplified. Therefore, the production amount can be improved, the manufacturing time and the manufacturing cost can be greatly reduced as compared with the conventional manufacturing method of the light-emitting device.

實施例Example

圖5係顯示依本發明實施例的部分附設電極之基板的放大立體圖。Fig. 5 is an enlarged perspective view showing a substrate to which an electrode is attached according to an embodiment of the present invention.

(附設電極之基板4的構造)(Structure of substrate 4 with electrodes attached)

附設電極之基板4係依序形成下列部分所得到;藍寶石基板10、設於藍寶石基板10上的緩衝層、設於緩衝層上的n型GaN層20、設於n型GaN層20上的發光層22、設於發光層22上的p型GaN層24、設於p型GaN層24上的接觸層、設於接觸層上的電極。The substrate 4 to which the electrodes are attached is obtained by sequentially forming the following portions; the sapphire substrate 10, the buffer layer provided on the sapphire substrate 10, the n-type GaN layer 20 provided on the buffer layer, and the light emitted on the n-type GaN layer 20 The layer 22, the p-type GaN layer 24 provided on the light-emitting layer 22, the contact layer provided on the p-type GaN layer 24, and the electrode provided on the contact layer.

具體而言,在藍寶石基板10上以MOCVD成長複數之化合物半導體層,而得到磊晶成長基板2。即首先,在藍寶石基板10上將作為緩衝層之AlN成長15nm。接著,在緩衝層上將1~4×1018 (cm-3 )範圍下摻雜Si而主要由GaN形成的n型GaN層20成長約3000~4000nm。然後,作為發光層22,在n型GaN層20上將In0.2 Ga0.8 N/GaN(In0.2 Ga0.8 N:3nm、GaN:10~12nm)所構成的量子井成長六對。Specifically, a plurality of compound semiconductor layers are grown by MOCVD on the sapphire substrate 10 to obtain an epitaxial growth substrate 2. That is, first, AlN as a buffer layer was grown to 15 nm on the sapphire substrate 10. Next, an n-type GaN layer 20 mainly doped with GaN is doped with Si in a range of 1 to 4 × 10 18 (cm -3 ) on the buffer layer and grown to about 3000 to 4000 nm. Then, as the light-emitting layer 22, quantum wells composed of In 0.2 Ga 0.8 N/GaN (In 0.2 Ga 0.8 N: 3 nm, GaN: 10 to 12 nm) were grown on the n-type GaN layer 20 by six pairs.

接著,作為p型GaN層24,在發光層22上將摻雜有Mg 1×1020 (cm-3 )而由p-In0.08 Ga0.92 N/p-Al0.3 Ga0.7 N(p-In0.08 Ga0.92 N:1.7nm、p-Al0.3 Ga0.7 N:4nm)所構成的層成長五對後,再將摻雜有Mg 5×1019 (cm-3 )的p-GaN層成長80~100nm。然後,作為接觸層,在p型GaN層24上將摻雜有Mg 1×1020 (cm- 3 )的p+-GaN層成長25nm。藉此,可得到磊晶成長基板2。Next, as the p-type GaN layer 24, Mg 1 × 10 20 (cm -3 ) is doped on the light-emitting layer 22 and p-In 0.08 Ga 0.92 N/p-Al 0.3 Ga 0.7 N (p-In 0.08) After the growth of five layers of Ga 0.92 N: 1.7 nm and p-Al 0.3 Ga 0.7 N: 4 nm), the p-GaN layer doped with Mg 5 × 10 19 (cm -3 ) is grown to 80 to 100 nm. . Then, as a contact layer 24 on the p-type GaN layer doped with Mg 1 × 10 20 (cm - 3) of the p + -GaN layer is grown 25nm. Thereby, the epitaxial growth substrate 2 can be obtained.

其次,在接觸層上,使用光微影技術與蝕刻技術,各別形成圓電極43、環電極41與外周電極45。具體而言,首先在接觸層整面上以真空蒸鍍法形成300nm的ITO。接著,在蒸鍍ITO後之磊晶成長基板2上,於N2 環境氣氛下以700℃施加5分鐘的熱處理。Next, on the contact layer, a circular electrode 43, a ring electrode 41, and an outer peripheral electrode 45 are formed by using a photolithography technique and an etching technique. Specifically, first, 300 nm of ITO was formed by vacuum evaporation on the entire surface of the contact layer. Next, heat treatment was applied to the epitaxial growth substrate 2 after vapor deposition of ITO at 700 ° C for 5 minutes in an N 2 atmosphere.

再來,在應形成圓電極43、環電極41與外周電極45之區域,形成光阻所形成的遮罩。接著,藉由以ITO蝕刻液進行蝕刻,除了被遮罩覆蓋之區域以外則去除ITO。藉此,可得到附設電極之基板4。Further, in a region where the circular electrode 43, the ring electrode 41, and the outer peripheral electrode 45 are to be formed, a mask formed by a photoresist is formed. Next, by etching with an ITO etching solution, ITO was removed except for the area covered by the mask. Thereby, the substrate 4 to which the electrodes are attached can be obtained.

又,圓電極43、環電極41與外周電極45之內緣三者呈同心圓狀設置;圓電極43的直徑為200μm,從圓電極43之外緣到環電極41之內緣的距離為5μm。而且,從環電極41之外緣到外周電極45之內緣的距離為20μm。Further, the circular electrode 43, the ring electrode 41 and the inner periphery of the outer peripheral electrode 45 are concentrically arranged; the diameter of the circular electrode 43 is 200 μm, and the distance from the outer edge of the circular electrode 43 to the inner edge of the ring electrode 41 is 5 μm. . Further, the distance from the outer edge of the ring electrode 41 to the inner edge of the outer peripheral electrode 45 was 20 μm.

(對附設電極之基板4的電壓施加處理)(voltage application processing to the substrate 4 to which the electrode is attached)

圖6顯示施加0至10(V)之電壓到圓電極與外周電極間時的IV曲線。Fig. 6 shows an IV curve when a voltage of 0 to 10 (V) is applied between the circular electrode and the peripheral electrode.

首先,將圓電極43設定在負側,並將外周電極45設定在正側,再使電壓值從0(V)到約10(V)依序增加,將電壓施加到圓電極43與外周電極45之間。施加到圓電極43與外周電極45間的電壓為4.0(V)時,流到圓電極43與外周電極45間的電流約為2.0E~4(A)。另外,當使得施加到圓電極43與外周電極45間的電壓從4.0(V)逐漸增加時,流經圓電極43與外周電極45間的電流也因應電壓之增加而逐漸增加。First, the round electrode 43 is set on the negative side, and the outer peripheral electrode 45 is set on the positive side, and the voltage value is sequentially increased from 0 (V) to about 10 (V), and a voltage is applied to the circular electrode 43 and the peripheral electrode. Between 45. When the voltage applied between the round electrode 43 and the outer peripheral electrode 45 is 4.0 (V), the current flowing between the circular electrode 43 and the outer peripheral electrode 45 is approximately 2.0 E to 4 (A). Further, when the voltage applied between the circular electrode 43 and the peripheral electrode 45 is gradually increased from 4.0 (V), the current flowing between the circular electrode 43 and the peripheral electrode 45 is gradually increased in response to an increase in the voltage.

圖7顯示施加0至80(V)之電壓到圓電極與外周電極間時的IV曲線。Fig. 7 shows an IV curve when a voltage of 0 to 80 (V) is applied between the circular electrode and the peripheral electrode.

與圖6同樣地,將圓電極43設定在負側,並將外周電極45設定在正側,再使電壓值從0(V)到約80(V)依序增加,將電壓施加到圓電極43與外周電極45之間。直到施加電壓約50(V)為止,流到圓電極43與外周電極45間的電流約為1.0E~3(A)以下。另外,於施加到圓電極43與外周電極45間的電壓從約60(V)以上到約80(V)之間,電流急遽增加。其原因為:由於將約80(V)之電壓施加到圓電極43與外周電極45間,圓電極43下方的p型GaN層24與n型GaN層20間之pn接合被破壞,形成部分導通部26。Similarly to Fig. 6, the round electrode 43 is set on the negative side, and the outer peripheral electrode 45 is set on the positive side, and the voltage value is sequentially increased from 0 (V) to about 80 (V), and a voltage is applied to the circular electrode. 43 is between the peripheral electrode 45. The current flowing between the circular electrode 43 and the outer peripheral electrode 45 is about 1.0E to 3 (A) or less until the applied voltage is about 50 (V). Further, the current applied between the round electrode 43 and the outer peripheral electrode 45 is from about 60 (V) or more to about 80 (V), and the current is rapidly increased. The reason for this is that since a voltage of about 80 (V) is applied between the circular electrode 43 and the peripheral electrode 45, the pn junction between the p-type GaN layer 24 under the circular electrode 43 and the n-type GaN layer 20 is broken, and partial conduction is formed. Part 26.

圖8顯示將圓電極之下方的半導體接合破壞後的IV曲線。Fig. 8 shows an IV curve after destruction of the semiconductor under the round electrode.

其次,將約80(V)之電壓施加到圓電極43與外周電極45之間後,再度將電壓(順電壓)施加到圓電極43與外周電極45間並測定IV特性。於將圓電極43下方的p型GaN層24與n型GaN層20間之pn接合破壞前,施加電壓為1.0(V),流到圓電極43與外周電極45間的電流約為0.5E~4(A)(圖6)。另一方面,將pn接合破壞後,如圖8所示,於施加電壓為1.0(V)下,流到圓電極43與外周電極45間的電流則約為1.2E~2(A)。又,若包含圓電極43及外周電極45的附設電極之基板4與一般尺寸(例如350μm角左右之尺寸)的發光元件具有相同尺寸,圓電極43與外周電極45之間會呈現整流性;但圖8中,由於外周電極的面積非常大,因此未呈現整流性。Next, after a voltage of about 80 (V) is applied between the round electrode 43 and the outer peripheral electrode 45, a voltage (parallel voltage) is again applied between the round electrode 43 and the outer peripheral electrode 45, and the IV characteristic is measured. Before the pn junction between the p-type GaN layer 24 under the round electrode 43 and the n-type GaN layer 20 is broken, the applied voltage is 1.0 (V), and the current flowing between the circular electrode 43 and the outer peripheral electrode 45 is about 0.5E. 4 (A) (Figure 6). On the other hand, after the pn junction is broken, as shown in FIG. 8, when the applied voltage is 1.0 (V), the current flowing between the circular electrode 43 and the outer peripheral electrode 45 is about 1.2E to 2 (A). Further, the substrate 4 with the electrode including the round electrode 43 and the outer peripheral electrode 45 has the same size as the light-emitting element of a general size (for example, a size of about 350 μm), and the round electrode 43 and the outer peripheral electrode 45 are rectifying; In Fig. 8, since the area of the peripheral electrode is very large, rectification is not exhibited.

(電壓施加處理後的特性評價)(Evaluation of characteristics after voltage application processing)

圖9顯示於形成部分導通部後將電壓施加到圓電極與環電極間時的IV曲線。Fig. 9 shows an IV curve when a voltage is applied between the circular electrode and the ring electrode after forming a portion of the conduction portion.

在圓電極43下方形成部分導通部26後,將圓電極43設定在負側,並將環電極41設定在正側,且於0.0(V)至5.0(V)的範圍下將電壓施加到圓電極43與環電極41之間。此時,於圓電極43與環電極41間會觀察到整流特性。又,當施加約2.8(V)以上之電壓到圓電極43與環電極41間時,會觀察到峰值波長為460nm的藍色發光。又,附設電極之基板4係20(mA)的驅動電壓約為3.9(V)。After the partial conductive portion 26 is formed under the circular electrode 43, the circular electrode 43 is set on the negative side, and the ring electrode 41 is set on the positive side, and a voltage is applied to the circle in the range of 0.0 (V) to 5.0 (V). The electrode 43 is between the electrode 43 and the ring electrode 41. At this time, rectification characteristics were observed between the round electrode 43 and the ring electrode 41. Further, when a voltage of about 2.8 (V) or more was applied between the circular electrode 43 and the ring electrode 41, blue light having a peak wavelength of 460 nm was observed. Further, the driving voltage of the substrate 4 system 20 (mA) to which the electrodes are attached is about 3.9 (V).

圖10顯示於形成部分導通部後將電壓施加到圓電極與環電極間時的IV曲線。Fig. 10 shows an IV curve when a voltage is applied between the circular electrode and the ring electrode after forming a portion of the conduction portion.

參照圖10可知,依本實施形態的附設電極之基板4可得到與具有pn接合之LED特有IV曲線相同的特性。亦即,在圓電極43下方形成部分導通部26後,將圓電極43設定在負側,並將環電極41設定在正側;且將順向電壓施加到圓電極43與環電極41之間時,於約2.8(V)以上,電壓加大之同時而電流增加。另一方面,將逆向電壓施加到圓電極43與環電極41之間時,則至少到-4.0(V)為止幾乎未流出電流。由此可知,僅針對圓電極43下方的至少一部分形成部分導電部26。Referring to Fig. 10, the substrate 4 with electrodes provided in the present embodiment can obtain the same characteristics as the LED-specific IV curve having pn junction. That is, after the partial conduction portion 26 is formed under the circular electrode 43, the circular electrode 43 is set on the negative side, and the ring electrode 41 is set on the positive side; and the forward voltage is applied between the circular electrode 43 and the ring electrode 41. At about 2.8 (V) or more, the voltage increases while the current increases. On the other hand, when a reverse voltage is applied between the circular electrode 43 and the ring electrode 41, almost no current flows until at least -4.0 (V). From this, it is understood that the partial conductive portion 26 is formed only for at least a part of the lower portion of the circular electrode 43.

以上的說明係關於將電壓施加到圓電極43與外周電極45間而形成部分導通部26的情況;但也可藉由將電壓施加到圓電極43與環電極41間而形成部分導通部26。以下,針對將電壓施加到圓電極43與環電極41間而形成部分導通部26的情況加以說明。The above description relates to a case where a voltage is applied between the circular electrode 43 and the outer peripheral electrode 45 to form the partial conductive portion 26; however, a partial conductive portion 26 may be formed by applying a voltage between the circular electrode 43 and the ring electrode 41. Hereinafter, a case where a voltage is applied between the circular electrode 43 and the ring electrode 41 to form the partial conduction portion 26 will be described.

(對附設電極之基板4的電壓施加處理)(voltage application processing to the substrate 4 to which the electrode is attached)

圖11顯示施加-10(V)至10(V)之電壓到圓電極與環電極間時的IV曲線。Figure 11 shows an IV curve when a voltage of -10 (V) to 10 (V) is applied between the round electrode and the ring electrode.

首先,將圓電極43設定在負側,並將環電極41設定在正側,再使電壓值從-10(V)到約10(V)依序增加,將電壓施加到圓電極43與環電極41之間。於此電壓施加條件下,圓電極43下方的p型GaN層24與n型GaN層20間之pn接合並未被破壞,在圓電極43與環電極41間幾乎未流出電流係已獲得確認。First, the round electrode 43 is set on the negative side, and the ring electrode 41 is set on the positive side, and the voltage value is sequentially increased from -10 (V) to about 10 (V), and a voltage is applied to the circular electrode 43 and the ring. Between the electrodes 41. Under the voltage application conditions, the pn junction between the p-type GaN layer 24 under the round electrode 43 and the n-type GaN layer 20 is not broken, and almost no current flows between the round electrode 43 and the ring electrode 41 have been confirmed.

圖12顯示施加0至47(V)之電壓到圓電極與環電極間時的IV曲線。Figure 12 shows the IV curve when a voltage of 0 to 47 (V) is applied between the round electrode and the ring electrode.

與圖11同樣地,將圓電極43設定在負側,並將環電極41設定在正側,再使電壓值從0(V)至約47(V)依序增加,將電壓施加到圓電極43與環電極41之間。直到施加電壓約50(V)為止,流到圓電極43與環電極41間的電流約為2.00E~3(A)以下。另外,於施加到圓電極43與環電極41間的電壓從約40(V)以上到約47(V)之間,電流急遽增加。其原因為:由於將約47(V)之電壓施加到圓電極43與環電極41間,圓電極43下方的p型GaN層24與n型GaN層20間之pn接合被破壞,形成部分導通部26。Similarly to Fig. 11, the round electrode 43 is set on the negative side, and the ring electrode 41 is set on the positive side, and the voltage value is sequentially increased from 0 (V) to about 47 (V), and a voltage is applied to the circular electrode. 43 is between the ring electrode 41. The current flowing between the circular electrode 43 and the ring electrode 41 is approximately 2.00E to 3 (A) or less until the applied voltage is approximately 50 (V). Further, the current applied between the round electrode 43 and the ring electrode 41 is from about 40 (V) or more to about 47 (V), and the current is rapidly increased. The reason for this is that since a voltage of about 47 (V) is applied between the circular electrode 43 and the ring electrode 41, the pn junction between the p-type GaN layer 24 under the circular electrode 43 and the n-type GaN layer 20 is broken, and partial conduction is formed. Part 26.

圖13顯示將圓電極之下方的半導體接合破壞後的IV曲線。Fig. 13 shows an IV curve after destruction of the semiconductor under the round electrode.

其次,於圓電極43與環電極41之間,與破壞前同樣地使電壓值從-10(V)到約10(V)依序增加,再將電壓施加到圓電極43與環電極41之間。於破壞pn接合後之電壓施加條件下,施加電壓為+2.7(V);且電流流到圓電極43與環電極41之間,隨著施加電壓加大而電流值上升係獲得確認。施加電壓為10(V);且流到圓電極43與環電極41之間的電流係7.50E~3(A)。Next, between the round electrode 43 and the ring electrode 41, the voltage value is sequentially increased from -10 (V) to about 10 (V) in the same manner as before the destruction, and a voltage is applied to the circular electrode 43 and the ring electrode 41. between. Under the voltage application condition after the pn junction was broken, the applied voltage was +2.7 (V); and the current flowed between the round electrode 43 and the ring electrode 41, and the current value was increased as the applied voltage was increased. The applied voltage is 10 (V); and the current flowing between the circular electrode 43 and the ring electrode 41 is 7.50E to 3 (A).

以上,說明本發明的實施形態及實施例,但以上記載的實施形態及實施例並未限定依申請專利範圍的發明。又,須注意者,實施形態及實施例中所說明的特徵之全部組合,並非係用以解決發明課題的方法所必需。The embodiments and examples of the present invention have been described above, but the embodiments and examples described above do not limit the invention according to the scope of the claims. Further, it should be noted that all combinations of the features described in the embodiments and the examples are not essential to the method for solving the problems of the invention.

1‧‧‧發光裝置1‧‧‧Lighting device

2‧‧‧磊晶成長基板2‧‧‧ epitaxial growth substrate

3、4‧‧‧附設電極之基板3, 4‧‧‧The substrate with the electrode

10‧‧‧藍寶石基板10‧‧‧Sapphire substrate

20‧‧‧n型GaN層20‧‧‧n-type GaN layer

22‧‧‧發光層22‧‧‧Lighting layer

24‧‧‧p型GaN層24‧‧‧p-type GaN layer

25‧‧‧p型GaN面25‧‧‧p-type GaN surface

26‧‧‧部分導通部26‧‧‧Parts of the Ministry of Conduct

40‧‧‧p型用電極40‧‧‧p type electrode

41‧‧‧環電極41‧‧‧ ring electrode

42‧‧‧n型用電極42‧‧‧n type electrode

43‧‧‧圓電極43‧‧‧ Round electrode

44、45‧‧‧外周電極44, 45‧‧‧ peripheral electrodes

46‧‧‧電極46‧‧‧ electrodes

48‧‧‧單元電極48‧‧‧Unit electrode

50、52‧‧‧探針50, 52‧‧‧ probe

300‧‧‧基板外緣300‧‧‧Shelf outer edge

402‧‧‧外周電極內緣402‧‧‧ peripheral electrode inner edge

圖1係依第1實施形態的發光裝置之示意立體圖。Fig. 1 is a schematic perspective view of a light-emitting device according to a first embodiment.

圖2係依第1實施形態的發光裝置之縱剖面圖。Fig. 2 is a longitudinal sectional view showing a light-emitting device according to the first embodiment.

圖3(a)~(d)係顯示依第1實施形態的發光裝置之製程的說明圖。3(a) to 3(d) are explanatory views showing the process of the light-emitting device according to the first embodiment.

圖4係依第2實施形態的部分附設電極之基板的俯視圖。Fig. 4 is a plan view showing a substrate to which an electrode is attached according to the second embodiment.

圖5係依實施例的部分附設電極之基板的放大立體圖。Fig. 5 is an enlarged perspective view showing a substrate to which an electrode is attached according to an embodiment.

圖6係依實施例施加0至10(V)之電壓到圓電極與外周電極間時的IV曲線。Fig. 6 is an IV curve when a voltage of 0 to 10 (V) is applied between the circular electrode and the peripheral electrode according to the embodiment.

圖7係依實施例施加0至80(V)之電壓到圓電極與外周電極間時的IV曲線。Figure 7 is an IV curve when a voltage of 0 to 80 (V) is applied between the circular electrode and the peripheral electrode according to the embodiment.

圖8係依實施例將圓電極之下方的半導體接合破壞後的IV曲線。Fig. 8 is an IV curve after the semiconductor junction under the round electrode is broken according to the embodiment.

圖9係依實施例於形成部分導通部後將電壓施加到圓電極與環電極間時的IV曲線。Figure 9 is an IV curve when a voltage is applied between a circular electrode and a ring electrode after forming a portion of the conductive portion in accordance with an embodiment.

圖10係依實施例於形成部分導通部後將電壓施加到圓電極與環電極間時的IV曲線。Figure 10 is an IV curve when a voltage is applied between a circular electrode and a ring electrode after forming a portion of the conductive portion in accordance with an embodiment.

圖11係依實施例施加-10至10(V)之電壓到圓電極與環電極間時的IV曲線。Figure 11 is an IV curve when a voltage of -10 to 10 (V) is applied to the round electrode and the ring electrode according to the embodiment.

圖12係依實施例施加0至47(V)之電壓到圓電極與環電極間時的IV曲線。曲線。Figure 12 is an IV curve when a voltage of 0 to 47 (V) is applied between the circular electrode and the ring electrode according to the embodiment. curve.

圖13係依實施例將圓電極之下方的半導體接合破壞後的IV曲線。Figure 13 is an IV curve after the semiconductor junction under the round electrode is broken according to an embodiment.

1...發光裝置1. . . Illuminating device

10...藍寶石基板10. . . Sapphire substrate

20...n型GaN層20. . . N-type GaN layer

22...發光層twenty two. . . Luminous layer

24...p型GaN層twenty four. . . P-type GaN layer

26...部分導通部26. . . Partial conduction

40...p型用電極40. . . P-type electrode

42...n型用電極42. . . N-type electrode

50、52...探針50, 52. . . Probe

Claims (5)

一種發光裝置,其特徵為包含:第1導電型之第1半導體層;第2導電型之第2半導體層,該第1半導體層設置於其上,且此第2導電型不同於該第1導電型;第1電極,設置在該第1半導體層上;第2電極,與該第1電極個別地設置在該第1半導體層上;及部分導通部,形成於該第2電極的下方,且使該第2電極與該第2半導體層電性雙向導通。 A light-emitting device comprising: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type, wherein the first semiconductor layer is provided thereon, and the second conductivity type is different from the first a conductive type; a first electrode is disposed on the first semiconductor layer; a second electrode is provided on the first semiconductor layer separately from the first electrode; and a partial conductive portion is formed under the second electrode And the second electrode and the second semiconductor layer are electrically bidirectional. 如申請專利範圍第1項之發光裝置,其中,該部分導通部係藉由將既定之電壓施加到該第1電極與該第2電極之間而形成。 The light-emitting device of claim 1, wherein the portion of the conductive portion is formed by applying a predetermined voltage between the first electrode and the second electrode. 如申請專利範圍第1或2項之發光裝置,其中,該第2電極之面積小於該第1電極之面積。 The light-emitting device of claim 1 or 2, wherein the area of the second electrode is smaller than the area of the first electrode. 如申請專利範圍第1或2項之發光裝置,其中,形成該第1電極之材料與形成該第2電極之材料相同。 The light-emitting device according to claim 1 or 2, wherein the material for forming the first electrode is the same as the material for forming the second electrode. 如申請專利範圍第3項之發光裝置,其中,形成該第1電極之材料與形成該第2電極之材料相同。 The light-emitting device of claim 3, wherein the material for forming the first electrode is the same as the material for forming the second electrode.
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