KR100947269B1 - Electrode and Method for fabricating of poly-TFT using the same - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a polycrystalline thin film transistor using an electric field-metal induced crystallization method (FE-MIC), and more particularly, to a method of forming a polycrystalline silicon layer forming an active layer of a thin film transistor.

In the method of forming a polycrystalline silicon layer according to the present invention, after forming an amorphous precursor film on which two catalytic metals are deposited on two substrates, the amorphous precursor films of the respective substrates are brought into contact with each other and a high voltage is applied to the amorphous precursor film at a predetermined temperature. Proceed to crystallization.

In this way, since the catalytic metal can be prevented from being oxidized and heat loss can be minimized, the amorphous preceding film can be formed of a polysilicon film having an even distribution of crystal grains.

Description

Electrode and Method for Fabricating Poly-crystalline Thin Film Transistor Using the Same             

1A to 1D are cross-sectional views illustrating a conventional polycrystalline silicon crystallization process according to a process sequence;

2A to 2C are cross-sectional views illustrating a polycrystalline silicon crystallization process according to the present invention in a process sequence;

3A to 3D are cross-sectional views illustrating a manufacturing process of a polycrystalline thin film transistor according to the present invention in a process sequence.

<Description of the symbols for the main parts of the drawings>

100, 200: first substrate, second substrate 102, 202: buffer layer

104, 204: amorphous preceding film 302: electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polycrystalline thin film transistor for a liquid crystal display device. In particular, when forming a polycrystalline silicon film forming an active layer of a thin film transistor, polysilicon having even grains is prevented by preventing oxidation of the catalytic metal and minimizing heat loss. It relates to a method of forming.

Generally, in order to form a polycrystalline silicon thin film, pure amorphous silicon (intrinsic amorphous silicon) in a predetermined method, that is, plasma silicon vapor deposition (Plasma chemical vapor deposition) or LPCVD (Low pressure CVD) method of amorphous silicon with a thickness of 500 Å on the insulating substrate After the film was deposited, a method of crystallizing it was used. Crystallization methods can be classified into three categories as follows.

First, laser annealing is a method of growing polycrystalline silicon by applying a laser to a substrate on which an amorphous silicon thin film is deposited.

Second, solid phase crystallization (hereinafter referred to as SPC) method is a method of forming polycrystalline silicon by heat-treating amorphous silicon for a long time at a high temperature.

Third, the metal induced crystallization (MIC) method is a method of forming a polycrystalline silicon by depositing a metal on amorphous silicon, a large-area glass substrate can be used.

The first method, laser heat treatment, is a method of forming polycrystalline silicon, which is currently widely studied, which supplies laser energy to a substrate on which amorphous silicon is deposited to form the amorphous silicon in a molten state, and then forms polycrystalline silicon by cooling.

The second method, solid crystallization, forms a buffer layer with a predetermined thickness to prevent diffusion of impurities on a quartz substrate that can withstand high temperatures of 600 ° C. or higher, deposits amorphous silicon on the buffer layer, and then As a method of obtaining polycrystalline silicon by heat treatment at high temperature for a long time, as described above, since the solid phase crystallization is performed for a long time at a high temperature, a desired polycrystalline silicon phase cannot be obtained, and the grain growth direction is irregular, so that the polycrystalline silicon is applied to a thin film transistor. The breakdown voltage of the device is lowered due to the irregular growth of the gate insulating layer to be connected to the gate, and the grain size of the polycrystalline silicon is extremely uneven to degrade the electrical characteristics of the device, and an expensive quartz substrate should be used. There is a problem.

The third method, metal-induced crystallization, can form polycrystalline silicon using a low-cost, large-area glass substrate, but it ensures the reliability of the film because metal residues are likely to exist in the network inside the polycrystalline silicon. Although it is difficult, a new application of the MIC method is attempting to apply crystallized polycrystalline silicon to thin film transistors and switching elements of liquid crystal displays.

A more advanced crystallization method of the MIC method is an electric field-metal induction method (FE-MIC) in which amorphous silicon is formed into crystalline chamber silicon by applying a high voltage, and the main heat generated from the metal by the high voltage.

The field induction crystallization method is to deposit a metal on the amorphous silicon, and by applying a direct current of a high voltage to the metal to generate a columnar heat to act as a catalyst in the amorphous silicon crystallization. In this case, the metal is called a catalyst metal.

Hereinafter, a method of crystallizing amorphous silicon by the FE-MIC method will be described with reference to the accompanying drawings.

1A to 1d is It is a process sectional drawing which shows the conventional silicon crystallization process using FE-MIC method in process order.

First, as shown in FIG. 1A, a silicon insulating material such as silicon oxide (SiO ₂ ) is deposited on the substrate 10 to form a buffer layer 12.

The buffer layer 12 is for blocking an alkali-based material eluted to the surface of the substrate 10 during the process, and is useful when the substrate is formed of an alkali-based material.

Next, amorphous silicon (a-Si: H) is deposited on the buffer layer 12, and then dehydrogenation is performed to form the amorphous preceding film 14.

The dehydrogenation process is a process that should be performed because the amorphous preceding film contains hydrogen. Because hydrogen has a characteristic of leaving the thin film at 350 ° C. or higher, if hydrogen escapes during the crystallization process, numerous defects will occur on the crystal surface. Therefore, the dehydrogenation process is carried out to prevent this in advance.

As shown in FIG. 1B, a process of depositing a catalyst metal 16 such as nickel (Ni) on the surface of the amorphous preceding film 14 is performed.

As shown in FIG. 1C, the electrode 20 is contacted to one side and the other side of the amorphous preceding film 14 on which the catalyst metal 16 is deposited at a predetermined temperature, and a high voltage is applied to the amorphous preceding film ( 14) proceed with the crystallization process.

When the process as described above is completed, as shown in FIG. 1D, the polysilicon layer 24 may be formed.

However, in the conventional crystallization method, when the catalyst metal (nickel) is exposed to air for a long time, it is changed into an oxide form of NiO _X , and the crystallization process is performed while the amorphous preceding film is directly exposed to air. Because of the large heat loss effect of the crystallization reaction rate is lowered, there is a serious problem that the uniformity of the crystal in the film after crystallization is poor due to the nonuniformity of the process temperature.

In addition, at low vacuum degree, the surface of the amorphous preceding film is very likely to be oxidized, which is also a cause of uneven distribution of crystallized polycrystalline silicon film.

When such a polycrystalline silicon thin film is used as an active layer of a thin film transistor, there is a problem of lowering the operating characteristics of the thin film transistor.

Polycrystalline silicon forming method according to the present invention for achieving the above object comprises the steps of preparing a first substrate and a second substrate; Depositing amorphous silicon on the first substrate and the second substrate, respectively, to form an amorphous preceding film; Depositing a catalytic metal on a surface of the amorphous preceding film formed on the first and second substrates; Bonding the first substrate and the second substrate so that the amorphous preceding films contact each other; It provides a method of forming a polycrystalline silicon comprising applying a high voltage to the amorphous preceding film in contact with each other at a predetermined temperature to crystallize the amorphous preceding film.
The first substrate has a larger area than the second substrate, and electrodes are formed on one side and the other side of the amorphous preceding film formed on the first substrate, respectively.
In addition, the catalyst metal is nickel, and further comprising the step of separating the first substrate and the second substrate when the crystallization process is completed.
In addition, the present invention comprises the steps of preparing a first substrate and a second substrate; Depositing amorphous silicon on the first substrate and the second substrate, respectively, to form an amorphous preceding film; Depositing a catalytic metal on a surface of the amorphous preceding film formed on the first and second substrates; Bonding the first substrate and the second substrate so that the amorphous preceding films contact each other; Applying a high voltage to the amorphous preceding films in contact with each other at a predetermined temperature to crystallize the amorphous preceding films to form polycrystalline silicon; Separating the first substrate and the second plate, respectively, and patterning a polycrystalline silicon thin film in an island shape to form an active layer; Forming a gate insulating film, which is a second insulating film, on the active layer; Forming a gate electrode on the gate insulating layer on the active layer; Doping impurities into the active layers on both sides of the gate electrode to form an ohmic contact region; Forming an interlayer insulating film on an entire surface of the substrate on which the ohmic contact region is formed, thereby forming a first contact hole and a second contact hole exposing a portion of the ohmic contact region; And forming a source electrode and a drain electrode respectively contacting the ohmic contact region through the first contact hole and the second contact hole.
Here, the first substrate has a larger area than the second substrate, and electrodes are formed on one side and the other side of the amorphous preceding film formed on the first substrate, respectively.
In addition, the catalyst metal is nickel.

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Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

Example

Hereinafter, a polysilicon crystallization process according to the present invention will be described with reference to FIGS. 2A to 2C.

2A to 2C are cross-sectional views illustrating a process of crystallizing amorphous silicon in accordance with a process sequence of the present invention.

First, as shown in FIG. 2A, a silicon insulating material including silicon oxide (SiO ₂ ) or silicon nitride (SiN _x ) is deposited on the first substrate 100 and the second substrate 200, respectively, to form buffer layers 102 and 202. ).

After depositing amorphous silicon (a-Si: H) on the buffer layers 102 and 202, a dehydrogenation process is performed to form amorphous preceding films 104 and 204.

In this case, the second substrate 200 has a smaller area than the first substrate 100.

As shown in FIG. 2B, a process of depositing catalytic metals 106 and 206 such as nickel (Ni) on the amorphous preceding films 104 and 204 is performed. At this time, nickel adsorbs a very small amount.                     

Next, as shown in FIG. 2C, the first substrate 100 and the second substrate 200 are bonded to each other so that the amorphous preceding films 104 and 204 on which the catalyst metals 106 and 206 are deposited are in contact with each other.

Next, the electrodes 302 are formed on one side and the other side of the amorphous preceding film 104 formed on the large first substrate 100, respectively, and have a high voltage at a predetermined temperature, for example, 500 ° C. to 550 ° C. Is applied to crystallize the amorphous preceding films 104 and 204 formed on the first substrate 100 and the second substrate 200.

Of course, the crystallization is completed and the first substrate 100 and the second substrate 200 are separated, and the patterning process of the polycrystalline silicon film formed on each is performed.

When the amorphous preceding film is crystallized through the above-described process, since the surface of the amorphous preceding film is not exposed to air, oxidation of the catalyst metal can be prevented, and heat loss can be minimized during the process to ensure uniform crystal grains. There is an advantage to form a polycrystalline silicon film having a.

3A to 3D, a process of manufacturing a polycrystalline thin film transistor using a polycrystalline silicon film formed through the above process as an active layer will be described.

3A to 3D are cross-sectional views illustrating a process of manufacturing a polycrystalline thin film transistor according to the present invention in a process sequence.

As shown in FIG. 3A, the island-like active layer 108 is formed by patterning the polysilicon layer formed through the above-described process.                     

Subsequently, silicon nitride (SiN ₂ ) or silicon oxide (SiO ₂ ) is deposited on the active layer 108 to form a gate insulating layer 110.

The active layer 108 may be divided into two regions: a first active region 108a serving as an active channel layer and a second active region 108b which is doped with impurities and becomes an ohmic region.

As shown in FIG. 3B, a low resistance metal including aluminum (Al) and an aluminum alloy is deposited and patterned on the entire surface of the substrate 100 on which the gate insulating layer 110 is formed, thereby forming the first active region 108a. The gate electrode 112 is formed on the gate insulating layer 110 corresponding to the gate insulating layer 110.

Subsequently, the second active region 108b is formed as an ohmic region by doping n + or p + impurity ions onto the entire surface of the substrate 100 on which the gate electrode 112 is formed.

In this case, the impurity ions use a doping or implantation method, and this method severely damages the surface of the second active region 108b doped with the impurity ions.

Therefore, an activation process of applying a predetermined temperature is performed to restore the surface of the second active region 108b to its original state, and to spread the doped ions evenly.

In some cases, the gate insulating layer 110 may be etched using the gate electrode 112 as an etch stopper.                     

Next, as shown in FIG. 3C, the insulating material as described above is deposited on the entire surface of the substrate 100 on which the gate electrode 112 is formed to form the interlayer insulating film 114.

Subsequently, the interlayer insulating layer 114 is patterned so that the first contact hole 116 and the second contact hole 118 exposing the second active region 108b on both sides of the first active region 108a, respectively. Form.

Next, as shown in FIG. 3D, copper (Cu), tungsten (W), molybdenum (Mo), chromium (Cr), and tantalum (Ta) are formed on the entire surface of the substrate 100 on which the interlayer insulating layer 114 is formed. And depositing and patterning one selected from the group of conductive metals including titanium (Ti) and the like to form a source electrode 120 and a drain electrode 122 in contact with the exposed second active region 108b, respectively.

Through the process as described above it can be produced a polycrystalline thin film transistor according to the present invention.

When the amorphous preceding film is crystallized according to the method of the present invention as described above, it is possible to prevent oxidation of the catalytic metal and minimize heat loss during the crystallization, thereby obtaining a polysilicon thin film composed of uniform grains. have.

Therefore, a thin film transistor using such a polysilicon thin film as an active layer has an effect of improving operating characteristics.

Claims (9)

Preparing a first substrate and a second substrate; Depositing amorphous silicon on the first substrate and the second substrate, respectively, to form an amorphous preceding film; Depositing a catalytic metal on a surface of the amorphous preceding film formed on the first and second substrates; Bonding the first substrate and the second substrate so that the amorphous preceding films contact each other; Crystallizing the amorphous preceding film by applying a high voltage to the amorphous preceding film in contact with each other at a predetermined temperature Polycrystalline silicon forming method comprising a. The method of claim 1, And the first substrate has a larger area than the second substrate. The method of claim 2, And forming electrodes on one side and the other side of the amorphous preceding film formed on the first substrate. The method of claim 1, Wherein the catalytic metal is nickel. The method of claim 1, And separating the first substrate and the second substrate when the crystallization process is completed. Preparing a first substrate and a second substrate; Depositing amorphous silicon on the first substrate and the second substrate, respectively, to form an amorphous preceding film; Depositing a catalytic metal on a surface of the amorphous preceding film formed on the first and second substrates; Bonding the first substrate and the second substrate so that the amorphous preceding films contact each other; Applying a high voltage to the amorphous preceding films in contact with each other at a predetermined temperature to crystallize the amorphous preceding films to form polycrystalline silicon; Separating the first substrate and the second plate, respectively, and patterning a polycrystalline silicon thin film in an island shape to form an active layer; Forming a gate insulating film, which is a second insulating film, on the active layer; Forming a gate electrode on the gate insulating layer on the active layer; Doping impurities into the active layers on both sides of the gate electrode to form an ohmic contact region; Forming an interlayer insulating film on an entire surface of the substrate on which the ohmic contact region is formed, thereby forming a first contact hole and a second contact hole exposing a portion of the ohmic contact region; Forming a source electrode and a drain electrode respectively contacting the ohmic contact region through the first contact hole and the second contact hole; Polycrystalline thin film transistor manufacturing method comprising a. The method of claim 6, The first substrate is a polycrystalline thin film transistor manufacturing method having a larger area than the second substrate. The method of claim 7, wherein A method of manufacturing a polycrystalline thin film transistor, wherein electrodes are formed on one side and the other side of the amorphous preceding film formed on the first substrate. The method of claim 6, The catalyst metal is nickel polycrystalline thin film transistor manufacturing method.

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