KR100900243B1 - Method for forming bit line of semiconductor device - Google Patents

Abstract

The present invention discloses a method for forming a bit line of a semiconductor device, and the method of forming a bit line of a semiconductor device according to the present invention includes: forming an interlayer insulating film on a semiconductor substrate; Forming a photoresist pattern on the interlayer insulating film; Forming a CSP material layer pattern on a surface of the photoresist pattern; Forming a trench in the interlayer insulating layer by etching the CSP material layer pattern, the photoresist pattern, and the interlayer insulating layer on the entire surface; And forming a bit line in the trench after removing the residual CSP material layer pattern and the photoresist pattern, and forming an ultra-fine bit line by using a trench and a chemical swelling process (CSP). In addition, the BPSG flow process, hard mask deposition, anti-reflection film deposition, and hard mask etching process, which were previously required, are omitted, thereby simplifying the process and preventing the existing bit line collapse phenomenon.

Description

Method for forming bit line of semiconductor device

1A to 1D are cross-sectional views illustrating a method of forming a bit line of a semiconductor device according to the prior art;

2A to 2H are cross-sectional views illustrating a method of forming a bit line of a semiconductor device in accordance with the present invention.

[Description of Drawing Reference]

31: semiconductor substrate 33: BPSG thin film

35 photoresist pattern 37 CSP material layer

39: trench 41: tungsten layer

41a: bit line 43: insulating material layer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to forming a bit line of a semiconductor device suitable for high integration by forming an ultra-fine bit line using a trench formation for wiring formation and a chemical swelling process (CSP). It's about how.

An existing bit line forming method will be described below with reference to FIGS. 1A and 1D.

1A and 1D are cross-sectional views illustrating a method of forming a bit line of a semiconductor device according to the prior art.

In the conventional bit line forming method, as shown in FIG. 1A, a BPSG thin film 13 is deposited on the semiconductor substrate 11 as an interlayer insulating film, and then flowed thereon, followed by a bit line glue layer. (15) is deposited.

Then, as shown in FIG. 1B, a tungsten layer 17 is deposited on the bit line glue layer 15 for use as a bit line and then a bit line hard mask layer 19 is deposited thereon.

Subsequently, as illustrated in FIG. 1C, a bit line anti reflective coating (ARC) 21 is deposited on the hard mask layer 19, and then a mask pattern 23 for forming a bit line is formed thereon. do.

Next, as shown in FIG. 1D, the hard mask layer 19 and the tungsten layer 17 for bit line 17 are sequentially etched through the mask pattern 23, and then the mask pattern 23 is removed to remove bits. Line 17a is formed.

However, according to the prior art as described above, in the flow process of the interlayer insulating film BPSG and the anti-reflective film forming step, the diffused reflection of the exposed light due to the step of the lower layer and the tungsten at the time of the mask pattern work, which is the photomask for forming the bit line, and tungsten It is an additional process for preventing notching and thinning during patterning through a photo process by preventing reflection of light by the photo process.

Since hard mask deposition uses thin photoresist thickness to form fine photomask patterns (i.e. photoresist patterns) to improve resolution, i.e., to form thin bit lines, for photomask patterning for bit line formation. The process is added because it does not act as a masking of the plasma, and thus the hard mask etching process is added in the etching process.

Therefore, a flow process, an anti-reflection film forming process, a hard mask etching process, and the like are added at the time of forming the bit line, thereby making the manufacturing process of the semiconductor device complicated.

In addition, since the photomask pattern is miniaturized, pattern collapse occurs in the post-development cleaning process, which causes a decrease in yield.

Accordingly, the present invention has been made to solve the above-mentioned problems of the prior art, by forming an ultra-fine bit line using a trench and chemical swelling process (CSP) process, a method for forming a bit line of a semiconductor device suitable for high integration of the device The purpose is to provide.

In addition, another object of the present invention is to provide a method for forming a bit line of a semiconductor device that can simplify the process because the BPSG flow process, hard mask deposition, anti-reflection film deposition, hard mask etching process, etc. previously required are omitted. have.                         

In addition, another object of the present invention is to provide a method for forming a bit line of a semiconductor device capable of improving yield by preventing an existing bit line fall phenomenon by using an interlayer insulating film having a trench formed therein.

Meanwhile, another object of the present invention is to form a bit line of a semiconductor device capable of forming an accurate final bit line by preventing bit line notch and thinning since a photomask process is not performed on a metal film. In providing a method.

According to an aspect of the present invention, there is provided a method of forming a bit line of a semiconductor device, the method including: forming an interlayer insulating film on a semiconductor substrate; Forming a photoresist pattern on the interlayer insulating film; Forming a CSP material layer pattern on a surface of the photoresist pattern; Forming a trench in the interlayer dielectric layer by etching the CSP material layer pattern, the photoresist pattern, and the interlayer dielectric layer; And forming a bit line in the trench after removing the residual CSP material layer pattern and the photoresist pattern, wherein the forming of the CSP material layer pattern includes: forming a CSP material on the photoresist pattern and the interlayer dielectric layer; And depositing the layer, baking the CSP material layer at a temperature of 100 ° C. for 80 seconds, and rinsing the baked CSP material layer.

(Example)

Hereinafter, a method of forming a bit line of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

2A to 2H are cross-sectional views illustrating a method of forming a bit line of a semiconductor device according to the present invention.

In the method of forming a bit line of a semiconductor device according to the present invention, as shown in FIG. 2A, first, a BPSG thin film 33 is deposited on the semiconductor substrate 31 as an interlayer insulating film, and then the existing I-line equipment is deposited thereon. A space type photomask pattern 350 for forming a bit line is formed using the photoresist constituting the photomask pattern 35 to a thickness of about 0.7 μm, thereby increasing the resolution of the I-line device as much as possible. The trench space, that is, the trench width, is about 0.3 μm.

Next, as shown in FIG. 2B, a chemical swelling process (CSP) is performed to refine the photoresist pattern 35 by a method for forming a thin bit line, and the surface of the entire structure is about 0.5 μm. The CSP material layer 37 is formed to a thickness. At this time, it is heated for about 80 seconds at a temperature of about 100 ℃ for the final pattern size of about 0.1 μm.

Subsequently, as shown in FIG. 2C, the CSP material layer 37 is left only on the surface of the photoresist pattern 35 by heating and rinsing with DI water. In this case, when the CSP material layer 37 is rinsed as described above, the hydrogen group (H ⁺ ) of the photoresist and the CSP material are combined, that is, only the portion having the photoresist remains with the CSP material as described above. That is, the CSP material layer pattern 37a is formed.

Next, as shown in FIG. 2D, the remaining CSP material layer pattern 37a, the photoresist pattern 35, and the BPSG thin film 33 are etched over the entire surface to form a bit line trench in the BPSG thin film 33. 39). At this time, since the thickness of the photoresist pattern 35 is only about 0.7 μm, it does not play a sufficient mask during etching, but since 0.1 μm of the CSP material is added, the final thickness becomes 0.8 μm, thereby serving as a sufficient mask.

Subsequently, as shown in FIG. 2E, the remaining CSP material layer 37b and the photoresist pattern 35a are removed, and then a tungsten layer (not shown) is formed to form a bit line on the BPSG thin film 33 including the trench 39. 41).

Next, as shown in FIG. 2F, the tungsten layer 41 is removed to a certain thickness and only to the upper surface of the BPSG thin film 33 by blanket etching to form the bit line 41a. At this time, the BPSG thin film 33 serves to prevent the fall of the existing bit line.

Subsequently, an insulating material layer 43 such as SOG is deposited on the bit line 41a and the BPSG thin film 33 as an insulating material layer for forming metal wiring.

As described above, according to the method for forming a bit line of a semiconductor device according to the present invention, it is possible to achieve high integration of a semiconductor device due to the formation of a thin bit line.

In addition, since the existing exposure machine (i-line) is used as it is, investment cost and production cost are reduced, thereby improving cost competitiveness.

In addition, since the BPSG flow process, hard mask deposition, anti-reflection film deposition, and hard mask etching process, which have been previously required, are omitted, the process is simplified.

Furthermore, although the bit line collapses in the past, in the present invention, since the BPSG thin film supports the bit line, the fall phenomenon is prevented and the yield improvement is expected.

On the other hand, since the photomask process is not performed on the metal film, bit line notch and thinning may be prevented to form an accurate final bit line.

On the other hand, the present invention is not limited to the above-described specific preferred embodiments, and various changes can be made by those skilled in the art without departing from the gist of the invention claimed in the claims. will be.

Claims (6)

Forming an interlayer insulating film on the semiconductor substrate; Forming a photoresist pattern on the interlayer insulating film; Forming a chemical swelling process (CSP) material layer pattern on a surface of the photoresist pattern; Forming a trench in the interlayer dielectric layer by etching the CSP material layer pattern, the photoresist pattern, and the interlayer dielectric layer; And Forming a bit line in the trench after removing the residual CSP material layer pattern and the photoresist pattern; Including; Forming the CSP material layer pattern, Depositing a CSP material layer on the photoresist pattern and the interlayer dielectric layer; Baking the CSP material layer at a temperature of 100 ° C. for 80 seconds; Rinsing the baked CSP material layer; Bit line forming method of a semiconductor device comprising a. delete The method of claim 1, wherein the CSP material layer is deposited to a thickness of 0.5 μm. The method of claim 3, wherein the CSP material layer has a thickness of 0.1 μm after a baking and rinsing process. delete The method of claim 1, wherein after forming the bit line, And forming an insulating material layer on an upper surface of the entire structure in which the bit lines are formed.

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