KR100830406B1 - Plasma display device - Google Patents

Abstract

A plasma display apparatus is provided to improve impact resistance strength by controlling the coefficient of thermal expansion with respect to a dielectric formed on a panel. A scan electrode(11) and a sustain electrode(12) are formed in parallel on an upper surface(10). An upper dielectric(13) and a protective layer(14) are laminated on the upper surface. An address electrode(22) is formed on a lower substrate(20). A lower dielectric(24) and a barrier rib(21) are formed on the lower substrate. The upper dielectric has the coefficient of thermal expansion of 75X10^-7/°C over and 79X10^-7/°C below. A reflectivity of the upper dielectric is 31 % over and 32.541 % below. The upper dielectric includes a compound of Al, Si, Ba, and Pb. The dielectric is made of Al of 3 to 4 percent by weight, Si of 5 to 7 percent by weight, Ba of 20 to 30 percent by weight, and Pb of 60 to 70 percent by weight.

Description

 Plasma Display Device

1 is a perspective view showing an embodiment of a structure of a plasma display panel according to the present invention;

2 is a diagram illustrating an embodiment of an electrode arrangement of a plasma display panel;

3 is a diagram illustrating an embodiment of a method in which a frame of an image is time-divided and driven into a plurality of subfields in a plasma display device.

4 is a timing diagram illustrating an embodiment of driving signals for driving a plasma display panel;

5a is a graph measuring the strength of a panel,

5B and 5C are views in which impact strength of a conventional plasma display device is shown for each position of a panel surface;

5D is a view showing the impact strength of the plasma display device according to the present invention for each position of the panel surface;

6 is a graph showing the components of the dielectric layer in the plasma display device of the present invention.

<Explanation of symbols on main parts of the drawings>

10: upper substrate 11: scan electrode

12: sustain electrode 15: black matrix

20: lower substrate 21: partition wall

22: address electrode 23: phosphor

24: lower dielectric layer 25: filter

R1, R2: experimental group T in contrast to the present invention: the present invention

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display device, and more particularly, to a plasma display device including a dielectric layer to have a stronger impact strength when an impact of a panel is applied.

Plasma Display Panels (hereinafter referred to as PDPs) generate a discharge by applying a predetermined voltage to the electrodes installed in the discharge space, and plasma generated during gas discharge excites the phosphor to display an image including characters or graphics. As a device to be large in size, light in weight, and thin in plane, it is possible to provide a wide viewing angle up, down, left and right, and to realize full color and high brightness.

However, since the substrate of the panel is made of glass, there is a problem that the impact is weak when an impact is applied.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems of the prior art, and an object thereof is to provide a plasma display device having improved impact resistance by controlling a thermal expansion rate of a dielectric layer formed on a panel.

The plasma display device according to the present invention for solving the above problems comprises a dielectric layer formed on a substrate, the dielectric layer has a thermal expansion coefficient of 75 × 10 ^-7 / ℃ or more and 79 × 10 ^-7 / ℃ or less.

Here, the dielectric layer includes AL, Si, Ba, and Pb components.

The reflectance of the dielectric layer is 31% or more and 32.541% or less.

The discoloration rate of the dielectric layer is 3.557% or more and 3.843% or less.

The dielectric layer is an upper dielectric layer formed on the upper substrate.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

1 is a perspective view showing an embodiment of a structure of a plasma display panel according to the present invention.

As shown in FIG. 1, the plasma display panel includes a scan electrode 11, a sustain electrode 12, a sustain electrode pair formed on the upper substrate 10, and an address electrode 22 formed on the lower substrate 20. It includes.

The sustain electrode pairs 11 and 12 generally include transparent electrodes 11a and 12a and bus electrodes 11b and 12b formed of indium tin oxide (ITO), and the bus electrodes 11b and 12b. 12b) may be formed of a metal such as silver (Ag) or chromium (Cr) or a stack of chromium / copper / chromium (Cr / Cu / Cr) or a stack of chromium / aluminum / chromium (Cr / Al / Cr). . The bus electrodes 11b and 12b are formed on the transparent electrodes 11a and 12a to serve to reduce voltage drop caused by the transparent electrodes 11a and 12a having high resistance.

Meanwhile, according to the exemplary embodiment of the present invention, the sustain electrode pairs 11 and 12 may not only have a structure in which the transparent electrodes 11a 12a and the bus electrodes 11b and 12b are stacked, but also the buses without the transparent electrodes 11a and 12a. Only the electrodes 11b and 12b may be configured. This structure does not use the transparent electrodes (11a, 12a), there is an advantage that can lower the cost of manufacturing the panel. The bus electrodes 11b and 12b used in this structure may be various materials such as photosensitive materials in addition to the materials listed above.

Light between the scan electrodes 11 and the sustain electrodes 12 between the transparent electrodes 11a and 12a and the bus electrodes 11b and 11b to absorb external light generated outside the upper substrate 10 to reduce reflection. A black matrix (BM, 15) is arranged that functions to block and to improve the purity and contrast of the upper substrate 10.

The black matrix 15 according to the exemplary embodiment of the present invention is formed on the upper substrate 10, the first black matrix 15 and the transparent electrodes 11a and 12a formed at positions overlapping the partition wall 21. And the second black matrices 11c and 12c formed between the bus electrodes 11b and 12b. Here, the first black matrix 15 and the second black matrices 11c and 12c, also called black layers or black electrode layers, may be simultaneously formed and physically connected in the formation process, or may not be physically connected.

In addition, when physically connected and formed, the first black matrix 15 and the second black matrix 11c and 12c may be formed of the same material, but may be formed of different materials when they are formed separately.

The upper dielectric layer 13 and the passivation layer 14 are stacked on the upper substrate 10 having the scan electrode 11 and the sustain electrode 12 side by side. Charged particles generated by the discharge are accumulated in the upper dielectric layer 13, and the protective electrode pairs 11 and 12 may be protected. The protective film 14 protects the upper dielectric layer 13 from sputtering of charged particles generated during gas discharge, and increases emission efficiency of secondary electrons. The upper dielectric layer 13 will be described in detail with the following examples.

In addition, the address electrode 22 is formed in a direction crossing the scan electrode 11 and the sustain electrode 12. In addition, a lower dielectric layer 24 and a partition wall 21 are formed on the lower substrate 20 on which the address electrode 22 is formed.

In addition, the phosphor layer 23 is formed on the surfaces of the lower dielectric layer 24 and the partition wall 21. The partition wall 21 has a vertical partition wall 21a and a horizontal partition wall 21b formed in a closed shape, and physically distinguishes the discharge cells, and prevents ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. .

Referring to FIG. 1, it is preferable that a filter 25 is formed on the front surface of the plasma display panel according to the present invention, and the filter 25 has an external light blocking layer, an anti-reflection (AR) layer, and a near infrared shielding (NIR). Layer or EMI shielding layer.

When the distance between the filter 25 and the panel is 10㎛ to 30㎛, it can effectively block the light incident from the outside, it is possible to effectively emit the light generated in the panel to the outside. In addition, in order to protect the said panel from the pressure from the outside etc., the space | interval between the filter 25 and the said panel can be 30 micrometers-120 micrometers.

An adhesive layer may be formed between the filter 25 and the panel to attach the filter 25 to the panel.

In an embodiment of the present invention, not only the structure of the partition wall 21 illustrated in FIG. 1, but also the structure of the partition wall 21 having various shapes may be possible. For example, a channel in which a channel usable as an exhaust passage is formed in at least one of the differential partition structure, the vertical partition 21a, or the horizontal partition 21b having different heights of the vertical partition 21a and the horizontal partition 21b. A grooved partition structure having a groove formed in at least one of the type partition wall structure, the vertical partition wall 21a, or the horizontal partition wall 21b may be possible.

Here, in the case of the differential partition wall structure, the height of the horizontal partition wall 21b is more preferable, and in the case of the channel partition wall structure or the groove partition wall structure, it is preferable that a channel is formed or the groove is formed in the horizontal partition wall 21b. something to do.

Meanwhile, in one embodiment of the present invention, although the R, G and B discharge cells are shown and described as being arranged on the same line, it may be arranged in other shapes. For example, a Delta type arrangement in which R, G, and B discharge cells are arranged in a triangular shape may be possible. In addition, the shape of the discharge cell may be not only rectangular, but also various polygonal shapes such as a pentagon and a hexagon.

In addition, the phosphor layer 23 emits light by ultraviolet rays generated during gas discharge to generate visible light of any one of red (R), green (G), and blue (B). Here, an inert mixed gas such as He + Xe, Ne + Xe and He + Ne + Xe for discharging is injected into the discharge space provided between the upper / lower substrates 10 and 20 and the partition wall 21.

FIG. 2 is a diagram illustrating an embodiment of an electrode arrangement of a plasma display panel, and a plurality of discharge cells constituting the plasma display panel are preferably arranged in a matrix form as shown in FIG. 2. The plurality of discharge cells are provided at the intersections of the scan electrode lines Y1 to Ym, the sustain electrode lines Z1 to Zm, and the address electrode lines X1 to Xn, respectively. The scan electrode lines Y1 to Ym may be driven sequentially or simultaneously, and the sustain electrode lines Z1 to Zm may be driven simultaneously. The address electrode lines X1 to Xn may be driven by being divided into odd-numbered lines and even-numbered lines, or sequentially driven.

Since the electrode arrangement shown in FIG. 2 is only an embodiment of the electrode arrangement of the plasma panel according to the present invention, the present invention is not limited to the electrode arrangement and driving method of the plasma display panel shown in FIG. 2. For example, a dual scan method in which two scan electrode lines among the scan electrode lines Y1 to Yn are simultaneously scanned may be used. In addition, the address electrode lines X1 to Xn may be driven by being divided up and down in the center portion of the panel.

3 is a timing diagram illustrating an embodiment of a time division driving method by dividing a frame into a plurality of subfields. The unit frame may be divided into a predetermined number, for example, eight subfields SF1, ..., SF8 to realize time division gray scale display. Each subfield SF1, ... SF8 is divided into a reset section (not shown), an address section A1, ..., A8 and a sustain section S1, ..., S8.

Here, according to an embodiment of the present invention, the reset period may be omitted in at least one of the plurality of subfields. For example, the reset period may exist only in the first subfield or may exist only in a subfield about halfway between the first subfield and all the subfields.

In each address section A1, ..., A8, an address signal is applied to the address electrode X, and a scan signal corresponding to each scan electrode Y is sequentially applied by one scan electrode line.

In each of the sustain periods S1, ..., S8, a sustain signal is alternately applied to the scan electrode Y and the sustain electrode Z, so that wall charges are formed in the address periods A1, ..., A8. Sustain discharge occurs in the discharge cells.

The luminance of the plasma display panel is proportional to the number of sustain discharge pulses in the sustain discharge periods S1, ..., S8 occupied in the unit frame. When one frame forming one image is represented by eight subfields and 256 gradations, each subfield in turn has different sustains at a ratio of 1, 2, 4, 8, 16, 32, 64, and 128. The number of signals can be assigned. In order to obtain luminance of 133 gray levels, cells may be sustained by addressing the cells during the subfield 1 section, the subfield 3 section, and the subfield 8 section.

The number of sustain discharges allocated to each subfield may be variably determined according to weights of the subfields according to the APC (Automatic Power Control) step. That is, in FIG. 3, a case in which one frame is divided into eight subfields has been described as an example. However, the present invention is not limited thereto, and the number of subfields forming one frame may be variously modified according to design specifications. . For example, a plasma display panel may be driven by dividing one frame into eight or more subfields, such as 12 or 16 subfields.

The number of sustain discharges allocated to each subfield can be variously modified in consideration of gamma characteristics and panel characteristics. For example, the gray level assigned to subfield 4 may be lowered from 8 to 6, and the gray level assigned to subfield 6 may be increased from 32 to 34.

4 is a timing diagram illustrating an embodiment of driving signals for driving a plasma display panel with respect to the divided subfield.

The subfield is a wall formed by a pre-reset section and a pre-reset section for forming positive wall charges on the scan electrodes Y and negative wall charges on the sustain electrodes Z. A reset section for initializing the discharge cells of the entire screen using the charge distribution, an address section for selecting the discharge cells, and a sustain section for maintaining the discharge of the selected discharge cells; .

The reset section includes a setup section and a setdown section. In the setup section, rising ramp waveforms (Ramp-up) are simultaneously applied to all scan electrodes to generate fine discharges in all discharge cells. Thus, wall charges are generated. In the set-down period, a falling ramp waveform (Ramp-down) falling at a positive voltage lower than the peak voltage of the rising ramp waveform (Ramp-up) is simultaneously applied to all the scan electrodes (Y), thereby eliminating discharge discharge in all the discharge cells. Generated, thereby eliminating unnecessary charges during wall charges and space charges generated by the setup discharges.

In the address period, a scan signal 410 having a negative scan voltage Vsc is sequentially applied to the scan electrode, and an address signal having a positive address voltage Va on the address electrode X so as to overlap the scan signal. 400 is applied. The address discharge is generated by the voltage difference between the scan signal 410 and the address signal 400 and the wall voltage generated during the reset period, thereby selecting the cell. Meanwhile, a signal for maintaining a sustain voltage is applied to the sustain electrode during the set down period and the address period.

In the sustain period, a sustain signal is alternately applied to the scan electrode and the sustain electrode to generate sustain discharge in the form of surface discharge between the scan electrode and the sustain electrode.

The driving waveforms shown in FIG. 4 are the first embodiment of signals for driving the plasma display panel according to the present invention, and the present invention is not limited by the waveforms shown in FIG. For example, the pre-reset period may be omitted, and the polarity and the voltage level of the driving signals illustrated in FIG. 4 may be changed as necessary, and an erase signal for erasing wall charge may be applied to the sustain electrode after the sustain discharge is completed. It may be. In addition, a single sustain drive in which a sustain signal is applied to only one of the scan electrode (Y) and the sustain (Z) electrode to generate a sustain discharge is also possible.

The plasma display device according to the present invention includes a dielectric layer, wherein the dielectric layer has a thermal expansion coefficient of 75 × 10 ⁻⁷ / ° C. or more and 79 × 10 ⁻⁷ / ° C. or less.

The panel of the plasma display device uses a glass substrate having a coefficient of thermal expansion of about 84 × 10 ⁻⁷ / ° C. An electrode is formed on the glass substrate, and a dielectric layer is formed to cover the electrode.

The dielectric layer may be formed in a green sheet form or may be formed by screen printing a dielectric paste form.

After the green sheet is attached to the upper glass substrate or printed with the dielectric paste, the dielectric layer is finally formed through the firing process.

After the firing process, the glass substrate shrinks about 300 μm as the structure becomes dense after firing, and the glass substrate is formed by the combination of the degree of deformation of the transparent electrode formed on the glass substrate, the bus electrode, and the green sheet. Affect

In the plasma display device according to the present invention, the intensity of the entire panel is further increased by using a dielectric layer having a value of 75 × 10 ⁻⁷ / ° C. or more and 79 × 10 ⁻⁷ / ° C. or less.

This is a coefficient of thermal expansion less than that of glass substrates than that of conventional dielectric layers (about 80.4 × 10 ⁻⁷ / ° C.). If the coefficient of thermal expansion of the dielectric layer is greater than 79 × 10 ⁻⁷ / ° C., the thermal strain of the dielectric layer is large, resulting in a weaker panel.

If the coefficient of thermal expansion of the dielectric layer is less than 75 × 10 ⁻⁷ / ° C., the difference in thermal expansion coefficient with the glass substrate becomes large, and thus the bonding strength between the glass substrate and the dielectric layer is weakened after firing, and thus the strength is lowered.

Therefore, it is preferable that the dielectric layer has a value of 75 × 10 ⁻⁷ / ° C. or more and 79 × 10 ⁻⁷ / ° C. or less with a relatively small amount of thermal deformation while being in harmony with the thermal expansion coefficient of the glass substrate.

Fig. 5A is a graph showing the drop height of the metal ball at the point where damage to the panel occurs when the steel ball falls at a predetermined height. The weight of the iron ball used in this experiment was 8.3g.

In FIG. 5A, R1 and R2 are conventional plasma display devices, and T is a plasma display device according to the present invention.

Referring to FIG. 5A, after about 100 times of dropping the steel ball, the sample 1 (R1) of the conventional plasma display device was damaged on the panel at an average of about 38.68 cm, and sample 2 (R2). In the case of the average damage to the panel was about 39.38cm. However, the plasma display device according to the present invention began to damage the panel at about 46.85 cm.

Table 1 is a table showing the average of the height of the panel when damage occurs and the average energy received by the panel.

R1 R2 T Height (cm) 38.68 39.38 46.85 Energy (mJ) 31.4 32 38

Therefore, the plasma display device according to the present invention has a thermal expansion coefficient of the dielectric layer of 75 × 10 ⁻⁷ / ° C. or more and 79 × 10 ⁻⁷ / ° C. or less, and thus the impact resistance of the panel is about 21.1% as a whole compared to the conventional panel. It can be seen that the strength is enhanced.

The dielectric layer may be applied to either of the upper dielectric layer formed on the upper substrate or the lower dielectric layer formed on the lower substrate.

5B and 5C are diagrams illustrating impact strengths of the conventional plasma display apparatus for each position of the panel surface. Here, the darker the color, the stronger the part.

The number next to the color in the upper left corner indicates the range of drop heights of the steel ball at which the panel breaks. The higher the height, the darker the color, and the darker the color, the higher the intensity.

5D is a diagram illustrating the impact resistance of the plasma display device according to the position of the panel surface.

6 is a graph showing the components of the dielectric layer in the plasma display device of the present invention.

6, A is a graph showing the components of the dielectric layer of the plasma display device according to the present invention, B is a graph showing the components of the dielectric layer of the conventional plasma display device.

The dielectric layer comprises Al, Si, Ba, Pb compounds. Such compounds may have an oxide form, such as mainly Al ₂ O ₃ , SiO _2, and the like.

Here, the dielectric layer may be composed of 3 to 4% by weight of Al, 5 to 7% by weight of Si, 20 to 30% by weight of Ba, and 60 to 70% by weight of Pb. Preferably, as shown in FIG. 5A, the dielectric layer is 3.5 wt% Al, 6.5 wt% Si, 26 wt% Ba, and 64 wt% Pb.

Table 2 is a table showing the reflectance and discoloration of the dielectric layer of the conventional plasma display device and the dielectric layer of the plasma display device according to the present invention.

reflectivity Discoloration rate R T R T sample 1 32.78 32.50 3.83 3.49 sample 2 33.05 32.71 4.03 3.76 sample 3 32.36 31.08 4.35 3.63 sample 4 33.32 31.37 4.25 3.85 sample 5 33.25 31.20 4.46 3.78 Average 32.95 31.77 4.18 3.70 Standard Deviation 0.392 0.771 0.254 0.143

Referring to Table 2, the reflectance of the dielectric layer T of the plasma display device according to the present invention is 31% or more and 32.541% or less, which is lower than the reflectance of the dielectric layer R of the conventional plasma display device, which is more clear. Enable to provide picture quality.

In addition, the discoloration rate of the dielectric layer T of the plasma display device according to the present invention is 3.557% or more and 3.843% or less, which is lower than the discoloration rate of the dielectric layer R of the conventional plasma display device. Discoloration rate prevents color distortion, providing clear picture quality and improving panel durability.

As described above, the plasma display device according to the present invention has been described with reference to the illustrated drawings. However, the present invention is not limited by the embodiments and drawings disclosed herein, and may be applied within a range in which technical thoughts are protected.

Plasma display device according to the present invention is configured as described above to improve the thermal gradient of the dielectric layer to strengthen the impact resistance of the panel to prevent panel damage due to external impact, the dielectric layer to reduce the reflectance and discoloration rate It provides a clear picture quality and improves durability.

Claims (7)

In the plasma display device comprising a dielectric layer formed on a substrate, The dielectric layer has a thermal expansion coefficient of 75 × 10 ⁻⁷ / ° C. or more and 79 × 10 ⁻⁷ / ° C. or less, And a reflectance of the dielectric layer is 31% or more and 32.541% or less. The method according to claim 1, The dielectric layer includes an Al, Si, Ba, Pb compound. The method according to claim 2, The dielectric layer is a plasma display device consisting of 3 to 4% by weight of Al, 5 to 7% by weight of Si, 20 to 30% by weight of Ba, 60 to 70% by weight of Pb. The method according to claim 3, The dielectric layer is composed of 3.5 wt% Al, 6.5 wt% Si, 26 wt% Ba and 64 wt% Pb. delete The method according to claim 1, Discoloration rate of the dielectric layer is more than 3.557% 3.843% plasma display device. The method according to claim 1, And the dielectric layer is an upper dielectric layer formed on the upper substrate.

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