KR100772075B1 - 엠아이엠 캐패시터 형성방법 - Google Patents
엠아이엠 캐패시터 형성방법 Download PDFInfo
- Publication number
- KR100772075B1 KR100772075B1 KR1020010081671A KR20010081671A KR100772075B1 KR 100772075 B1 KR100772075 B1 KR 100772075B1 KR 1020010081671 A KR1020010081671 A KR 1020010081671A KR 20010081671 A KR20010081671 A KR 20010081671A KR 100772075 B1 KR100772075 B1 KR 100772075B1
- Authority
- KR
- South Korea
- Prior art keywords
- metal film
- capacitor
- lower electrode
- forming
- metal
- Prior art date
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- 239000003990 capacitor Substances 0.000 title claims abstract description 40
- 238000000034 method Methods 0.000 title claims abstract description 39
- 239000002184 metal Substances 0.000 claims abstract description 56
- 230000003746 surface roughness Effects 0.000 claims abstract description 13
- 238000009832 plasma treatment Methods 0.000 claims abstract description 11
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 238000004381 surface treatment Methods 0.000 claims abstract description 10
- 239000004065 semiconductor Substances 0.000 claims abstract description 9
- 238000005530 etching Methods 0.000 claims abstract description 6
- 238000004140 cleaning Methods 0.000 claims abstract description 4
- 239000002002 slurry Substances 0.000 claims abstract description 4
- 239000012212 insulator Substances 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 11
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 8
- 239000011229 interlayer Substances 0.000 description 3
- 230000008021 deposition Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/75—Electrodes comprising two or more layers, e.g. comprising a barrier layer and a metal layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
- H01L21/02046—Dry cleaning only
- H01L21/02049—Dry cleaning only with gaseous HF
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/32115—Planarisation
- H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Plasma & Fusion (AREA)
- Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (6)
- 상면에 하지층이 형성된 반도체 기판을 제공하는 단계;상기 하지층 상에 하부전극용 제1금속막을 형성하는 단계;상기 제1금속막의 표면 거칠기가 개선되도록, 그 표면을 표면 처리하는 단계;상기 표면 처리된 하부전극용 제1금속막 상에 유전체막과 상부전극용 제2금속막을 차례로 형성하는 단계;상기 제2금속막 및 유전체막을 식각하여 캐패시터 상부전극을 형성하는 단계; 및상기 제1금속막을 식각하여 캐패시터 하부전극을 형성하는 단계를 포함하는 것을 특징으로 하는 MIM 캐패시터 형성방법.
- 제 1 항에 있어서, 상기 제1금속막의 표면 처리는 플라즈마 처리로 수행하는 것을 특징으로 하는 MIM 캐패시터 형성방법.
- 제 2 항에 있어서, 상기 플라즈마 처리는 N2, O2 및 Ar로 이루어지는 그룹으로부터 선택되는 어느 하나의 가스를 소오스 가스로 사용하는 것을 특징으로 하는 MIM 캐패시터 형성방법.
- 제 2 항 또는 제 3 항에 있어서, 상기 플라즈마 처리는파워를 50∼3000W, 기판 온도를 상온∼400℃로 하는 공정 조건에서 5∼200초 동안 수행하는 것을 특징으로 하는 MIM 캐패시터 형성방법.
- 제 1 항에 있어서, 상기 표면 처리는 극미세 슬러리(slurry)를 이용한 CMP 공정으로 수행하는 것을 특징으로 하는 MIM 캐패시터 형성방법.
- 제 5 항에 있어서, 상기 CMP 공정 후, HF 가스로 세정하는 단계를 더 포함하는 것을 특징으로 하는 MIM 캐패시터 형성방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020010081671A KR100772075B1 (ko) | 2001-12-20 | 2001-12-20 | 엠아이엠 캐패시터 형성방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020010081671A KR100772075B1 (ko) | 2001-12-20 | 2001-12-20 | 엠아이엠 캐패시터 형성방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20030050949A KR20030050949A (ko) | 2003-06-25 |
KR100772075B1 true KR100772075B1 (ko) | 2007-11-01 |
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Application Number | Title | Priority Date | Filing Date |
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KR1020010081671A KR100772075B1 (ko) | 2001-12-20 | 2001-12-20 | 엠아이엠 캐패시터 형성방법 |
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KR (1) | KR100772075B1 (ko) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101004692B1 (ko) * | 2003-12-11 | 2011-01-04 | 주식회사 하이닉스반도체 | 강유전체 메모리 소자의 캐패시터 제조방법 |
US10497773B2 (en) * | 2014-03-31 | 2019-12-03 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method to improve MIM device performance |
KR101813374B1 (ko) | 2016-05-13 | 2017-12-28 | 삼성전기주식회사 | 박막 커패시터 및 그 제조방법 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06130423A (ja) * | 1992-10-20 | 1994-05-13 | Ricoh Co Ltd | Mim素子の製造方法 |
US5985730A (en) * | 1997-06-11 | 1999-11-16 | Hyundai Electronics Industries Co., Ltd. | Method of forming a capacitor of a semiconductor device |
KR20010004967A (ko) * | 1999-06-30 | 2001-01-15 | 김영환 | 반도체 소자의 캐패시터 제조 방법 |
KR20010065179A (ko) * | 1999-12-29 | 2001-07-11 | 박종섭 | 반도체 소자의 캐패시터 제조방법 |
-
2001
- 2001-12-20 KR KR1020010081671A patent/KR100772075B1/ko active IP Right Grant
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06130423A (ja) * | 1992-10-20 | 1994-05-13 | Ricoh Co Ltd | Mim素子の製造方法 |
US5985730A (en) * | 1997-06-11 | 1999-11-16 | Hyundai Electronics Industries Co., Ltd. | Method of forming a capacitor of a semiconductor device |
KR20010004967A (ko) * | 1999-06-30 | 2001-01-15 | 김영환 | 반도체 소자의 캐패시터 제조 방법 |
KR20010065179A (ko) * | 1999-12-29 | 2001-07-11 | 박종섭 | 반도체 소자의 캐패시터 제조방법 |
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KR20030050949A (ko) | 2003-06-25 |
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