KR100759258B1 - Manufacturing method for semiconductor device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, comprising a conductive layer having free electrons rich in valence bands due to unsaturated covalent bonds on the entire surface of a substrate during a dry etching process such as plasma formation or a process such as CVD or PVD. Coating and subsequent processing to prevent local charging due to non-uniformity of plasma or gate oxide film damage due to generation of electron-hole pairs on the substrate by broadband energy generated by the plasma to prevent process yield and device operation. There is an advantage to improve the reliability.

Description

Manufacturing method for semiconductor device

1 is a schematic diagram for explaining a local charging phenomenon by the plasma according to the prior art.

2 is an energy band diagram near a gate oxide film.

3 is an energy band diagram of a silicon substrate.

4A to 4C are manufacturing process diagrams of a semiconductor device according to an embodiment of the present invention.

<Explanation of Signs of Major Parts of Drawings>

10,20: semiconductor substrate 12: field oxide film

14 contact 21 gate oxide film

22: gate electrode 23: source / drain region

25: first interlayer insulating film 27,35: contact plug

29 metal wiring 31 second interlayer insulating film

33: charge prevention conductive layer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device. In particular, a metal film is formed on an interlayer insulating layer during a dry etching process, and an etching process is performed to prevent substrate damage due to plasma to improve process yield and device operation reliability. It relates to a method for manufacturing a semiconductor device that can be.

Recently, semiconductor devices have been highly integrated to accommodate more circuit elements in a smaller area and to process and store more information. The high integration of the semiconductor device depends on the precise formation of circuit elements and wirings for connecting the circuit elements in a narrow area as much as possible. In order to precisely form such circuit elements and wirings, the semiconductor device is used as an etching barrier in an etching process. The photoresist pattern to be formed should be finely formed.

In addition, as semiconductor devices have been miniaturized, dry etching using plasma rather than wet etching is used in a patterning process. Plasma dry etching can form a fine pattern, but there is a problem that the semiconductor substrate is damaged by plasma.

1 is a schematic diagram for explaining substrate damage caused by a conventional plasma. When the field oxide film 12 and the contact 14 are formed on the semiconductor substrate 10, the semiconductor substrate 10 is formed on the semiconductor substrate 10 by non-uniform plasma. To form a local potential difference.

In the gate electrode patterning process, as shown in FIG. 2, such a potential difference is caused by charge being induced to the substrate to induce electron-hole pairs in an allowable region as shown in the energy band in which the gate oxide film is formed on the semiconductor substrate. This damages the threshold voltage and saturation current characteristics.

In addition, when ultraviolet rays, visible rays, infrared rays, and the like having a broadband wavelength of 150 nm to 800 nm generated inside the plasma are transferred to the semiconductor substrate, silicon electron-hole pairs are formed to form unwanted charged particles. As can be seen from the energy band diagram, the allowable energy band of silicon is about 1.1 eV, and valence electrons are easily excited as conduction bands even at the energy of room temperature. There is another problem that deteriorates the operating characteristics of.

In addition, in the device using 0.15µm fine line width, the gate oxide film is thinned to about 20 ~ 25Å in order to reduce the operating voltage and the fast operation speed of the transistor. Since the operating voltage is much lower than the required threshold voltage, all charged particles are treated as a liquid component, but when reliability is ensured, a gate oxide film having the above thickness can be actually used. There is a problem in that the thin gate oxide film is more likely to be damaged by charging damage due to non-uniform plasma or electron-hole pair formation of the substrate by electromagnetic waves.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to use almost all wavelength bands generated in plasma by using unsaturated covalent bonds in which abundant free electrons are partially filled in the valence band of a conductive material. Absorption of electromagnetic waves to prevent charging damage due to non-uniformity of plasma during plasma dry etching process, and local charging by electrons of high energy state generated in plasma is uniformly maintained on the front of the wiper, resulting in process yield and device operation It is to provide a method of manufacturing a semiconductor device that can improve the reliability of the.

Features of the semiconductor device manufacturing method according to the present invention for achieving the above object,

In the method of manufacturing a semiconductor device using a plasma,

In the step before the process of forming a plasma on the semiconductor substrate by proceeding the step of the step on the semiconductor substrate to form a conductive layer for preventing charge on the upper portion of the semiconductor substrate and proceeds to the subsequent process.

In addition, another aspect of the present invention is a method of manufacturing a semiconductor device using a plasma,

Forming an interlayer insulating film and a charge preventing conductive layer on a semiconductor substrate having a predetermined lower structure;

Forming a contact hole by removing a portion of the conductive layer and the interlayer insulating film, which are intended to be contact holes, by dry etching;

And forming a contact plug to fill the contact hole.

In addition, the plasma generation process is a dry etching process, or one of the CVD or PVD process, the conductive layer is formed to a thickness that can be an antireflection film during the photosensitive film exposure process, and the conductive layer is Ti / TiN, TiN / It is formed of a dual-layer structure of Ti / TiN and Ti / TiN, and a material in which part or all of the conductive layer is replaced by Ta instead of Ti, and the contact plug is formed on the entire surface by etching Ti / TiN / W and etching the CMP. It is another feature that it is formed by a process or formed of aluminum alloy or copper alloy instead of W.

Hereinafter, a method of manufacturing a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

4A through 4C are diagrams illustrating a manufacturing process of a semiconductor device according to an embodiment of the present invention.

First, a MOSFET including a gate oxide film 21, a gate electrode 22, and a source / drain region 23 is formed on a silicon wafer semiconductor substrate 20, and the first interlayer insulating film 25 is formed on all surfaces of the structure. And a contact plug 27 and a metal wiring 29 are formed. (See FIG. 4A).

Then, the second interlayer insulating film 31 and the charge preventing conductive layer 33 are sequentially formed on the entire surface of the structure, and the conductive layer 33 and the second interlayer insulating film 31 on the metal wiring 29 are sequentially formed. After etching to form a contact hole, the contact plug 35 filling the contact hole is formed. Dry etching is performed during the contact hole etching process, in which the conductive layer 33 prevents charge damage due to plasma or local charging damage due to silicon excitation.

The conductive layer 33 is formed of a Ti / TiN, TiN / Ti / TiN laminated structure or a double stacked structure of Ti / TiN, and TiN is formed to a thickness that can be an antireflection film during the photosensitive film exposure process. Instead, use a material substituted with some or all of Ta.

In addition, the etching process for forming the contact hole is dry etching by combining a gas containing chlorine, fluorine, oxygen, nitrogen, bromine, fluorinated gas, or the like, or a chlorine and fluorine-containing gas such as Cl2 in a metal-only etching apparatus. After the conductive layer 33 is removed with BCl 3, SF 6, etc., the insulating layer may be etched. The contact plug 35 may be formed by the entire surface etching or CMP process after Ti / TiN / W stacking or aluminum alloy instead of W. It can also be formed from a copper alloy, and wiring can also be formed together. (See FIGS. 4B and 4C).

In the above, only the dry etching process is exemplified, but if the conductive layer can be applied in a plasma process such as chemical vapor deposition (hereinafter referred to as CVD) or physical vapor deposition (hereinafter referred to as PVD). Of course, the invention can be used.

As described above, the method of manufacturing a semiconductor device according to the present invention includes free electrons abundant in the valence band due to unsaturated covalent bonds on the entire surface of the substrate during a dry etching process such as plasma formation or a process such as CVD or PVD. The process is performed by applying a conductive layer to the conductive layer, and then performing a subsequent process to prevent local charging due to non-uniformity of the plasma or to prevent gate oxide film damage due to the generation of electron-hole pairs in the substrate by the radiation energy of the broadband wavelength generated in the plasma. And there is an advantage that can improve the reliability of the device operation.

Claims (10)

In the method of manufacturing a semiconductor device using a plasma, In the step before the process of forming a plasma on the semiconductor substrate by performing a predetermined process on the semiconductor substrate, a charge preventing conductive layer having a double laminated structure of Ti / TiN, TiN / Ti / TiN, Ti / TiN is formed on the semiconductor substrate. Forming and proceeding to a subsequent process. The method of claim 1, The plasma generation process is a dry etching process, or a method of manufacturing a semiconductor device, characterized in that one of the CVD or PVD process. The method of claim 1, The conductive layer is a manufacturing method of a semiconductor device, characterized in that to form a thickness that can be an anti-reflection film during the photosensitive film exposure process. delete The method of claim 1, Method for manufacturing a semiconductor device, characterized in that for the conductive layer using a material in which part or all of Ta is replaced with Ti. In the method of manufacturing a semiconductor device using a plasma, Forming an interlayer insulating film and a conductive layer for preventing charges formed of a dual lamination structure of Ti / TiN, TiN / Ti / TiN, Ti / TiN on a semiconductor substrate having a predetermined substructure; Forming a contact hole by removing a portion of the conductive layer and the interlayer insulating film, which are to be contact holes, by dry etching; And forming a contact plug to fill the contact hole. The method of claim 6, The conductive layer is a manufacturing method of a semiconductor device, characterized in that to form a thickness that can be an anti-reflection film during the photosensitive film exposure process. delete The method of claim 6, Method for manufacturing a semiconductor device, characterized in that for the conductive layer using a material in which part or all of Ta is replaced with Ti. The method of claim 6, The contact plug is a semiconductor device manufacturing method, characterized in that formed by the entire surface etching or CMP process after Ti / TiN / W laminated on the front surface, or formed of aluminum alloy or copper alloy instead of W.

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