KR100700265B1 - Fabricating method of image sensor - Google Patents

Abstract

The present invention relates to an image sensor, and more particularly, to provide a method for manufacturing an image sensor suitable to prevent deterioration of characteristics of an image sensor and to improve capacitance. The present invention provides a pixel array region and a peripheral circuit region. A method of manufacturing an image sensor, the method comprising: forming an insulating film for a spacer along a profile of a first conductive semiconductor layer having a gate electrode formed thereon; Forming a spacer on the sidewall of the gate electrode by etching the entire surface of the insulating layer; Performing ion implantation to form a first impurity region for a photodiode of a first conductivity type aligned with the spacer of the pixel array region and extending from a surface of the semiconductor layer; Forming a source / drain in the peripheral circuit region by performing an ion implantation and heat treatment process; Removing the spacers; And forming a second impurity region for a photoconductor of a second conductivity type extending from the first impurity region to a lower portion of the semiconductor layer by performing an ion implantation and heat treatment process.

Spacers, wells, condensing areas, capacitances, ion implantation.

Description

Fabrication method of image sensor             

1A to 1B are cross-sectional views showing a general semiconductor manufacturing process sequence of a portion for determining electrical characteristics in forming a transistor;

2A through 2C are cross-sectional views illustrating an image sensor manufacturing process according to an embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

20: semiconductor layer

21, 22: gate electrode

23: first insulating film for the spacer

PD: Photodiode

Tx: Transfer Gate

Fox: Field Insulation

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor devices, and more particularly to a method of manufacturing an image sensor.

In general, an image sensor is a semiconductor device that converts an optical image into an electrical signal. In a double charge coupled device (CCD), individual metal-oxide-silicon (MOS) capacitors are very different from each other. A device in which charge carriers are stored and transported in a capacitor while being located in close proximity, and CMOS (Complementary MOS) image sensor is a CMOS technology that uses a control circuit and a signal processing circuit as peripheral circuits. Is a device that employs a switching method that creates MOS transistors by the number of pixels and sequentially detects the output using them.

In the manufacture of such various image sensors, efforts are being made to increase the photo sensitivity of the image sensor, one of which is a condensing technology. For example, a CMOS image sensor is composed of a photodiode for detecting light and a portion of a CMOS logic circuit for processing the detected light into an electrical signal to make data. To increase light sensitivity, the ratio of the photodiode to the total image sensor area is increased. Efforts have been made to increase (usually referred to as Fill Factor).

In particular, the role of the photodiode (hereinafter referred to as PD) is to convert and store the external light into an electrical form, and the performance of the PD is converted to an electrical form by receiving external light and the total amount of electricity that can be stored. It depends on (Charge capacitance). PD can be used even if it is not a junction structure of PN, NP, NPN, PNP or the like, but the depletion region generated during heterojunction is advantageous for the generation and storage of charge. Since the n- region of the PNP structure plays the most important role in converting light into an electrical signal, it is important to properly control the diffusion distance (Rp) due to deep ion implantation.

The charge stored in the PD moves to the floating diffusion region through the gate electrode (transfer gate), and both sides of the gate electrode have a structure in which the P0 region and the n- region of the PD are source / drain, respectively. Since the electrical connection between n and n- affects the transfer efficiency of the transfer gate, n-ion implantation is performed before the spacer formation so that the n- ion implantation is almost exactly aligned with the bottom of the spacer to improve the transfer efficiency. On the other hand, since the channel and n-Rp should not be too far, the transfer efficiency of the transfer gate changes according to the Rp of n-.

Therefore, since the two elements are in a trade-off relationship with each other, the n-ion implantation process must be performed twice to improve both of the storage capacity and the transmission efficiency.

1A to 1B are cross-sectional views showing a general semiconductor manufacturing process sequence of portions for determining electrical characteristics in forming transistors.

As shown in FIG. 1A, the field insulating film 11 is locally formed on the substrate 10, and then a P or N type well 12 is formed. Subsequently, a gate electrode 13 made of polysilicon or the like and a hard mask 14 are formed on the well 12 region. Subsequently, a low concentration N-type or P-type region 16 for forming a light condensing region, such as a photodiode, is formed using the ion implantation mask 15, which is aligned and formed by the gate electrode 13. .

Next, as shown in FIG. 1B, after removing the ion implantation mask 15 for forming the light converging region, the spacer 17 is formed on the sidewall of the gate electrode 13, and then the ion implantation mask for source / drain formation. (18) is used to form high concentration N + or P + region 19.

As described above, the source / drain of the light condensing region and the LDD structure is formed before and after the formation of the spacer 17, based on which the main parts of the image sensor are formed in the same manner. However, the same applies to other devices, but as the degree of integration increases, the area of the condensing area is also reduced in the image sensor, and thus, the condensation efficiency is inevitably reduced. In addition, the importance of the spacer has become a standard for forming a light collecting area in an image sensor as in a general transistor. However, the formation of the condensed area after the formation of the spacer is condensed by the condensation and movement to the electrical signal is considered as another matter to be improved at present.

The present invention proposed to solve the problems of the prior art as described above, an object of the present invention is to provide a method for manufacturing an image sensor suitable for preventing the deterioration of characteristics of the image sensor and improve the capacitance.

According to an aspect of the present invention, there is provided a method of manufacturing an image sensor including a pixel array region and a peripheral circuit region, the method including: forming an insulating film for a spacer along a profile of a first conductive semiconductor layer having a gate electrode formed thereon; ; Forming a spacer on the sidewall of the gate electrode by etching the entire surface of the insulating layer; Performing ion implantation to form a first impurity region for a photodiode of a first conductivity type aligned with the spacer of the pixel array region and extending from a surface of the semiconductor layer; Forming a source / drain in the peripheral circuit region by performing an ion implantation and heat treatment process; Removing the spacers; And forming a second impurity region for a photoconductor of a second conductivity type extending from the first impurity region to a lower portion of the semiconductor layer by performing an ion implantation and heat treatment process.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. 2A to 2C are cross-sectional views illustrating an image sensor manufacturing process according to an embodiment of the present invention.

First, as shown in FIG. 2A, a field insulating film (hereinafter referred to as Fox) is locally formed in the semiconductor layer 20, and then gate electrodes 21 and 22 are formed in a region away from Fox. Likewise, in the pixel array region, a transfer gate (hereinafter referred to as Tx) is formed, and in this case, in the peripheral circuit region where the PMOS or NMOS is formed, the gate electrodes of the PMOS transistor and the NMOS transistor are each N well ( N-Well and P-Well regions.

Subsequently, an oxide-based spacer first insulating film 23 is formed on the entire structure at a thickness of 20 GPa to 200 GPa, and then a second insulating film 24 for spacers is formed using a nitride film or an oxynitride film at a thickness of 1000 GPa to 3000 GPa. ).

Next, as shown in FIG. 2B, the spacers 23 and 24 are formed on the sidewalls of the gate electrodes 21 and 22 by performing a dry front etching process, and then the source / drains of the PMOS and NMOS transistors are formed. A series of mask and ion implantation processes are used to form the source / drain of P + and n +.

Subsequently, a shallow high concentration P0 region is formed through ion implantation to form a condensing region, that is, a photodiode (hereinafter referred to as PD), which is aligned with the spacer 24 and lowered from the surface of the semiconductor layer 20. After forming the extended P0 region, the sensing expansion region (hereinafter referred to as FD) is formed.

Next, as shown in FIG. 2C, the nitride spacer-based second spacer 23 is removed by wet etching, and then a series of ion implantation processes for LDD formation are performed in the PMOS and NMOS formation regions. Subsequently, an n-region is formed at a deep level below the P0 region to form a PD of the pixel array region, that is, an n-region extended from the P0 region to the lower portion of the semiconductor layer 20 is formed. PD having a P / N / P structure composed of n- and P-type semiconductor layers 20 is formed.

At this time, the heat treatment process is performed after ion implantation. In the conventional case, the n-region of the PD was first formed, and then the NMOS and PMOS source / drain formation processes were performed after the spacer formation. The n-region of is subjected to a plurality of heat treatment processes to reduce the uniformity of the interior, but in the present invention is formed after forming all the spacers are subjected to one heat treatment to prevent deterioration of the characteristics of the PD, the second spacer ( By removing the 24, only the thin first spacer 23 remains on the sidewalls of the gate electrodes 21 and 22, so that the area of the PD region can be made larger, thereby ultimately increasing the capacitance of the PD.

On the other hand, a low-temperature oxide film (hereinafter referred to as LTO) may be used as the insulating film for the second spacer instead of the above-described oxynitride film or nitride film, which has an etching selectivity ratio of 50: 1 or more with the lower oxide film during wet etching. Because you can get.

The present invention made as described above, the heat treatment process applied to the n- region can be reduced at once, thereby preventing the deterioration of characteristics in the condensing region due to the heat treatment, as well as the PD region according to the spacer removal. It can be seen through the embodiment that can be formed wider to increase the capacitance.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

The present invention described above can increase the capacitance and at the same time prevent the deterioration of characteristics due to heat treatment, ultimately can be expected to have an excellent effect of improving the yield and electrical characteristics of the image sensor at the same time.

Claims (6)

In the manufacturing method of an image sensor having a pixel array region and a peripheral circuit region, Forming an insulating film for a spacer along a profile of the first conductive semiconductor layer on which the gate electrode is formed; Forming a spacer on the sidewall of the gate electrode by etching the entire surface of the insulating layer; Performing ion implantation to form a first impurity region for a photodiode of a first conductivity type aligned with the spacer of the pixel array region and extending from a surface of the semiconductor layer; Forming a source / drain in the peripheral circuit region by performing an ion implantation and heat treatment process; Removing the spacers; And Performing an ion implantation and heat treatment process to form a second impurity region for a photodiode of a second conductivity type extending from the first impurity region to the lower portion of the semiconductor layer Image sensor manufacturing method comprising a. The method of claim 1, The insulating film comprises a nitride film, an oxynitride film or a low temperature oxide film. The method of claim 1, And the insulating film is formed to a thickness of 1000 kV to 3000 kV. The method of claim 2, And the insulating film has a laminated structure having an oxide film under the insulating film. The method of claim 4, wherein A method for manufacturing a two-edge sensor, wherein the oxide film is formed to a thickness of 20 kPa to 200 kPa. The method of claim 1, And the first conductive type is P type and the second conductive type is N type.

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