KR20040003941A - Image sensor with improved charge capacity and fabricating method of the same - Google Patents

Abstract

PURPOSE: An image sensor and a method for manufacturing the same are provided to enhance charge capacity of a photodiode in a unit pixel without using an additional process. CONSTITUTION: The first impurity region(n-) is formed on a semiconductor layer(30). The first impurity region(n-) has the first convex-concave shape(34a,34b) at the contact interface with the semiconductor layer(30). The second impurity region(p0) is formed on the first impurity region(n-). Also, the second impurity region(p0) has the second convex-concave shape(38a,38b) at the contact interface with the first impurity region.

Description

Image sensor with improved charge capacity and fabricating method of the same}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image sensor, and more particularly, to an image sensor capable of improving a charge capacity of a photodiode and a manufacturing method thereof.

In general, an image sensor is a semiconductor device that converts an optical image into an electrical signal. In a double charge coupled device (CCD), individual metal-oxide-silicon (MOS) capacitors are very different from each other. A device in which charge carriers are stored and transported in a capacitor while being located in close proximity, and CMOS (Complementary MOS) image sensor is a CMOS technology that uses a control circuit and a signal processing circuit as peripheral circuits. Is a device that employs a switching method that creates MOS transistors by the number of pixels and sequentially detects the output using them.

In the manufacture of such various image sensors, efforts are being made to increase the photo sensitivity of the image sensor, one of which is a condensing technology. For example, a CMOS image sensor is composed of a photodiode for detecting light and a portion of a CMOS logic circuit for processing the detected light into an electrical signal to make data. To increase light sensitivity, the ratio of the photodiode to the total image sensor area is increased. Efforts have been made to increase (usually referred to as Fill Factor).

FIG. 1 is a circuit diagram of a unit pixel of a conventional CMOS image sensor, and a submicron CMOS epi process is applied to increase sensitivity and reduce cross talk effect between unit pixels.

The unit pixel is composed of one low voltage buried photodiode and four NMOS transistors. Unlike the conventional photo gate structure, the low voltage buried photodiode has a polysilicon with a light sensing region. Not only is it covered, it has excellent light sensitivity for short wavelength blue light as well as increase the depth of depletion in the light sensing area, so the light sensitivity for long wavelength red or infrared light is also excellent. On the other hand, the low-voltage buried photodiode structure allows photogenerated charges in the photosensitive area to be completely transported to the Floating Sensing Node, which significantly increases the charge transfer efficiency. There are advantages to it.

In addition, the transfer gate (Tx), that is, the gate electrode and the reset gate (Rx), which transfer photocharges among the four transistors, is caused by a voltage drop due to a positive threshold voltage. In order to prevent the loss of charge transport efficiency, the NMOS transistor has a negative threshold voltage. In this case, the N-LDD ion implantation is omitted so that the overlap capacitance between the gate electrode and the reset gate and the floating sensing node is reduced. (Overlap Capacitance) can be lowered, so that the potential change of the floating sensing node can be amplified according to the amount of charge carried. (△ V-ΔQ / C)

On the other hand, the drive gate (DriveGate, Sx) that serves as a source follower is composed of a general submicron NMOS transistor. This structure was constructed with minimal changes to the submicron CMOS Epi process, and the thermal cycle was designed to be completely unchanged. On the other hand, a color filter array composed of red, green, blue, or yellow, magenta, cyan, and the like on a unit pixel array for implementing a color image. (Color Filter Array) The process of forming.

The operation principle of obtaining an output from such a unit pixel is as follows.

end. Turn off Tx, Rx, Sx. The low voltage buried photodiode is then fully depletion.

I. Photogenerated charge is collected in a low voltage buried photo diode.

All. After a proper integration time, the Rx is turned on to reset the floating sensing node first.

la. The unit pixel is turned on by turning on Sx.

hemp. Measure the output voltage (V1) of the source follower buffer. This value simply means the CD level shift of the Floating Sensing Node (FD).

bar. Turn on Tx.

four. All photogenerated charges are shipped in FD.

Ah. Turn off Tx.

character. Measure the output voltage (V2) of the source follower buffer.

car. The output signals V1-V2 are the result of the photocharge transport resulting from the difference between V1 and V2 and are pure signal values without noise. This method is called CDS (Corelated Double Sampling).

Ka. Repeat the process of 'a' to 'tea'. However, the low voltage buried photodiode is fully depleted during the 'dead' process.

2 is a cross-sectional view showing an image sensor according to the prior art.

Referring to FIG. 2, a photodiode including a P-type impurity region P0 and a N-type impurity region n− for a photodiode in the semiconductor layer 10 is referred to as ion implantation or the like. The P-type channel stop region (hereinafter referred to as CST) is formed to prevent cross talk due to data interference between neighboring PDs. Impurity ions are implanted into the bottom of the field insulating film Fox. In addition, a transfer gate (hereinafter referred to as Tx) is formed on the semiconductor layer 10 in which one side is in contact with the PD, and an FD is formed in contact with the other side of the Tx.

Here, the semiconductor layer 10 uses a high concentration of a P + + layer and a P-type epi layer, that is, a P-Epi layer is laminated, and the P-Epi layer is used for reducing crosstalk and improving photosensitive characteristics as is well known. do.

In other words, the photodiode of the image sensor described above plays a role of converting an external optical signal into an electrical signal, and the maximum charge capacity that can be accommodated in the photodiode itself is the size and junction of the photodiode itself. It is related to ion implantation conditions for That is, since the semiconductor layer has a flat capacitor configuration, the area of the photodiode itself decreases proportionally as the size of the pixel decreases, so that the line width decreases, so that the basic dynamic area of the image sensor is reduced. There is a problem of reducing the range and deteriorating the saturation characteristic. In addition, there may be a method of tuning the ion implantation process for forming a photodiode to solve this problem, but it is different from other variables such as charge transfer efficiency and dark signal characteristics. Since the trade-off relationship, the limit is being revealed.

That is, in order to secure the above-mentioned dynamic region, the charge capacity of the photodiode should be increased or the capacity of the sensing diffusion region should be reduced.

In addition, in the conventional process, high energy is used to increase the N-type impurity region of the photodiode. At this time, if the thickness of Tx is thin, the doping is caused under the channel of Tx, which causes channeling problem. Capping A further Tetra Ethyl Ortho Silicate (TEOS) film is formed on Tx to prevent this channeling.

When using such a TEOS film, as well as the addition of the deposition process, the TEIS film is first removed after removing the gate in the T 를 etching process, there is a problem that the process is complicated and difficult to control the process itself.

The present invention proposed to solve the problems of the prior art as described above, to provide an image sensor and a manufacturing method that can increase the dynamic range by increasing the charge capacity of the photodiode in the unit pixel without additional processing The purpose is.

1 is a unit pixel circuit diagram of a conventional CMOS image sensor;

2 is a cross-sectional view showing an image sensor according to the prior art,

3A to 3C are cross-sectional views illustrating an image sensor manufacturing process according to an embodiment of the present invention;

4 is a cross-sectional view showing an image sensor of the present invention;

5A to 5C are plan views showing masks for forming an insulating film pattern of the present invention.

Explanation of symbols on the main parts of the drawings

30 semiconductor layer 31 field insulating film

32: gate insulating film 33: gate electrode conductive film

34: n-region 36: spacer

38: P0 region 34a, 34b, 38a, 38b: unevenness

39: sensing diffusion area

In order to achieve the above object, the present invention, the first conductive semiconductor layer; A first impurity region formed under the semiconductor layer and having a second conductivity type in the contact interface with the semiconductor layer; And a second impurity region for a photodiode of a first conductivity type formed on a surface of the semiconductor layer above the first impurity region and having a second unevenness at a contact interface with the first impurity region. do.

In addition, to achieve the above object, the present invention comprises the steps of forming a gate electrode on the first conductive semiconductor layer; Forming an insulating film along the entire profile where the gate electrode is formed; Selectively etching the insulating film to form an insulating film pattern in which the insulating film is locally left on the semiconductor layer where the photodiode is to be formed and the gate electrode; Ion implantation is performed to form a first impurity region for a photodiode of a second conductivity type in the semiconductor layer aligned on one side of the gate electrode, and the profile of the insulating film pattern is transferred to the first impurity region. Allowing the interface to be uneven; And implanting ions into the first impurity region to form a second impurity region for a photodiode of a first conductivity type, wherein the profile of the insulating film pattern is transferred so that the interface with the first impurity region is uneven. It provides an image sensor manufacturing method comprising a.

According to the present invention, when the n-region and the P0 region of the photodiode (low voltage buried photodiode) are formed, the doped region is formed by using an insulating film to increase the charge capacity according to the increase of the area and edge capacity of the photodiode. It prevents the saturation signal from deteriorating due to the high integration of the photodiode while ensuring the dynamic area of the sensor.In this case, an insulating film is left on the gate electrode to prevent channeling through the gate electrode when N-type impurity ions are injected. Capping TEOS film formation process can be omitted.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. 3A to 3C are cross-sectional views illustrating a manufacturing process of an image sensor according to an embodiment of the present invention, FIG. 4 is a cross-sectional view illustrating an image sensor of the present invention, and FIGS. 5A to 5C are views of the present invention. Is a plan view showing a mask for forming an insulating film pattern.

Referring to FIG. 4, the image sensor of the present invention includes a P-type semiconductor layer 30 in which a high concentration P ++ substrate and a P epi layer are stacked, a field insulating film 31 locally formed on the semiconductor layer 30, and a field. A gate electrode formed on the semiconductor layer 30 separated from the insulating film 31 and including a gate insulating film 32, a conductive film 33 for a gate electrode, and a spacer 36 formed on a sidewall thereof, for example, a transfer gate, and a semiconductor; An n-type impurity region (hereinafter referred to as n-region) for an n-type photodiode formed under the layer 30 and having concave-convexities 34a and 34b in contact with the semiconductor layer 30, and n-region. (34) P-type impurity regions (38, hereinafter referred to as P0 regions) formed on the upper surface of the semiconductor layer 30, and sensing diffusion regions (39, hereinafter referred to as n + regions), which are high concentration N-type impurity regions, are provided. The area of the photodiode PD is formed by the unevenness 38a and 38b because the P0 region 38 has unevenness 38a and 38b at the contact interface with the n-region 34. This increases, and is a structure that can increase the capacity.

As described above, the present invention can secure the dynamic area of the image sensor by increasing its area and charge capacity as compared to the planar photodiode in the limited pixel area, and the saturation signal due to the reduction of the area of the photodiode due to high integration The fall can be prevented.

The manufacturing process of the above-described image sensor will be described later with reference to FIGS. 3A to 3C.

First, as shown in FIG. 3A, a field insulating film 31 having a shallow trench isolation (STI) or a local oxide of silicon (LOCOS) structure is formed locally on the P-type semiconductor layer 30. 30) is a layer in which a high concentration of the P + + layer and the P- epi layer is laminated, abbreviated as a semiconductor layer 30 for the sake of simplicity of the drawings.

Subsequently, a gate electrode including the gate insulating film 32 and the gate conductive film 33 is formed on the semiconductor layer 30.

Subsequently, the insulating film 40a is formed along the profile in which the gate electrode is formed so as to have a thickness of 1000 GPa to 1500 GPa.

It is preferable to use an insulating material including an oxide film as the insulating film 40a, and to form an N-type and a P-type impurity region for a subsequent photodiode to play an important role of having the uneven portion transferred by the pattern.

Next, as shown in FIG. 3B, a photoresist is applied on the insulating film 40a, and then the photodiode forming region 41 is subjected to an exposure and development process using a mask (not shown) for etching the insulating film 40a. A photoresist pattern 42 for locally exposing the insulating film 40a is formed on the top and the gate electrode, and then the insulating film 36 is selectively etched using the photoresist pattern 42 as an etching mask. 30) An insulating film pattern 40b exposing the surface is formed.

Here, the insulating layer pattern 40b not only transfers the bend to the lower portion when the ion is implanted in the photodiode formation region 41, but also channeling the ion implantation of high energy to form an N-type impurity region on the gate electrode. Serves to prevent.

Here, the aforementioned mask uses a stripe shape or a lattice shape shown in FIGS. 5A to 5C, and the reference numeral 'low' denotes a portion where the insulating film 40a is left to form the insulating film pattern 40b. 'I' is a portion where the insulating film 36 is removed.

Next, as shown in FIG. 3C, the insulating layer pattern 40b remaining on the gate electrode is formed on the semiconductor layer 30 on the photodiode forming region 41 by removing the photoresist pattern 42. The ion implantation mask 43 is formed. Subsequently, an n-region 34 for photodiode aligned with the gate electrode and in contact with the field insulating film 31 is formed using an ion implantation mask. At this time, the profile of the insulating film pattern 40b is transferred to the lower portion of the semiconductor layer 30 to have the unevenness 34a and 34b at the contact interface with the lower semiconductor layer 30, that is, the interface with the semiconductor layer 34 Form to be uneven. At this time, channeling through the gate electrode does not occur by the insulating film pattern 40b on the gate electrode.

Subsequently, ion implantation is performed to form the P0 region 38 on the surface of the semiconductor layer 30 above the n-region 34 so that the profile of the insulating film pattern 40b is transferred to the lower portion of the semiconductor layer 30. The interface between the P0 region 38 and the n-region 34 is formed so as to have unevenness, that is, having unevenness 38a, 38b. Therefore, it is preferable to use high concentration and low energy.

As described above, the n-region 34 and the P0 region 38 are formed by overlapping the same insulating layer pattern 40b.

Next, after removing the ion implantation mask 43 and the insulating film pattern 40b, the high concentration N-type sensing diffusion regions 39 and n + are formed, thereby completing the image sensor shown in FIG. 4.

According to the present invention, the interface between the P0 region and the n-region of the photodiode and the interface of the n-region and the semiconductor layer are uneven, thereby increasing the surface area of the photodiode and preventing the reduction of the saturation signal due to the high integration, and the charge The embodiment has been found that the dynamic area can be secured by increasing the capacity, and the channeling through the gate can be prevented without a separate TEOS film formation process during the ion implantation for forming the n-region.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

The present invention described above can improve the saturation signal characteristics and dynamic region of the image sensor by widening the surface area of the photodiode occupied in the unit pixel, and can prevent channeling of the gate electrode, thereby ultimately increasing the performance of the image sensor. You can expect an excellent effect that can be improved.

Claims (11)

A first conductive semiconductor layer; A first impurity region formed under the semiconductor layer and having a second conductivity type in the contact interface with the semiconductor layer; And A second impurity region for a photodiode of a first conductivity type formed on a surface of the semiconductor layer above the first impurity region and having a second unevenness at a contact interface with the first impurity region; Image sensor comprising a. The method of claim 1, And the first unevenness and the second unevenness are formed to overlap each other. The method of claim 1, And a gate electrode formed on the semiconductor layer in contact with the first impurity region. The method of claim 1, The semiconductor layer, A first conductive substrate; And Epi layer of the first conductivity type on the substrate Image sensor comprising a. The method according to claim 1 or 4, The first conductive type is a P-type, the second conductive type is an image sensor manufacturing method, characterized in that the N-type. Forming a gate electrode on the first conductive semiconductor layer; Forming an insulating film along the entire profile where the gate electrode is formed; Selectively etching the insulating film to form an insulating film pattern in which the insulating film is locally left on the semiconductor layer where the photodiode is to be formed and the gate electrode; Ion implantation is performed to form a first impurity region for a photodiode of a second conductivity type in the semiconductor layer aligned on one side of the gate electrode, and the profile of the insulating film pattern is transferred to the first impurity region. Allowing the interface to be uneven; And Ion implantation is performed to form a second impurity region for a photodiode of a first conductivity type in the first impurity region, and the profile of the insulating film pattern is transferred so that the interface with the first impurity region is uneven Image sensor manufacturing method comprising a. The method of claim 6, wherein And the insulating film comprises an oxide film. The method of claim 7, wherein The insulating film is manufactured to an image sensor of claim 1000 to 1500 두께 thickness. The method of claim 6, Forming the insulating film pattern, Applying a photoresist on the insulating film; Forming a photoresist pattern locally exposing the insulating film on the insulating film over the first impurity region through an exposure and shape process using a mask; Etching the insulating layer using the photoresist pattern as an etching mask to expose a surface of the semiconductor layer; And Removing the photoresist pattern Image sensor manufacturing method comprising a. The method of claim 9, The mask is an image sensor manufacturing method comprising a grid or stripe. The method of claim 6, The first conductive type is a P-type, the second conductive type is an image sensor manufacturing method, characterized in that the N-type.