KR100653041B1 - 반도체 패키지 제조용 리드프레임 - Google Patents
반도체 패키지 제조용 리드프레임 Download PDFInfo
- Publication number
- KR100653041B1 KR100653041B1 KR1020050105192A KR20050105192A KR100653041B1 KR 100653041 B1 KR100653041 B1 KR 100653041B1 KR 1020050105192 A KR1020050105192 A KR 1020050105192A KR 20050105192 A KR20050105192 A KR 20050105192A KR 100653041 B1 KR100653041 B1 KR 100653041B1
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor package
- runner
- lead frame
- slot
- curl
- Prior art date
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
Claims (2)
- 반도체 패키지 영역이 유니트 단위를 이루면서 매트릭스 배열로 형성되고, 각 반도체 패키지 영역의 일측쪽 사이드프레임면에는 슬롯이 길다랗게 관통 형성되고, 각 반도체 패키지 영역의 한쪽 모서리 위치에 타원형의 게이트홀이 관통 형성된 구조의 반도체 패키지 제조용 리드프레임에 있어서,상기 게이트홀의 입구쪽 면적을 슬롯홀을 향하여 증대시켜 런너 컬과의 접촉면적을 줄일 수 있도록 한 것을 특징으로 하는 반도체 패키지 제조용 리드프레임.
- 청구항 1에 있어서, 상기 리드프레임의 슬롯 상단끝을 사이드프레임의 상단끝까지 더 연장시켜 런너 컬과의 접촉면적을 더 줄일 수 있도록 한 것을 특징으로 하는 반도체 패키지 제조용 리드프레임.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020050105192A KR100653041B1 (ko) | 2005-11-04 | 2005-11-04 | 반도체 패키지 제조용 리드프레임 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020050105192A KR100653041B1 (ko) | 2005-11-04 | 2005-11-04 | 반도체 패키지 제조용 리드프레임 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR100653041B1 true KR100653041B1 (ko) | 2006-12-01 |
Family
ID=37731797
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020050105192A KR100653041B1 (ko) | 2005-11-04 | 2005-11-04 | 반도체 패키지 제조용 리드프레임 |
Country Status (1)
Country | Link |
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KR (1) | KR100653041B1 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2012142601A3 (en) * | 2011-04-15 | 2013-01-17 | Texas Instruments Incorporated | Lead frame strip for reduced mold sticking during degating |
-
2005
- 2005-11-04 KR KR1020050105192A patent/KR100653041B1/ko active IP Right Grant
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2012142601A3 (en) * | 2011-04-15 | 2013-01-17 | Texas Instruments Incorporated | Lead frame strip for reduced mold sticking during degating |
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