KR100646787B1 - a manufacturing method of a thin film transistor array panel for a liquid crystal display - Google Patents

Abstract

A gate wiring is formed as a double film on the substrate, a gate insulating film, a semiconductor layer, and an ohmic contact layer are sequentially formed thereon, and then data wiring is formed as a double film thereon. The double film of the wiring is a conductive film containing a lower chromium film and an upper aluminum. After depositing a protective insulating film on the data line, a photosensitive film pattern is formed thereon. The protective insulating layer and the gate insulating layer are etched using the photoresist pattern as a mask to form contact holes exposing the gate pad, the drain electrode, and the data pad, respectively, and then the photoresist pattern is reflowed. Next, the aluminum film of the gate pad, the drain electrode, and the data pad is etched entirely using the photoresist pattern as a mask. Next, after removing the photoresist pattern, a pixel electrode, an auxiliary gate pad, and an auxiliary data pad made of a transparent conductive film such as ITO or IZO are formed. In this case, since the undercut that is etched into the lower portion of the protective insulating layer does not occur when the aluminum layer is fully etched, reliability of electrical connection with the transparent conductive layer may be improved in a subsequent process. On the other hand, if the protective insulating film is formed of an organic material having a low dielectric constant and the entire surface of the aluminum film is etched, then the protective insulating film is reflowed to prevent contact between the aluminum film and the transparent conductive film and to reduce flicker and crosstalk.

Double layer, reflow, ITO, IZO, undercut, dielectric constant, flicker, crosstalk

Description

A manufacturing method of a thin film transistor array panel for a liquid crystal display}

1 is a layout view of a thin film transistor substrate for a liquid crystal display according to a first exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view of the thin film transistor substrate illustrated in FIG. 1 taken along the line II-II.

3A is a layout view of a thin film transistor substrate in a first step of manufacturing according to the first embodiment of the present invention,

FIG. 3B is a cross-sectional view taken along line IIIb-IIIb in FIG. 3A;

FIG. 4a is a layout view in the next step of FIG. 3a;

4B is a cross-sectional view taken along line IVb-IVb in FIG. 4A;

FIG. 5A is a layout view of the next step of FIG. 4A;

5B is a cross-sectional view taken along the line Vb-Vb of FIG. 5A;

6A through 6C are cross-sectional views illustrating a thin film transistor substrate in a next step of FIG. 5B according to a process sequence thereof.

FIG. 7A is a layout view illustrating a thin film transistor substrate in the next step of FIG. 6C;

FIG. 7B is a cross-sectional view taken along the line VIIb-VIIb of FIG. 7A;                 

8 is a layout view of a thin film transistor substrate for a liquid crystal display according to a second exemplary embodiment of the present invention.

9 is a cross-sectional view taken along the line VII-VII in FIG. 8,

10A to 10C are cross-sectional views illustrating a thin film transistor substrate according to a second embodiment of the present invention in the order of their processes.

The present invention relates to a method for manufacturing a thin film transistor substrate for a liquid crystal display device.

The liquid crystal display is one of the most widely used flat panel display devices. The liquid crystal display includes two glass substrates on which electrodes are formed and a liquid crystal layer interposed therebetween. A display device for controlling the amount of light transmitted by rearranging them.

It is common to have a thin film transistor for switching a voltage applied to an electrode in one substrate of the liquid crystal display. In addition to the thin film transistor, the thin film transistor substrate includes a gate line and a gate pad that receives a signal from the outside and transfers the signal to the gate line. A data line including a gate line, a data line, and a data pad for receiving a signal from the outside and transferring the signal to the data line are formed.                         

In such a liquid crystal display, the larger the screen, the longer the wiring and the greater the delay of the signal transmitted through the wiring. In order to reduce the delay of the signal, it is desirable to reduce the resistance of the wiring. For this purpose, a method using an aluminum (Al) film or an aluminum alloy (Al alloy) film is known.

However, when the wiring is formed of an aluminum film or an aluminum alloy film, the aluminum film of the drain electrode, the gate pad, and the data pad is oxidized or corroded at a portion in contact with a transparent conductive film such as indium tin oxide (ITO), resulting in poor contact characteristics. There is this. In order to solve this problem, the data line is formed of a double layer of the lower chromium film and the upper aluminum film, and then the aluminum film is etched to avoid contact between the aluminum film and the ITO film. In this case, the aluminum film is under-cut. This occurs and a void is formed, resulting in poor electrical connection between the ITO film and the chromium film.

The technical problem to be achieved by the present invention is to increase the reliability of the electrical connection between the conductive film through the contact hole.

In order to achieve this problem, in the present invention, the wiring is formed of a double layer consisting of an upper layer and a lower layer, a contact hole is formed in a protective insulating layer covering the wiring, and the photoresist pattern is reflowed and the upper layer is etched entirely using the mask.

On the other hand, the protective insulating film may be formed of an organic insulating film having a low dielectric constant, the entire upper film is etched through the contact hole, and the protective insulating film may be reflowed.                     

When manufacturing a thin film transistor substrate for a liquid crystal display device according to the present invention, a gate wiring is first formed on an insulating substrate. Next, a gate insulating film covering the gate wiring is formed and a semiconductor layer is formed thereon. Next, a data line formed of a double layer including a first upper layer and a first lower layer is formed on the semiconductor layer and the gate insulating layer. Next, a protective insulating film is formed on the data wiring and a photosensitive film pattern is formed thereon. Next, the protective insulating film and the gate insulating film are etched using the photoresist pattern as a mask to form contact holes exposing at least a portion of the data line. Next, the photoresist pattern is reflowed to cover a portion of the data line exposed through the contact hole, and the first upper layer exposed through the contact hole is etched. Next, the photoresist pattern is removed and a transparent conductor pattern connected to the data line through the contact hole is formed on the protective insulating layer. In this case, portions exposed through the contact holes in the data line are drain electrodes and data pads, and transparent conductor patterns are pixel electrodes and auxiliary data pads respectively connected to the drain electrodes and data pads.

Here, it is preferable that a 1st upper film consists of a conductive film containing aluminum.

An ohmic contact layer may be further formed between the semiconductor layer and the data line.

On the other hand, in the step of forming the contact hole for exposing the data wiring, it is preferable to form the contact hole for exposing a part of the gate wiring together. In this case, the gate line may be formed of a double layer including a second upper layer and a second lower layer, and the portion exposed through the contact hole of the gate line is a gate pad, and the first line of the gate line is etched when the gate line is etched. It is preferable to etch the two top films together. In this case, the transparent conductor pattern may further include an auxiliary gate pad made of ITO or IZO and covering the gate pad, and the second upper layer is preferably made of a conductive film including aluminum.

In the manufacturing method of the present invention, since a blank is not formed in the lower portion of the insulating layer after the aluminum layer, which is the upper layer of the wiring, is etched, reliability of the electrical connection between the lower layer and the transparent conductor pattern formed thereon can be improved.

According to another embodiment of the present invention, a data line is formed of a double layer including a first upper layer and a first lower layer, and a protective insulating layer having contact holes exposing at least a portion of the data line is formed thereon. Next, after etching the first upper layer exposed through the contact hole, the protective insulating layer is reflowed to contact the first lower layer of the data pad exposed through the contact hole. Next, a transparent conductor pattern is formed over the protective insulating film. In this case, portions exposed through the contact holes in the data line are drain electrodes and data pads, and transparent conductor patterns are pixel electrodes and auxiliary data pads connected to the drain electrodes and data pads, respectively.

In this case, the protective insulating layer is preferably formed of an organic material having a dielectric constant of 4 or less, and when reflowed, the first upper layer is covered with the protective insulating layer. By using such a protective insulating film, the parasitic capacitance formed between the pixel electrode and the data wiring of the upper plate with the protective insulating film interposed therebetween can reduce the occurrence of flicker and crosstalk.

Here, the pixel electrode preferably has an opening pattern, and the protective insulating film may have photosensitivity.

Next, a method of manufacturing a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings so that a person skilled in the art can easily practice the present invention. .

First, a structure of a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention will be described with reference to FIGS. 1 to 2.

1 is a layout view of a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view of the thin film transistor substrate illustrated in FIG. 1 taken along a line II-II.

Gate wirings 20, 21, and 23 formed of a double layer including a lower chromium layer 25 and an upper aluminum layer or an aluminum alloy layer 26 such as an aluminum-neodymium layer are formed on the insulating substrate 10. have. The gate wiring is connected to the gate line 20 extending in the horizontal direction, the gate electrode 21 which is a part of the gate line 20, and the gate line 20 to receive a scan signal from the outside and transmit the scan signal to the gate line 20. The gate pad 23 is included.

A gate insulating film 30 made of silicon nitride (SiN _x ) is formed on the gate wirings 20, 21, and 23 to cover the gate wirings 20, 21, and 23.

A semiconductor layer 41 made of a semiconductor such as amorphous silicon is formed on the gate insulating film 30, and an ohmic contact layer 52 made of a semiconductor such as amorphous silicon doped with n-type impurities is formed on the semiconductor layer 41. 53 is formed on both sides of the gate electrode 21 separately.

On the ohmic contact layers 52 and 53 and the gate insulating film 30, a data line including a double layer including a lower chromium film 65 and an upper aluminum film or an aluminum alloy film 66 such as an aluminum-neodymium film ( 61, 62, 63, 64) are formed. The data line includes a data line 61 extending in the vertical direction, a source electrode 62 which is a part of the data line 61, a drain electrode 63 facing the source electrode 62 around the gate electrode 21, and data. It is connected to the line 61 includes a data pad 64 for receiving an image signal from the outside.

Here, portions of the aluminum layers 26 and 66 of the gate pad 23, the drain electrode 63, and the data pad 64 are removed to expose the lower chromium layers 25 and 65.

A protective insulating film 70 is formed on the data wirings 61, 62, 63, and 64 and the gate insulating film 30, and the protective insulating film 70 has contact holes that expose the drain electrode 63 and the data pad 64, respectively. In addition to having 72 and 74, it also has a contact hole 73 exposing the gate pad 23. Here, the gate pad 23, the drain electrode 63, and the data pad 64 are respectively formed through the contact holes 73, 72, and 74, and the chromium films 25 and 65 and the aluminum films 26 and 66, respectively. ) Are all exposed and form a staircase.

On the protective insulating layer 70, a pixel electrode 80 that receives an image signal from a thin film transistor and forms an electric field together with the electrode of the upper plate is formed. The pixel electrode 80 is made of a transparent conductive material such as ITO or indium zinc oxide (IZO), and is connected to the drain electrode 63 through a contact hole 72 to receive an image signal. On the other hand, an auxiliary gate pad 83 and an auxiliary data pad 84 are formed on the gate pad 23 and the data pad 64 through the contact holes 73 and 74, respectively. , 64) and to protect the pads (23, 64).

Next, a method of manufacturing a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 3A to 7B and FIGS. 1 and 2.

First, as shown in FIGS. 3A and 3B, the lower chromium film 25 and the upper aluminum film or aluminum alloy film 26 are sputtered on the substrate 10 by a thickness of 500 kPa and 2,000 kPa to 2,500 kPa, respectively. Deposition and patterning to form the gate wirings 20, 21, 23.

Next, as shown in FIGS. 4A and 4B, the gate insulating layer 30, the amorphous silicon layer, and the doped amorphous silicon layer are each 1,500 kV to 5,000 kV, 500 kV to 1,500 kPa, and 300 kPa to 600 kPa using chemical vapor deposition. After deposition in turn, the upper two layers are patterned together to form an ohmic contact layer 51 that is not separated from the semiconductor layer 41.

Next, as shown in FIGS. 5A and 5B, the chromium film 65 and the aluminum film or the aluminum alloy film 66 are sputtered on the ohmic contact layer 51 and the gate insulating film 30 by the method of 500 kPa and 2,000 kPa, respectively. It is deposited and patterned in order to a thickness of 2,500 Å in order to form the data wiring (61, 62, 63, 64).

Next, as shown in FIG. 6A, silicon nitride is deposited to a thickness of 1,500 kPa to 4,000 kPa using a chemical vapor deposition method to form a protective insulating film 70, and then a photosensitive film is coated thereon, followed by a drain electrode 63 and a gate pad ( 23 and a photosensitive film pattern 90 exposing the protective insulating film 70 on the data pad 64. Next, the protective insulating film 70 and the gate insulating film 30 are etched together using the photoresist pattern 90 as a mask to form the aluminum films 26 and 66 of the gate pad 23, the drain electrode 63 and the data pad 64. ) To form contact holes 73, 72, 74, respectively.

Next, as illustrated in FIG. 6B, the photoresist pattern 90 is reflowed to cover a portion of the aluminum films 26 and 66 of the gate pad 23, the drain electrode 63, and the data pad 64. ).

Next, as shown in FIG. 6C, the exposed aluminum films 26 and 66 of the gate pad 23, the drain electrode 63, and the data pad 64 are etched using the photoresist pattern 91 as a mask. At this time, by controlling the extent to which the photoresist pattern 91 covers the aluminum layers 26 and 66 through reflow, the aluminum layers 26 and 66 are not excessively etched under the protective insulating layer 70 during the entire etching. desirable.

Next, when the remaining photoresist layer pattern 91 is removed, the chromium layers 25 and 65 of the gate pad 23, the drain electrode 63, and the data pad 64 are exposed as shown in FIGS. 7A and 7B. Stepped contact holes 73, 72, 74 are also formed, which reveal a portion of 26, 66.                     

Next, as shown in FIGS. 1 and 2, the transparent conductive material such as ITO or IZO is deposited and patterned to form the pixel electrode 80, the auxiliary gate pad 83, and the auxiliary data pad 84.

As described above, after the contact holes 73, 72, and 74 are formed in the protective insulating film 70, the photoresist pattern 90 is reflowed to etch the aluminum films 26 and 66 to etch the entire surface. Under cut, which is etched into the lower portion of the protective insulating layer 70, does not occur, so that no gap is formed when the transparent conductive material is formed thereon.

Meanwhile, the protective insulating film 70 may be formed of an organic material having a low dielectric constant, which will be described as a second embodiment of the present invention with reference to FIGS. 8 to 10C.

FIG. 8 is a layout view of a thin film transistor substrate for a liquid crystal display according to a second exemplary embodiment of the present invention, and FIG. 9 is a cross-sectional view taken along the line VIII-VIII of FIG. 8. 10A to 10C are cross-sectional views illustrating a thin film transistor substrate according to a second embodiment of the present invention in the order of their processing. The data wirings 61, 62, 63, and 64 are shown according to a second embodiment of the present invention. The process after formation is shown in order.

8 and 9, in the thin film transistor substrate manufactured according to the second embodiment of the present invention, a portion of the gate pad 23, the drain electrode 63, and the data pad 64 is a first embodiment of the present invention. Is different from The aluminum films 26 and 66 of the gate pad 23, the drain electrode 63 and the data pad 64 are removed through the contact holes 73, 72 and 74 formed in the protective insulating film 70, respectively. The films 25 and 65 are exposed, and the protective insulating film 70 covers the side surfaces of the aluminum films 26 and 66. Therefore, since the auxiliary gate pad 83, the pixel electrode 80, and the auxiliary data pad 84 made of a transparent conductive material such as ITO or IZO do not come into contact with the aluminum layers 26 and 66, the aluminum layer 26, 66 can be prevented from oxidizing.

Next, a method of manufacturing the thin film transistor substrate according to the second embodiment of the present invention will be briefly described.

First, as shown in FIG. 10A, a protective insulating film 70 is formed of an organic material having a low dielectric constant on the gate insulating film 30 and the data lines 61, 62, 63, and 64, and then a photoresist pattern (not shown) is formed thereon. And dry etching are performed to form contact holes 73, 72, and 74 that expose the gate pad 23, the drain electrode 63, and the data pad 64, respectively. On the other hand, in the case where the protective insulating film 70 is formed of an organic material having photosensitivity, the photosensitive film pattern may be exposed and developed without forming a photoresist pattern so as to form the contact holes 73, 72, and 74.

Next, as shown in FIG. 10B, the aluminum films 26 and 66 exposed through the contact holes 73, 72, and 74 are etched to the entire surface. In this case, the aluminum layers 26 and 66 are excessively etched under the gate insulating layer 30 and the protective insulating layer 70 to form an empty space.

Next, as shown in FIG. 10C, the protective insulating film 70 is reflowed to fill the space between the gate insulating film 30 and the lower portion of the protective insulating film 70 with the protective insulating film 70. At this time, the protective insulating film 70 is preferably covered with 1 μm or more on the side surfaces of the aluminum films 26 and 66.

Next, as illustrated in FIGS. 8 and 9, a transparent conductive material such as ITO or IZO is deposited and patterned to form the pixel electrode 80, the auxiliary gate pad 83, and the auxiliary data pad 84.

In this way, the problem that the aluminum films 26 and 66 are in direct contact with the transparent conductive material and the contact resistance is increased can be prevented.

In addition, it is possible to solve the problem of poor image quality due to flicker and crosstalk phenomena that occur when the screen is enlarged. This will be described below.

In the upper plate (not shown) corresponding to the thin film transistor substrate, a color filter (not shown) is formed in a region corresponding to the pixel electrode 80, and a black matrix (not shown) is formed between the color filters. A common electrode (not shown) made of a transparent conductive material such as ITO is formed on the entire surface thereof. In this way, a liquid crystal (not shown) is injected between the upper plate where the color filter is formed, that is, between the color filter substrate and the thin film transistor substrate. Here, as the screen is enlarged, the size of the color filter substrate is also increased. As a result, the resistance of the common electrode is increased, thereby causing the flicker and crosstalk phenomena to be worse, resulting in poor image quality. In order to solve this problem, the protective insulating film 70 is formed of an organic material having a low dielectric constant, so that the data lines 61, 62, 63 and 64 and the common electrode are formed with the liquid crystal and the protective insulating film 70 interposed therebetween. The coupling of the parasitic capacitances can be reduced to reduce flicker and crosstalk. At this time, the dielectric constant of the organic material is preferably 4 or less.

As such, the structure in which the aluminum layer and the transparent conductive layer do not directly contact through the contact hole may be applied to the wide viewing angle liquid crystal display device. In a wide viewing angle liquid crystal display device, opening patterns are formed in the pixel electrode and the common electrode, and a fringe field formed by them forms a multi-domain in which liquid crystal molecules are arranged in all directions, thereby forming a viewing angle. This is improved and the opening pattern can be formed in various shapes.

As described above, in the present invention, the gate wiring and the data wiring are formed of a double layer made of a lower chromium film and an upper aluminum film, and a contact hole exposing the gate pad, the drain electrode, and the data pad is formed in the protective insulating film, and then the photosensitive film pattern is rippled. To cover a portion of the top layer and then etch the exposed top layer. In this case, since the undercut, in which the upper layer is etched under the protective insulating layer, does not occur, reliability of the electrical connection with the transparent conductive layer formed thereon can be improved. On the other hand, if the protective insulating film is formed of an organic material having a low dielectric constant, the entire upper layer is etched through the contact hole, and the protective insulating film is reflowed, the contact between the upper film and the transparent conductive film can be prevented and the flicker and crosstalk phenomenon can be reduced.

Claims (23)

Forming a gate wiring on the insulating substrate, Forming a gate insulating film covering the gate wiring; Forming a semiconductor layer on the gate insulating film, Forming a data line including a double layer including a first upper layer and a first lower layer on the semiconductor layer and the gate insulating layer; Forming a protective insulating layer on the data line; Forming a photoresist pattern on the protective insulating layer; Etching the protective insulating layer and the gate insulating layer using the photoresist pattern as a mask to form a contact hole exposing at least a portion of the data line; Reflowing the photoresist pattern to cover a portion of the data line exposed through the contact hole; Etching the first upper layer exposed through the contact hole; Removing the photoresist pattern; Forming a transparent conductor pattern on the protective insulating layer and connected to the data line through the contact hole; Method of manufacturing a thin film transistor substrate for a liquid crystal display device comprising a. In claim 1, Portions exposed through the contact hole in the data line are drain electrodes and data pads, The transparent conductor pattern may be a pixel electrode and an auxiliary data pad connected to the drain electrode and the data pad, respectively. The manufacturing method of the thin film transistor substrate for liquid crystal display devices. In claim 1, The first upper layer is a method of manufacturing a thin film transistor substrate for a liquid crystal display device consisting of a conductive film containing aluminum. In claim 1, And forming an ohmic contact layer between the semiconductor layer and the data line. In claim 1, And forming a contact hole for exposing a portion of the gate wiring in the step of forming a contact hole for exposing the data wiring. In claim 5, The gate wiring is formed of a double layer including a second upper layer and a second lower layer, The part exposed through the contact hole of the gate wiring is a gate pad, And etching the second upper layer of the gate pad together when etching the first upper layer of the data line. In claim 6, The transparent conductor pattern may further include an auxiliary gate pad covering the gate pad. In claim 6, The second upper layer is a method of manufacturing a thin film transistor substrate for a liquid crystal display device consisting of a conductive film containing aluminum. In claim 1, The transparent conductor pattern is made of ITO manufacturing method of a thin film transistor substrate for a liquid crystal display device. In claim 1, The transparent conductor pattern is a manufacturing method of a thin film transistor substrate for a liquid crystal display device made of IZO. Forming a gate wiring on the substrate, Forming a gate insulating film, Forming a semiconductor layer, Forming a data line including a double layer including a first upper layer and a first lower layer, Forming a protective insulating film having a contact hole exposing at least a portion of the data line, Etching the first upper layer exposed through the contact hole; Reflowing the protective insulating layer to contact the first lower layer of the data line exposed through the contact hole; Forming a transparent conductor pattern on the protective insulating film, And the protective insulating layer is formed of an organic material having a low dielectric constant. In claim 11, The dielectric constant of the said protective insulating film is four or less, The manufacturing method of the thin film transistor substrate for liquid crystal display devices. In claim 11, Portions exposed through the contact hole in the data line are drain electrodes and data pads, The transparent conductor pattern may be a pixel electrode and an auxiliary data pad connected to the drain electrode and the data pad, respectively. The manufacturing method of the thin film transistor substrate for liquid crystal display devices. In claim 13, And the pixel electrode has an opening pattern. In claim 11, The transparent conductor pattern is made of ITO manufacturing method of a thin film transistor substrate for a liquid crystal display device. In claim 11, The transparent conductor pattern is a manufacturing method of a thin film transistor substrate for a liquid crystal display device made of IZO. In claim 11, The protective insulating film is a method of manufacturing a thin film transistor substrate for a liquid crystal display device having photosensitivity. In claim 11, The first upper layer is a method of manufacturing a thin film transistor substrate for a liquid crystal display device consisting of a conductive film containing aluminum. In claim 11, And forming an ohmic contact layer between the semiconductor layer and the data line. In claim 11, And forming a contact hole for exposing a part of the gate wiring together in the step of forming a contact hole for exposing the data wiring. In claim 11, The gate wiring is formed of a double layer including a second lower layer and a second upper layer. The part exposed through the contact hole of the gate wiring is a gate pad, And etching the second upper layer of the gate pad together when etching the first upper layer of the data line. The method of claim 21, The transparent conductor pattern may further include an auxiliary gate pad covering the gate pad. The method of claim 21, The second upper layer is a method of manufacturing a thin film transistor substrate for a liquid crystal display device consisting of a conductive film containing aluminum.

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