KR100634992B1 - 집적회로 테스터를 제어하는 명령 처리 패턴 발생기 - Google Patents

집적회로 테스터를 제어하는 명령 처리 패턴 발생기 Download PDF

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Publication number
KR100634992B1
KR100634992B1 KR1020017004799A KR20017004799A KR100634992B1 KR 100634992 B1 KR100634992 B1 KR 100634992B1 KR 1020017004799 A KR1020017004799 A KR 1020017004799A KR 20017004799 A KR20017004799 A KR 20017004799A KR 100634992 B1 KR100634992 B1 KR 100634992B1
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KR
South Korea
Prior art keywords
address
return
signal
command
stack
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020017004799A
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English (en)
Korean (ko)
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KR20010080196A (ko
Inventor
그루오디스앨지르다스조셉
커그린필립데오도르
Original Assignee
크레던스 시스템스 코포레이션
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Publication of KR20010080196A publication Critical patent/KR20010080196A/ko
Application granted granted Critical
Publication of KR100634992B1 publication Critical patent/KR100634992B1/ko
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318371—Methodologies therefor, e.g. algorithms, procedures
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31919—Storing and outputting test patterns
    • G01R31/31921—Storing and outputting test patterns using compression techniques, e.g. patterns sequencer

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Executing Machine-Instructions (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
KR1020017004799A 1998-11-13 1999-10-25 집적회로 테스터를 제어하는 명령 처리 패턴 발생기 Expired - Fee Related KR100634992B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/191,777 US6154865A (en) 1998-11-13 1998-11-13 Instruction processing pattern generator controlling an integrated circuit tester
US09/191,777 1998-11-13

Publications (2)

Publication Number Publication Date
KR20010080196A KR20010080196A (ko) 2001-08-22
KR100634992B1 true KR100634992B1 (ko) 2006-10-17

Family

ID=22706896

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020017004799A Expired - Fee Related KR100634992B1 (ko) 1998-11-13 1999-10-25 집적회로 테스터를 제어하는 명령 처리 패턴 발생기

Country Status (5)

Country Link
US (1) US6154865A (https=)
EP (1) EP1129363A4 (https=)
JP (1) JP2002530729A (https=)
KR (1) KR100634992B1 (https=)
WO (1) WO2000029863A1 (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014143386A1 (en) * 2013-03-14 2014-09-18 Teradyne, Inc. Method and apparatus for device testing using multiple processing paths
US10139449B2 (en) 2016-01-26 2018-11-27 Teradyne, Inc. Automatic test system with focused test hardware

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030099139A1 (en) * 2001-08-24 2003-05-29 Abrosimov Igor Anatolievich Memory test apparatus and method of testing
US7941640B1 (en) * 2006-08-25 2011-05-10 Marvell International Ltd. Secure processors having encoded instructions
KR102308990B1 (ko) * 2021-07-20 2021-10-06 (주) 에이블리 반도체 테스트 패턴 발생 장치 및 방법

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4670879A (en) * 1984-02-15 1987-06-02 Takeda Riken Kogyo Kabushikikaisha Pattern generator

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5161749A (en) * 1974-11-26 1976-05-28 Fujitsu Ltd Deetashorisochino shoriringuseigyohoshiki
US4041462A (en) * 1976-04-30 1977-08-09 International Business Machines Corporation Data processing system featuring subroutine linkage operations using hardware controlled stacks
US4371949A (en) * 1977-05-31 1983-02-01 Burroughs Corporation Time-shared, multi-phase memory accessing system having automatically updatable error logging means
US4173782A (en) * 1978-01-03 1979-11-06 International Business Machines Corporation Return and link mechanism
US4313200A (en) * 1978-08-28 1982-01-26 Takeda Riken Kogyo Kabushikikaisha Logic test system permitting test pattern changes without dummy cycles
US4493045A (en) * 1981-10-19 1985-01-08 Fairchild Camera & Instrument Corp. Test vector indexing method and apparatus
US5023828A (en) * 1988-07-20 1991-06-11 Digital Equipment Corporation Microinstruction addressing in high-speed CPU
US5321701A (en) * 1990-12-06 1994-06-14 Teradyne, Inc. Method and apparatus for a minimal memory in-circuit digital tester
JP2602997B2 (ja) * 1991-01-18 1997-04-23 株式会社東芝 パターン発生器

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4670879A (en) * 1984-02-15 1987-06-02 Takeda Riken Kogyo Kabushikikaisha Pattern generator

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014143386A1 (en) * 2013-03-14 2014-09-18 Teradyne, Inc. Method and apparatus for device testing using multiple processing paths
US10139449B2 (en) 2016-01-26 2018-11-27 Teradyne, Inc. Automatic test system with focused test hardware

Also Published As

Publication number Publication date
EP1129363A1 (en) 2001-09-05
WO2000029863A1 (en) 2000-05-25
US6154865A (en) 2000-11-28
KR20010080196A (ko) 2001-08-22
EP1129363A4 (en) 2004-12-29
JP2002530729A (ja) 2002-09-17

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